GATE WITH SELF-ALIGNED LEDGE FOR ENHANCEMENT MODE GaN TRANSISTORS

Jianjun Cao; Alexander Lidow Alana Nakata; BLANK ROME LLP

Patent

Atlas literature

Patent

US 10,312,335

GATE WITH SELF-ALIGNED LEDGE FOR ENHANCEMENT MODE GaN TRANSISTORS

Jianjun Cao, Alexander Lidow Alana Nakata

Drawings

Patent drawings and their descriptions. Click a drawing to enlarge it.

FIG. 1

FIG. 2

FIG. 3

FIG. 4

FIG. 5

FIG. 6

FIG. 7

FIG. 8

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

5 independent · 4 dependent

1
IndependentGaNAlGaNp-type gate materialenhancement-mode GaN transistor with self-aligned ledge gate
An enhancement-mode GaN transistor, comprising: a GaN layer; a barrier layer disposed on the GaN layer with a 2DEG region formed at an interface between the GaN layer and the barrier layer; a source contact and a drain contact form ed on the barrier layer; a p-type gate material formed above the barrier layer, the p-type gate material having side surfaces extending horizontally towards the source contact and drain contact, respectively, and contacting the barrier layer; and a gate metal disposed on the p-type gate material, the gate metal having sidewalls extending towards the p-type gate material, wherein the p-type gate material comprises a pair of horizontal ledges that extend past the respective sidewalls of the gate metal and toward the source contact and the drain contact, respectively, the pair of horizontal ledges having substantially equal widths from the sidewalls of the gate metal to the side surfaces of the p-type gate material, respectively. Currently amended
1. 5
  Dependent← claim 1enhancement-mode GaN transistor with self-aligned ledge gate
  The enhancement-mode GaN transistor according to claim 1, wherein the pair of horizontal ledges of the p-type gate material are self-aligned. Original
2. 6
  Dependent← claim 1AlGaNenhancement-mode GaN transistor with self-aligned ledge gate
  The enhancement-mode GaN transistor according to claim 1, wherein the barrier layer comprises aluminum gallium nitride (A l GaN). Original
3. 7
  Dependent← claim 1p-type gate materialgate metalenhancement-mode GaN transistor with self-aligned ledge gate
  The enhancement-mode GaN transistor according to claim 1, wherein the p-type gate material has a ﬁrst width between the side surfaces of the p-type gate material and the gate metal has a second width between sidewalls of the gate metal, the second width being less than the ﬁrst width. Original
2
Independent
Claims 2-4. Canceled
4
Independent
Canceled
8
IndependentGaNAlGaNp-type gate materialgate metalenhancement-mode GaN transistor with self-aligned ledge gate
An enhancement-mode GaN transistor, comprising: a GaN lay er; a barrier layer disposed on the GaN layer with a 2DEG region formed at an interface between the GaN layer and the barrier layer; a source contact and a drain contac t disposed on the barrier layer; a p-type gate material formed above the barrier layer and between the source and drain contacts; and a gate metal disposed on the p-type gate material, wherein the p-type gate material comprises: (i) a pair of self-aligned ledges that extend past sidewalls of the gate metal towards the source contact and drain contact, respectively; and (ii) side surfaces that extend horizontally towards the source contact and drain contact, respectively, and contact the barrier layer. Currently amended
1. 10
  Dependent← claim 8AlGaNenhancement-mode GaN transistor with self-aligned ledge gate
  The enhancement-mode GaN transistor according to claim 8, wherein the barrier layer comprises aluminum gallium nitride (AlGaN). Original
9
Independent
Canceled

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

enhancement-mode GaN transistor with self-aligned ledge gate

gate metalgate metal

p-type gate materialp type gate material with self aligned ledges

AlGaNbarrier layer

GaNchannel base

Materials

Materials described outside the worked examples.

GaN

Base Layer Channel

aluminum gallium nitride

AlGaN

Barrier Layer

Process steps

Additional fabrication and treatment steps described in the patent.

Device Fabrication

Step 1

Process details

steps:forming a GaN layer, forming a barrier layer (AlGaN) on the GaN layer, depositing a p-type gate material on the barrier layer, depositing a gate metal on the p-type gate material, forming a photoresist over the gate metal, etching the gate metal and the p-type gate material, isotropically etching the gate metal to form a pair of self-aligned ledges on the p-type gate material below the gate metal, removing the photoresist

Materials:GaN

Why these are connected

Related documents with shared materials, methods, properties, or citations.

GATE WITH SELF-ALIGNED LEDGE FOR ENHANCEMENT MODE GaN TRANSISTORS | Matter42 Literature