Patent
US 10,600,645Manufacturing Method of Gallium Nitride substrate
Mi Hyun KIM
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,600,645Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. A repeated detailed description of the same or similar processes may be omitted. [0069] For example, referring to part (a) of
FIG. 2 illustrates an image in which the silicon substrate is exposed by the holes of the buffer layer after the particles are removed. [0029 I n the region …
FIG. 3, the first buffer layer 121 may b e physically cleaned to remove foreign particles 11. In this c ase, the physical cleaning may be performed in the …
FIG. 4, the first buffer layer 121 may be physically cleaned to remove foreign particles 11. For example, the physical cleaning may be performed in the cleaning …
FIG. 5 illustrates a cross-sectional view of stages in a manufacturing process of a gallium nitride substrate according to still another exemplary embodiment. …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method of manufacturing a gallium nitride substrate, the method comprising: forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein due to the presence of one or more impurity particles and the silicon substrate is exposed through the one or more holes in the first buffer layer; forming a silicon nitride region in the silicon substrate at the exposed portion of the silicon substrate; forming a second buffer layer on the first buffer layer such that the second buff er layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer. Currently amended
The method as claimed in claim 1, wherein the one or more holes in the first buffer layer and the one or more holes in the second buffer layer are not vertically overlapped with each other. Original
(Previo u sly Presented) The method as claimed in claim 1, wherein forming the first buffer layer having the one or more holes therein includes: Ame ndmen t date d Response to Office Action Made Final mailed depositing the first buffer layer; and removing the one or more impurity particles from the first buffer layer by physically cleaning the first buffer layer. Previously presented
The method as claimed in claim 1, wherein forming the second bu ffer layer having one or more holes therein includes: depositing the second buffer layer; and remov i ng impurity particles from the second buffer layer by physically cleaning the second buffer layer. Original
The method as claimed in claim 1. wherein a thickness of the GaN layer is 10 nm to 10 cm. Original
The method as claimed in claim 1, further comprising: Amendment dated Response to Office Action Made Final mailed forming an insulating layer pattern at an edge of an upper surface of the second buffer layer a f ter forming the second buffer layer and prior to forming the Ga N layer on the second buff e r layer, and removing the insulating layer pattern a f ter fo rming the GaN layer on the second buf foer layer. Original
11. The method as claimed in claim 1, further comprising forming an n th buf f er layer on the second buffer layer, wherein: n is an integer of 3 to 10, and the GaN layer is formed on the n ' bu ffe r layer such that the n t " buffer layer is between the GaN layer and the second buffer layer. Original
The method as claimed in claim 1, further comprising forming an intermediate layer on the second buffer layer, wherein: the GaN layer is formed on the inte r mediate layer such that the intermediate layer is between the GaN layer and the second buffer layer, and the intermediate layer includes GaN or A lG aN. Withdrawn
. Canceled
. Canceled
1 0.. Canceled
13. A method of manufacturing a gallium nitride substrate, the method comprising: Amendment dated Response to Office Action Made Final mailed forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a silicon nitride region in the silicon substrate exposed by the one or more holes; and forming a GaN layer on the first buffer layer. Previously presented
The method as claimed in claim 13, wherein forming the first buffer layer and forming the silicon nitride region are performed in a same chamber. Original
The method as claimed in claim 13, wherein forming the first buffer layer having one or more holes therein includes: depositing the first buffer layer; and removing impurity particles on the first buffer layer by physically cleaning the first buffer layer. Original
The method as claimed in claim 13, wherein the silicon substrate and the GaN layer do not contact each other. Original
The method as claimed in claim 13. further comprising: Amend men t dated September 1 9, 2019 Response to Office Actio n Made Final mailed May 30, 20 19 form ing an insulating layer pattern at an edge of an upper surface of the first buffer layer af ter forming the first buffer layer a n d prior to forming the GaN layer on the first buf fe r layer, and removing the insulating layer pattern after forming the GaN layer on the first buffer layer. Original
1 9. The method as claimed in claim 13, further comprising forming an n "' buffer layer on the first buffer layer, wherein: n is an i nteger of 2 to 10, and the G aN layer is formed on the n t h buffer layer such that the n I buffer layer is between the G aN layer and the first buffer layer. Original
. Canceled
. Canceled
A method of manufacturing a gallium nitride substrate, the me t hod comprising: providing a silicon substrate; forming a first buffer layer on the silicon substrate such that the first buffe r layer includes at least one hole therethrough exposing a portion of the silicon substrate; f ormin g a barrier at the at least one hole in the first buffer layer; forming a GaN layer on the first buffer layer such that the GaN layer is physically separated from the silicon of the silicon substrate; and separating the GaN layer, Amendment dated September 19. 2019 Response to Office Action Made Final mailed May 3 0. 2019 where in forming the ba r rier includes forming a silicon nitride region in the portion of the silicon substrate exposed by the at least o ne hole in the first buffer layer such that the silicon nit ride region physically separates the GaN layer and the silicon of the silicon substrate. Previously presented
The method as claimed in claim 21, wherein forming the barrier includes forming at least one additional buffer layer on the first buffer layer such that the at least one additional buffer layer fills the at least one hole in the first buffer layer and physically separates the GaN layer and the silicon of the silicon substrate Original
The method as claimed in claim 21, further comprising forming an insulating layer pattern at an outer edge of a surface of the first buffer layer that faces away from the silicon substrate prior to forming the GaN layer on the first buffer layer, wherein forming the GaN layer on the first buffer layer includes forming a monocrystalline GaN layer on the first buffer layer and forming a polycrystalline GaN layer on the insulating layer. Withdrawn
. Canceled
Layer stacks claimed or described, ordered top of device to substrate.
gallium nitride substrate (double buffer layer with Si₃N₄ barrier)
gallium nitride substrate (single buffer layer with Si₃N₄ barrier)
Materials described outside the worked examples.
silicon substrate
Si
first buffer layer
silicon nitride region
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN layer thickness (claimed range) | ≥ 10 nm to cm | GaN |
First buffer layer thickness (described range) | 5–10000 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,600,645Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. A repeated detailed description of the same or similar processes may be omitted. [0069] For example, referring to part (a) of
FIG. 2 illustrates an image in which the silicon substrate is exposed by the holes of the buffer layer after the particles are removed. [0029 I n the region …
FIG. 3, the first buffer layer 121 may b e physically cleaned to remove foreign particles 11. In this c ase, the physical cleaning may be performed in the …
FIG. 4, the first buffer layer 121 may be physically cleaned to remove foreign particles 11. For example, the physical cleaning may be performed in the cleaning …
FIG. 5 illustrates a cross-sectional view of stages in a manufacturing process of a gallium nitride substrate according to still another exemplary embodiment. …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method of manufacturing a gallium nitride substrate, the method comprising: forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein due to the presence of one or more impurity particles and the silicon substrate is exposed through the one or more holes in the first buffer layer; forming a silicon nitride region in the silicon substrate at the exposed portion of the silicon substrate; forming a second buffer layer on the first buffer layer such that the second buff er layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer. Currently amended
The method as claimed in claim 1, wherein the one or more holes in the first buffer layer and the one or more holes in the second buffer layer are not vertically overlapped with each other. Original
(Previo u sly Presented) The method as claimed in claim 1, wherein forming the first buffer layer having the one or more holes therein includes: Ame ndmen t date d Response to Office Action Made Final mailed depositing the first buffer layer; and removing the one or more impurity particles from the first buffer layer by physically cleaning the first buffer layer. Previously presented
The method as claimed in claim 1, wherein forming the second bu ffer layer having one or more holes therein includes: depositing the second buffer layer; and remov i ng impurity particles from the second buffer layer by physically cleaning the second buffer layer. Original
The method as claimed in claim 1. wherein a thickness of the GaN layer is 10 nm to 10 cm. Original
The method as claimed in claim 1, further comprising: Amendment dated Response to Office Action Made Final mailed forming an insulating layer pattern at an edge of an upper surface of the second buffer layer a f ter forming the second buffer layer and prior to forming the Ga N layer on the second buff e r layer, and removing the insulating layer pattern a f ter fo rming the GaN layer on the second buf foer layer. Original
11. The method as claimed in claim 1, further comprising forming an n th buf f er layer on the second buffer layer, wherein: n is an integer of 3 to 10, and the GaN layer is formed on the n ' bu ffe r layer such that the n t " buffer layer is between the GaN layer and the second buffer layer. Original
The method as claimed in claim 1, further comprising forming an intermediate layer on the second buffer layer, wherein: the GaN layer is formed on the inte r mediate layer such that the intermediate layer is between the GaN layer and the second buffer layer, and the intermediate layer includes GaN or A lG aN. Withdrawn
. Canceled
. Canceled
1 0.. Canceled
13. A method of manufacturing a gallium nitride substrate, the method comprising: Amendment dated Response to Office Action Made Final mailed forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a silicon nitride region in the silicon substrate exposed by the one or more holes; and forming a GaN layer on the first buffer layer. Previously presented
The method as claimed in claim 13, wherein forming the first buffer layer and forming the silicon nitride region are performed in a same chamber. Original
The method as claimed in claim 13, wherein forming the first buffer layer having one or more holes therein includes: depositing the first buffer layer; and removing impurity particles on the first buffer layer by physically cleaning the first buffer layer. Original
The method as claimed in claim 13, wherein the silicon substrate and the GaN layer do not contact each other. Original
The method as claimed in claim 13. further comprising: Amend men t dated September 1 9, 2019 Response to Office Actio n Made Final mailed May 30, 20 19 form ing an insulating layer pattern at an edge of an upper surface of the first buffer layer af ter forming the first buffer layer a n d prior to forming the GaN layer on the first buf fe r layer, and removing the insulating layer pattern after forming the GaN layer on the first buffer layer. Original
1 9. The method as claimed in claim 13, further comprising forming an n "' buffer layer on the first buffer layer, wherein: n is an i nteger of 2 to 10, and the G aN layer is formed on the n t h buffer layer such that the n I buffer layer is between the G aN layer and the first buffer layer. Original
. Canceled
. Canceled
A method of manufacturing a gallium nitride substrate, the me t hod comprising: providing a silicon substrate; forming a first buffer layer on the silicon substrate such that the first buffe r layer includes at least one hole therethrough exposing a portion of the silicon substrate; f ormin g a barrier at the at least one hole in the first buffer layer; forming a GaN layer on the first buffer layer such that the GaN layer is physically separated from the silicon of the silicon substrate; and separating the GaN layer, Amendment dated September 19. 2019 Response to Office Action Made Final mailed May 3 0. 2019 where in forming the ba r rier includes forming a silicon nitride region in the portion of the silicon substrate exposed by the at least o ne hole in the first buffer layer such that the silicon nit ride region physically separates the GaN layer and the silicon of the silicon substrate. Previously presented
The method as claimed in claim 21, wherein forming the barrier includes forming at least one additional buffer layer on the first buffer layer such that the at least one additional buffer layer fills the at least one hole in the first buffer layer and physically separates the GaN layer and the silicon of the silicon substrate Original
The method as claimed in claim 21, further comprising forming an insulating layer pattern at an outer edge of a surface of the first buffer layer that faces away from the silicon substrate prior to forming the GaN layer on the first buffer layer, wherein forming the GaN layer on the first buffer layer includes forming a monocrystalline GaN layer on the first buffer layer and forming a polycrystalline GaN layer on the insulating layer. Withdrawn
. Canceled
Layer stacks claimed or described, ordered top of device to substrate.
gallium nitride substrate (double buffer layer with Si₃N₄ barrier)
gallium nitride substrate (single buffer layer with Si₃N₄ barrier)
Materials described outside the worked examples.
silicon substrate
Si
first buffer layer
silicon nitride region
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN layer thickness (claimed range) | ≥ 10 nm to cm | GaN |
First buffer layer thickness (described range) | 5–10000 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,600,645Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. A repeated detailed description of the same or similar processes may be omitted. [0069] For example, referring to part (a) of
FIG. 2 illustrates an image in which the silicon substrate is exposed by the holes of the buffer layer after the particles are removed. [0029 I n the region …
FIG. 3, the first buffer layer 121 may b e physically cleaned to remove foreign particles 11. In this c ase, the physical cleaning may be performed in the …
FIG. 4, the first buffer layer 121 may be physically cleaned to remove foreign particles 11. For example, the physical cleaning may be performed in the cleaning …
FIG. 5 illustrates a cross-sectional view of stages in a manufacturing process of a gallium nitride substrate according to still another exemplary embodiment. …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method of manufacturing a gallium nitride substrate, the method comprising: forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein due to the presence of one or more impurity particles and the silicon substrate is exposed through the one or more holes in the first buffer layer; forming a silicon nitride region in the silicon substrate at the exposed portion of the silicon substrate; forming a second buffer layer on the first buffer layer such that the second buff er layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer. Currently amended
The method as claimed in claim 1, wherein the one or more holes in the first buffer layer and the one or more holes in the second buffer layer are not vertically overlapped with each other. Original
(Previo u sly Presented) The method as claimed in claim 1, wherein forming the first buffer layer having the one or more holes therein includes: Ame ndmen t date d Response to Office Action Made Final mailed depositing the first buffer layer; and removing the one or more impurity particles from the first buffer layer by physically cleaning the first buffer layer. Previously presented
The method as claimed in claim 1, wherein forming the second bu ffer layer having one or more holes therein includes: depositing the second buffer layer; and remov i ng impurity particles from the second buffer layer by physically cleaning the second buffer layer. Original
The method as claimed in claim 1. wherein a thickness of the GaN layer is 10 nm to 10 cm. Original
The method as claimed in claim 1, further comprising: Amendment dated Response to Office Action Made Final mailed forming an insulating layer pattern at an edge of an upper surface of the second buffer layer a f ter forming the second buffer layer and prior to forming the Ga N layer on the second buff e r layer, and removing the insulating layer pattern a f ter fo rming the GaN layer on the second buf foer layer. Original
11. The method as claimed in claim 1, further comprising forming an n th buf f er layer on the second buffer layer, wherein: n is an integer of 3 to 10, and the GaN layer is formed on the n ' bu ffe r layer such that the n t " buffer layer is between the GaN layer and the second buffer layer. Original
The method as claimed in claim 1, further comprising forming an intermediate layer on the second buffer layer, wherein: the GaN layer is formed on the inte r mediate layer such that the intermediate layer is between the GaN layer and the second buffer layer, and the intermediate layer includes GaN or A lG aN. Withdrawn
. Canceled
. Canceled
1 0.. Canceled
13. A method of manufacturing a gallium nitride substrate, the method comprising: Amendment dated Response to Office Action Made Final mailed forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a silicon nitride region in the silicon substrate exposed by the one or more holes; and forming a GaN layer on the first buffer layer. Previously presented
The method as claimed in claim 13, wherein forming the first buffer layer and forming the silicon nitride region are performed in a same chamber. Original
The method as claimed in claim 13, wherein forming the first buffer layer having one or more holes therein includes: depositing the first buffer layer; and removing impurity particles on the first buffer layer by physically cleaning the first buffer layer. Original
The method as claimed in claim 13, wherein the silicon substrate and the GaN layer do not contact each other. Original
The method as claimed in claim 13. further comprising: Amend men t dated September 1 9, 2019 Response to Office Actio n Made Final mailed May 30, 20 19 form ing an insulating layer pattern at an edge of an upper surface of the first buffer layer af ter forming the first buffer layer a n d prior to forming the GaN layer on the first buf fe r layer, and removing the insulating layer pattern after forming the GaN layer on the first buffer layer. Original
1 9. The method as claimed in claim 13, further comprising forming an n "' buffer layer on the first buffer layer, wherein: n is an i nteger of 2 to 10, and the G aN layer is formed on the n t h buffer layer such that the n I buffer layer is between the G aN layer and the first buffer layer. Original
. Canceled
. Canceled
A method of manufacturing a gallium nitride substrate, the me t hod comprising: providing a silicon substrate; forming a first buffer layer on the silicon substrate such that the first buffe r layer includes at least one hole therethrough exposing a portion of the silicon substrate; f ormin g a barrier at the at least one hole in the first buffer layer; forming a GaN layer on the first buffer layer such that the GaN layer is physically separated from the silicon of the silicon substrate; and separating the GaN layer, Amendment dated September 19. 2019 Response to Office Action Made Final mailed May 3 0. 2019 where in forming the ba r rier includes forming a silicon nitride region in the portion of the silicon substrate exposed by the at least o ne hole in the first buffer layer such that the silicon nit ride region physically separates the GaN layer and the silicon of the silicon substrate. Previously presented
The method as claimed in claim 21, wherein forming the barrier includes forming at least one additional buffer layer on the first buffer layer such that the at least one additional buffer layer fills the at least one hole in the first buffer layer and physically separates the GaN layer and the silicon of the silicon substrate Original
The method as claimed in claim 21, further comprising forming an insulating layer pattern at an outer edge of a surface of the first buffer layer that faces away from the silicon substrate prior to forming the GaN layer on the first buffer layer, wherein forming the GaN layer on the first buffer layer includes forming a monocrystalline GaN layer on the first buffer layer and forming a polycrystalline GaN layer on the insulating layer. Withdrawn
. Canceled
Layer stacks claimed or described, ordered top of device to substrate.
gallium nitride substrate (double buffer layer with Si₃N₄ barrier)
gallium nitride substrate (single buffer layer with Si₃N₄ barrier)
Materials described outside the worked examples.
silicon substrate
Si
first buffer layer
silicon nitride region
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN layer thickness (claimed range) | ≥ 10 nm to cm | GaN |
First buffer layer thickness (described range) | 5–10000 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,600,645Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. A repeated detailed description of the same or similar processes may be omitted. [0069] For example, referring to part (a) of
FIG. 2 illustrates an image in which the silicon substrate is exposed by the holes of the buffer layer after the particles are removed. [0029 I n the region …
FIG. 3, the first buffer layer 121 may b e physically cleaned to remove foreign particles 11. In this c ase, the physical cleaning may be performed in the …
FIG. 4, the first buffer layer 121 may be physically cleaned to remove foreign particles 11. For example, the physical cleaning may be performed in the cleaning …
FIG. 5 illustrates a cross-sectional view of stages in a manufacturing process of a gallium nitride substrate according to still another exemplary embodiment. …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method of manufacturing a gallium nitride substrate, the method comprising: forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein due to the presence of one or more impurity particles and the silicon substrate is exposed through the one or more holes in the first buffer layer; forming a silicon nitride region in the silicon substrate at the exposed portion of the silicon substrate; forming a second buffer layer on the first buffer layer such that the second buff er layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer. Currently amended
The method as claimed in claim 1, wherein the one or more holes in the first buffer layer and the one or more holes in the second buffer layer are not vertically overlapped with each other. Original
(Previo u sly Presented) The method as claimed in claim 1, wherein forming the first buffer layer having the one or more holes therein includes: Ame ndmen t date d Response to Office Action Made Final mailed depositing the first buffer layer; and removing the one or more impurity particles from the first buffer layer by physically cleaning the first buffer layer. Previously presented
The method as claimed in claim 1, wherein forming the second bu ffer layer having one or more holes therein includes: depositing the second buffer layer; and remov i ng impurity particles from the second buffer layer by physically cleaning the second buffer layer. Original
The method as claimed in claim 1. wherein a thickness of the GaN layer is 10 nm to 10 cm. Original
The method as claimed in claim 1, further comprising: Amendment dated Response to Office Action Made Final mailed forming an insulating layer pattern at an edge of an upper surface of the second buffer layer a f ter forming the second buffer layer and prior to forming the Ga N layer on the second buff e r layer, and removing the insulating layer pattern a f ter fo rming the GaN layer on the second buf foer layer. Original
11. The method as claimed in claim 1, further comprising forming an n th buf f er layer on the second buffer layer, wherein: n is an integer of 3 to 10, and the GaN layer is formed on the n ' bu ffe r layer such that the n t " buffer layer is between the GaN layer and the second buffer layer. Original
The method as claimed in claim 1, further comprising forming an intermediate layer on the second buffer layer, wherein: the GaN layer is formed on the inte r mediate layer such that the intermediate layer is between the GaN layer and the second buffer layer, and the intermediate layer includes GaN or A lG aN. Withdrawn
. Canceled
. Canceled
1 0.. Canceled
13. A method of manufacturing a gallium nitride substrate, the method comprising: Amendment dated Response to Office Action Made Final mailed forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a silicon nitride region in the silicon substrate exposed by the one or more holes; and forming a GaN layer on the first buffer layer. Previously presented
The method as claimed in claim 13, wherein forming the first buffer layer and forming the silicon nitride region are performed in a same chamber. Original
The method as claimed in claim 13, wherein forming the first buffer layer having one or more holes therein includes: depositing the first buffer layer; and removing impurity particles on the first buffer layer by physically cleaning the first buffer layer. Original
The method as claimed in claim 13, wherein the silicon substrate and the GaN layer do not contact each other. Original
The method as claimed in claim 13. further comprising: Amend men t dated September 1 9, 2019 Response to Office Actio n Made Final mailed May 30, 20 19 form ing an insulating layer pattern at an edge of an upper surface of the first buffer layer af ter forming the first buffer layer a n d prior to forming the GaN layer on the first buf fe r layer, and removing the insulating layer pattern after forming the GaN layer on the first buffer layer. Original
1 9. The method as claimed in claim 13, further comprising forming an n "' buffer layer on the first buffer layer, wherein: n is an i nteger of 2 to 10, and the G aN layer is formed on the n t h buffer layer such that the n I buffer layer is between the G aN layer and the first buffer layer. Original
. Canceled
. Canceled
A method of manufacturing a gallium nitride substrate, the me t hod comprising: providing a silicon substrate; forming a first buffer layer on the silicon substrate such that the first buffe r layer includes at least one hole therethrough exposing a portion of the silicon substrate; f ormin g a barrier at the at least one hole in the first buffer layer; forming a GaN layer on the first buffer layer such that the GaN layer is physically separated from the silicon of the silicon substrate; and separating the GaN layer, Amendment dated September 19. 2019 Response to Office Action Made Final mailed May 3 0. 2019 where in forming the ba r rier includes forming a silicon nitride region in the portion of the silicon substrate exposed by the at least o ne hole in the first buffer layer such that the silicon nit ride region physically separates the GaN layer and the silicon of the silicon substrate. Previously presented
The method as claimed in claim 21, wherein forming the barrier includes forming at least one additional buffer layer on the first buffer layer such that the at least one additional buffer layer fills the at least one hole in the first buffer layer and physically separates the GaN layer and the silicon of the silicon substrate Original
The method as claimed in claim 21, further comprising forming an insulating layer pattern at an outer edge of a surface of the first buffer layer that faces away from the silicon substrate prior to forming the GaN layer on the first buffer layer, wherein forming the GaN layer on the first buffer layer includes forming a monocrystalline GaN layer on the first buffer layer and forming a polycrystalline GaN layer on the insulating layer. Withdrawn
. Canceled
Layer stacks claimed or described, ordered top of device to substrate.
gallium nitride substrate (double buffer layer with Si₃N₄ barrier)
gallium nitride substrate (single buffer layer with Si₃N₄ barrier)
Materials described outside the worked examples.
silicon substrate
Si
first buffer layer
silicon nitride region
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN layer thickness (claimed range) | ≥ 10 nm to cm | GaN |
First buffer layer thickness (described range) | 5–10000 nm |
Related documents with shared materials, methods, properties, or citations.
gallium nitride substrate (barrier-isolated, separable GaN layer)
Si₃N₄
GaN layer
GaN
AlGaN intermediate layer
AlGaN
AlN buffer layer
AlN
TaN buffer layer
TaN
TiN buffer layer
TiN
HfN buffer layer
HfN
Si (111) surface lattice constant | 3.8403 Å | Si |
GaN lattice constant | 3.189 Å | GaN |
Silicon substrate thickness | 100–1000 µm | Si |
Temperature | 1000–1200 °C | — |
Temperature | 950–1200 °C | — |
Thickness | 10–100000000 nm | — |
Thickness | 1–5 cm | — |
Temperature | 500–1200 °C | — |
Thickness | 0.5–5 mm | — |
gallium nitride substrate (barrier-isolated, separable GaN layer)
Si₃N₄
GaN layer
GaN
AlGaN intermediate layer
AlGaN
AlN buffer layer
AlN
TaN buffer layer
TaN
TiN buffer layer
TiN
HfN buffer layer
HfN
Si (111) surface lattice constant | 3.8403 Å | Si |
GaN lattice constant | 3.189 Å | GaN |
Silicon substrate thickness | 100–1000 µm | Si |
Temperature | 1000–1200 °C | — |
Temperature | 950–1200 °C | — |
Thickness | 10–100000000 nm | — |
Thickness | 1–5 cm | — |
Temperature | 500–1200 °C | — |
Thickness | 0.5–5 mm | — |
gallium nitride substrate (barrier-isolated, separable GaN layer)
Si₃N₄
GaN layer
GaN
AlGaN intermediate layer
AlGaN
AlN buffer layer
AlN
TaN buffer layer
TaN
TiN buffer layer
TiN
HfN buffer layer
HfN
Si (111) surface lattice constant | 3.8403 Å | Si |
GaN lattice constant | 3.189 Å | GaN |
Silicon substrate thickness | 100–1000 µm | Si |
Temperature | 1000–1200 °C | — |
Temperature | 950–1200 °C | — |
Thickness | 10–100000000 nm | — |
Thickness | 1–5 cm | — |
Temperature | 500–1200 °C | — |
Thickness | 0.5–5 mm | — |
gallium nitride substrate (barrier-isolated, separable GaN layer)
Si₃N₄
GaN layer
GaN
AlGaN intermediate layer
AlGaN
AlN buffer layer
AlN
TaN buffer layer
TaN
TiN buffer layer
TiN
HfN buffer layer
HfN
Si (111) surface lattice constant | 3.8403 Å | Si |
GaN lattice constant | 3.189 Å | GaN |
Silicon substrate thickness | 100–1000 µm | Si |
Temperature | 1000–1200 °C | — |
Temperature | 950–1200 °C | — |
Thickness | 10–100000000 nm | — |
Thickness | 1–5 cm | — |
Temperature | 500–1200 °C | — |
Thickness | 0.5–5 mm | — |