Patent
US 11,088,534OVERVOLTAGE PROTECTION AND SHORT-CIRCUIT WITHSTANDING FOR GALLIUM NITRIDE DEVICES
Sandeep R. Bahl
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 11,088,534Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 7 is a partial schematic diagram of another example circuit for sensing overvoltage in the integrated circuit of
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; and a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. detect an overcurrent condition of the first current terminal; and bias the second current terminal at a third voltage responsive to the overcurrent condition, in which the third voltage is lower than the second voltage. Currently amended
The device of claim 1, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition and independent of the overcurrent condition. Currently amended
The device of claim 1, wherein the driver circuit includes an overvoltage sense circuit comprising: a voltage divider having a first voltage divider terminal oupled to the first current terminal of the power switch, a second voltage divider terminal coupled to a voltage supply terminal, and a third voltage divider terminal between the first and second voltage divider terminals; and a comparator having a non-inverting input coupled to a reference voltage terminal, an inverting input coupled to the third voltage divider terminal, and an output configured to generate an overvoltage signal responsive to the overvoltage condition. Currently amended
Canceled
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvolta g e condition, in which the second voltage is lower than the first voltage; and, a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and, the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 6, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 6, wherein the transistor is a field effect transistor (FET) having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal to conduct a first current responsive to absence of the overvoltage condition; and bias the second current terminal to conduct a second current responsive to the overvoltage condition, in which, the second current is greater than the first current; and a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 11, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 11, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the transistor is a FET having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
Canceled
A half bridge circuit, comprising: a first gallium nitride (GaN) switch having a first drain, a first source, and a first gate; a second GaN switch having a second drain coupled to the first source, a second source, and a second gate; and a driver circuit coupled to the first and second GaN switches, and configured to: detect an overvoltage condition of the first drain; bias the first source at a first voltage responsive to absence of the overvoltage condition; and bias the first source at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. Currently amended
The device of claim 17, wherein the driver circuit is configured to generate a control signal for delivery to the first gate based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device of claim 17, wherein the driver circuit is coupled to the second gate, and the driver circuit is configured to operate the second GaN switch in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition -i-s. Currently amended
The device of claim 17, further comprising: a F ET having a third drain coupled to the first source, a third source, and a third gate, in which: the driver circuit is coupled to the third gate;, and the driver circuit is configured to operate the FET in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
Layer stacks claimed or described, ordered top of device to substrate.
power switch with driver circuit for overvoltage and overcurrent protection
No layer stack recorded.
cascode switch circuit with GaN power switch and series transistor for overvoltage protection
half-bridge circuit with first and second GaN switches
switch circuit with GaN first transistor and silicon second transistor in integrated circuit
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
aluminum gallium nitride (AlGaN)
AlGaN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,088,534Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 7 is a partial schematic diagram of another example circuit for sensing overvoltage in the integrated circuit of
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; and a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. detect an overcurrent condition of the first current terminal; and bias the second current terminal at a third voltage responsive to the overcurrent condition, in which the third voltage is lower than the second voltage. Currently amended
The device of claim 1, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition and independent of the overcurrent condition. Currently amended
The device of claim 1, wherein the driver circuit includes an overvoltage sense circuit comprising: a voltage divider having a first voltage divider terminal oupled to the first current terminal of the power switch, a second voltage divider terminal coupled to a voltage supply terminal, and a third voltage divider terminal between the first and second voltage divider terminals; and a comparator having a non-inverting input coupled to a reference voltage terminal, an inverting input coupled to the third voltage divider terminal, and an output configured to generate an overvoltage signal responsive to the overvoltage condition. Currently amended
Canceled
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvolta g e condition, in which the second voltage is lower than the first voltage; and, a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and, the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 6, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 6, wherein the transistor is a field effect transistor (FET) having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal to conduct a first current responsive to absence of the overvoltage condition; and bias the second current terminal to conduct a second current responsive to the overvoltage condition, in which, the second current is greater than the first current; and a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 11, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 11, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the transistor is a FET having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
Canceled
A half bridge circuit, comprising: a first gallium nitride (GaN) switch having a first drain, a first source, and a first gate; a second GaN switch having a second drain coupled to the first source, a second source, and a second gate; and a driver circuit coupled to the first and second GaN switches, and configured to: detect an overvoltage condition of the first drain; bias the first source at a first voltage responsive to absence of the overvoltage condition; and bias the first source at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. Currently amended
The device of claim 17, wherein the driver circuit is configured to generate a control signal for delivery to the first gate based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device of claim 17, wherein the driver circuit is coupled to the second gate, and the driver circuit is configured to operate the second GaN switch in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition -i-s. Currently amended
The device of claim 17, further comprising: a F ET having a third drain coupled to the first source, a third source, and a third gate, in which: the driver circuit is coupled to the third gate;, and the driver circuit is configured to operate the FET in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
Layer stacks claimed or described, ordered top of device to substrate.
power switch with driver circuit for overvoltage and overcurrent protection
No layer stack recorded.
cascode switch circuit with GaN power switch and series transistor for overvoltage protection
half-bridge circuit with first and second GaN switches
switch circuit with GaN first transistor and silicon second transistor in integrated circuit
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
aluminum gallium nitride (AlGaN)
AlGaN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,088,534Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 7 is a partial schematic diagram of another example circuit for sensing overvoltage in the integrated circuit of
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; and a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. detect an overcurrent condition of the first current terminal; and bias the second current terminal at a third voltage responsive to the overcurrent condition, in which the third voltage is lower than the second voltage. Currently amended
The device of claim 1, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition and independent of the overcurrent condition. Currently amended
The device of claim 1, wherein the driver circuit includes an overvoltage sense circuit comprising: a voltage divider having a first voltage divider terminal oupled to the first current terminal of the power switch, a second voltage divider terminal coupled to a voltage supply terminal, and a third voltage divider terminal between the first and second voltage divider terminals; and a comparator having a non-inverting input coupled to a reference voltage terminal, an inverting input coupled to the third voltage divider terminal, and an output configured to generate an overvoltage signal responsive to the overvoltage condition. Currently amended
Canceled
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvolta g e condition, in which the second voltage is lower than the first voltage; and, a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and, the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 6, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 6, wherein the transistor is a field effect transistor (FET) having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal to conduct a first current responsive to absence of the overvoltage condition; and bias the second current terminal to conduct a second current responsive to the overvoltage condition, in which, the second current is greater than the first current; and a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 11, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 11, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the transistor is a FET having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
Canceled
A half bridge circuit, comprising: a first gallium nitride (GaN) switch having a first drain, a first source, and a first gate; a second GaN switch having a second drain coupled to the first source, a second source, and a second gate; and a driver circuit coupled to the first and second GaN switches, and configured to: detect an overvoltage condition of the first drain; bias the first source at a first voltage responsive to absence of the overvoltage condition; and bias the first source at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. Currently amended
The device of claim 17, wherein the driver circuit is configured to generate a control signal for delivery to the first gate based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device of claim 17, wherein the driver circuit is coupled to the second gate, and the driver circuit is configured to operate the second GaN switch in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition -i-s. Currently amended
The device of claim 17, further comprising: a F ET having a third drain coupled to the first source, a third source, and a third gate, in which: the driver circuit is coupled to the third gate;, and the driver circuit is configured to operate the FET in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
Layer stacks claimed or described, ordered top of device to substrate.
power switch with driver circuit for overvoltage and overcurrent protection
No layer stack recorded.
cascode switch circuit with GaN power switch and series transistor for overvoltage protection
half-bridge circuit with first and second GaN switches
switch circuit with GaN first transistor and silicon second transistor in integrated circuit
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
aluminum gallium nitride (AlGaN)
AlGaN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,088,534Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 7 is a partial schematic diagram of another example circuit for sensing overvoltage in the integrated circuit of
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; and a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. detect an overcurrent condition of the first current terminal; and bias the second current terminal at a third voltage responsive to the overcurrent condition, in which the third voltage is lower than the second voltage. Currently amended
The device of claim 1, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 1, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition and independent of the overcurrent condition. Currently amended
The device of claim 1, wherein the driver circuit includes an overvoltage sense circuit comprising: a voltage divider having a first voltage divider terminal oupled to the first current terminal of the power switch, a second voltage divider terminal coupled to a voltage supply terminal, and a third voltage divider terminal between the first and second voltage divider terminals; and a comparator having a non-inverting input coupled to a reference voltage terminal, an inverting input coupled to the third voltage divider terminal, and an output configured to generate an overvoltage signal responsive to the overvoltage condition. Currently amended
Canceled
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal at a first voltage responsive to absence of the overvoltage condition; bias the second current terminal at a second voltage responsive to the overvolta g e condition, in which the second voltage is lower than the first voltage; and, a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and, the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 6, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 6, wherein the transistor is a field effect transistor (FET) having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
A device, comprising: a power switch having a first current terminal, a second current terminal, and a control terminal; a driver circuit coupled to the control terminal of the power switch, and configured to: detect an overvoltage condition of the first current terminal; bias the second current terminal to conduct a first current responsive to absence of the overvoltage condition; and bias the second current terminal to conduct a second current responsive to the overvoltage condition, in which, the second current is greater than the first current; and a transistor having a first current terminal, a second current terminal, and a control terminal, in which: the first current terminal of the transistor is coupled to the second current terminal of the power switch; the second current terminal of the transistor is coupled to a ground terminal; the driver circuit is coupled to the control terminal of the transistor; and the driver circuit is configured to operate the transistor in: a linear mode responsive to absence of the overvoltage condition; and a saturation mode responsive to the overvoltage condition. Currently amended
The device of claim 11, wherein the power switch includes a gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the driver circuit is configured to generate a control signal for delivery to the control terminal based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device o f claim 11, wherein: the power switch includes a first gallium nitride (GaN) transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal; and the transistor includes a second GaN transistor having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
The device of claim 11, wherein the transistor is a FET having a drain as the first current terminal, a source as the second current terminal, and a gate as the control terminal. Currently amended
Canceled
A half bridge circuit, comprising: a first gallium nitride (GaN) switch having a first drain, a first source, and a first gate; a second GaN switch having a second drain coupled to the first source, a second source, and a second gate; and a driver circuit coupled to the first and second GaN switches, and configured to: detect an overvoltage condition of the first drain; bias the first source at a first voltage responsive to absence of the overvoltage condition; and bias the first source at a second voltage responsive to the overvoltage condition, in which, the second voltage is lower than the first voltage. Currently amended
The device of claim 17, wherein the driver circuit is configured to generate a control signal for delivery to the first gate based on a driver input signal, and the control signal is independent of the overvoltage condition. Original
The device of claim 17, wherein the driver circuit is coupled to the second gate, and the driver circuit is configured to operate the second GaN switch in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition -i-s. Currently amended
The device of claim 17, further comprising: a F ET having a third drain coupled to the first source, a third source, and a third gate, in which: the driver circuit is coupled to the third gate;, and the driver circuit is configured to operate the FET in: a linear mode responsive to absence of the overvoltage condition; and, a saturation mode responsive to the overvoltage condition. Currently amended
Layer stacks claimed or described, ordered top of device to substrate.
power switch with driver circuit for overvoltage and overcurrent protection
No layer stack recorded.
cascode switch circuit with GaN power switch and series transistor for overvoltage protection
half-bridge circuit with first and second GaN switches
switch circuit with GaN first transistor and silicon second transistor in integrated circuit
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
aluminum gallium nitride (AlGaN)
AlGaN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1. An input voltage VI N is connected to the first circuit node 104a of the first switch circuit 1 00 a, and this input voltage is provided to the terminal …
Related documents with shared materials, methods, properties, or citations.
silicon (Si)
Si
silicon carbide (SiC)
SiC
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
silicon (Si)
Si
silicon carbide (SiC)
SiC
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
silicon (Si)
Si
silicon carbide (SiC)
SiC
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …
silicon (Si)
Si
silicon carbide (SiC)
SiC
FIG. 2. For example, the overvoltage sense circuit 112 in one example determines whether the voltage across the first transistor 101 is greater than the …
FIG. 3. If not (NO at 208), the process 200 returns to normal operation in the first mode at 202 as previously described. [0028] If an overcurrent condition has …
FIG. 4. Table 1: SVG 16293255.03-05-2019.JSWBN₂AARXEAPX5.SPEC.12.8.352.875.2287.1263.svg 1.293 6.45 Chemistry Black and white [0030]
FIG. 5. The second switch circuit 10 0 b receives a second drive signal DRVb along a line 10 8b from the control circuit 502. [0033] In operation in one …
FIG. 6 shows an example overvoltage sense circuit 112 to sense overvoltage conditions associated with a connected first transistor 101. In this example, the …
FIG. 8 shows a waveform or graph 800 illustrating an example overvoltage waveform 802 and corresponding analog and digital low voltage transistor gate control …
FIG. 9 is a schematic diagram of an example half bridge switch circuit including high and low side gallium nitride transistors and a driver integrated circuit …