Patent
US 10,128,453METHOD FOR MANUFACTURING A GRAPHENE THIN-FILM TRANSISTOR
Xuanyun WANG
US
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Patent
Atlas literature
Patent
US 10,128,453Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a surface of a copper foil by chemical vapor deposition using methane as a carbon source; S2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a surface of the metal layer to form a graphene film; S 4: placing the graphene film in a copper etching solution, immersing the support layer partially in the copper etching solution, and immersing the metal layer, the graphene layer, and copper foil in the copper etching solution completely until the copper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S5: defining patterns of a source and a drain on the surface of the metal layer, manufacturing a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal layer comprises a first metal la y er and a second metal layer, the first metal la y er close to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the g raphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 1, wherein before S 1, the method further comprises: washing the copper foil in ethanol, acetone, and dilute hydrochloric acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer is deposited on the surface of the graphene layer by electron beam evaporation or magnetron sputtering. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
Canceled
The method f o r manufacturing the graphene thin-film transistor of claim 8, wherein the support layer comprises polyurethane. Original
A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a su r face of a c o pper f o il; S 2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a su r face of the metal layer to f o rm a graphene film; S 4: placing the graphene film in a c o pper etching s o luti o n, immersing the support layer partially in the c o pper etching s o luti o n, and immersing the metal layer, the graphene layer, and the c o pper f o il in the c o pper etching s o luti o n completely until the c o pper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S 5: defining patterns of a source and a drain on the surface of the metal layer, manufactu ri ng a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal la y er comprises a first metal la y er and a second metal la y er, the first metal la y er cl ose to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the graphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 11, before S 1, further comprising: washing the copper foil in ethanol, acetone, and dilute hydrochlo r ic acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 11, wherein the graphene is deposited o n the su r face of the c o pper f o il by chemical vapor dep o siti on. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer is deposited o n the su r face of the graphene layer by electron beam evaporation o r magnetron sputtering. Original
1 5. The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
18. (C anceled) Canceled
19. The meth o d f o r manufactu ri ng the graphene thin-film transist o r of claim 18, wherein the supp ort layer comprises polyurethane. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene thin-film transistor (back-gate)
Materials described outside the worked examples.
graphene
metal layer (Ti/Au composite or single metal)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 0.1 nm | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,128,453Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a surface of a copper foil by chemical vapor deposition using methane as a carbon source; S2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a surface of the metal layer to form a graphene film; S 4: placing the graphene film in a copper etching solution, immersing the support layer partially in the copper etching solution, and immersing the metal layer, the graphene layer, and copper foil in the copper etching solution completely until the copper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S5: defining patterns of a source and a drain on the surface of the metal layer, manufacturing a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal layer comprises a first metal la y er and a second metal layer, the first metal la y er close to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the g raphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 1, wherein before S 1, the method further comprises: washing the copper foil in ethanol, acetone, and dilute hydrochloric acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer is deposited on the surface of the graphene layer by electron beam evaporation or magnetron sputtering. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
Canceled
The method f o r manufacturing the graphene thin-film transistor of claim 8, wherein the support layer comprises polyurethane. Original
A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a su r face of a c o pper f o il; S 2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a su r face of the metal layer to f o rm a graphene film; S 4: placing the graphene film in a c o pper etching s o luti o n, immersing the support layer partially in the c o pper etching s o luti o n, and immersing the metal layer, the graphene layer, and the c o pper f o il in the c o pper etching s o luti o n completely until the c o pper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S 5: defining patterns of a source and a drain on the surface of the metal layer, manufactu ri ng a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal la y er comprises a first metal la y er and a second metal la y er, the first metal la y er cl ose to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the graphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 11, before S 1, further comprising: washing the copper foil in ethanol, acetone, and dilute hydrochlo r ic acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 11, wherein the graphene is deposited o n the su r face of the c o pper f o il by chemical vapor dep o siti on. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer is deposited o n the su r face of the graphene layer by electron beam evaporation o r magnetron sputtering. Original
1 5. The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
18. (C anceled) Canceled
19. The meth o d f o r manufactu ri ng the graphene thin-film transist o r of claim 18, wherein the supp ort layer comprises polyurethane. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene thin-film transistor (back-gate)
Materials described outside the worked examples.
graphene
metal layer (Ti/Au composite or single metal)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 0.1 nm | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,128,453Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a surface of a copper foil by chemical vapor deposition using methane as a carbon source; S2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a surface of the metal layer to form a graphene film; S 4: placing the graphene film in a copper etching solution, immersing the support layer partially in the copper etching solution, and immersing the metal layer, the graphene layer, and copper foil in the copper etching solution completely until the copper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S5: defining patterns of a source and a drain on the surface of the metal layer, manufacturing a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal layer comprises a first metal la y er and a second metal layer, the first metal la y er close to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the g raphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 1, wherein before S 1, the method further comprises: washing the copper foil in ethanol, acetone, and dilute hydrochloric acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer is deposited on the surface of the graphene layer by electron beam evaporation or magnetron sputtering. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
Canceled
The method f o r manufacturing the graphene thin-film transistor of claim 8, wherein the support layer comprises polyurethane. Original
A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a su r face of a c o pper f o il; S 2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a su r face of the metal layer to f o rm a graphene film; S 4: placing the graphene film in a c o pper etching s o luti o n, immersing the support layer partially in the c o pper etching s o luti o n, and immersing the metal layer, the graphene layer, and the c o pper f o il in the c o pper etching s o luti o n completely until the c o pper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S 5: defining patterns of a source and a drain on the surface of the metal layer, manufactu ri ng a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal la y er comprises a first metal la y er and a second metal la y er, the first metal la y er cl ose to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the graphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 11, before S 1, further comprising: washing the copper foil in ethanol, acetone, and dilute hydrochlo r ic acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 11, wherein the graphene is deposited o n the su r face of the c o pper f o il by chemical vapor dep o siti on. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer is deposited o n the su r face of the graphene layer by electron beam evaporation o r magnetron sputtering. Original
1 5. The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
18. (C anceled) Canceled
19. The meth o d f o r manufactu ri ng the graphene thin-film transist o r of claim 18, wherein the supp ort layer comprises polyurethane. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene thin-film transistor (back-gate)
Materials described outside the worked examples.
graphene
metal layer (Ti/Au composite or single metal)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 0.1 nm | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,128,453Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a surface of a copper foil by chemical vapor deposition using methane as a carbon source; S2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a surface of the metal layer to form a graphene film; S 4: placing the graphene film in a copper etching solution, immersing the support layer partially in the copper etching solution, and immersing the metal layer, the graphene layer, and copper foil in the copper etching solution completely until the copper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S5: defining patterns of a source and a drain on the surface of the metal layer, manufacturing a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal layer comprises a first metal la y er and a second metal layer, the first metal la y er close to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the g raphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 1, wherein before S 1, the method further comprises: washing the copper foil in ethanol, acetone, and dilute hydrochloric acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer is deposited on the surface of the graphene layer by electron beam evaporation or magnetron sputtering. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The method for manufacturing the graphene thin-film transistor of claim 1, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
Canceled
The method f o r manufacturing the graphene thin-film transistor of claim 8, wherein the support layer comprises polyurethane. Original
A method for manufacturing a graphene thin-film transistor, comprising: Si: depositing a graphene layer on a su r face of a c o pper f o il; S 2: depositing a metal layer on a surface of the graphene layer; S 3: attaching a support layer to a su r face of the metal layer to f o rm a graphene film; S 4: placing the graphene film in a c o pper etching s o luti o n, immersing the support layer partially in the c o pper etching s o luti o n, and immersing the metal layer, the graphene layer, and the c o pper f o il in the c o pper etching s o luti o n completely until the c o pper foil is dissolved completely, then transferring the graphene film, from which the copper foil has been removed, to a target substrate, and removing the support layer, wherein a density of the support la y er is less than a density of the copper etching solution; and S 5: defining patterns of a source and a drain on the surface of the metal layer, manufactu ri ng a source electrode and a drain electrode, and manufacturing a gate electrode at a side of the target substrate away from the graphene layer, to obtain a graphene thin-film transistor; wherein the metal la y er comprises a first metal la y er and a second metal la y er, the first metal la y er cl ose to the surface of the graphene la y er is a titanium metal la y er, a nd the second metal la y er away from the surface of the graphene la y er is a gold metal la y er. Currently amended
The method for manufacturing the graphene thin-film transistor of claim 11, before S 1, further comprising: washing the copper foil in ethanol, acetone, and dilute hydrochlo r ic acid of 0.5 mol/L sequentially. Original
The method for manufacturing the graphene thin-film transistor of claim 11, wherein the graphene is deposited o n the su r face of the c o pper f o il by chemical vapor dep o siti on. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer is deposited o n the su r face of the graphene layer by electron beam evaporation o r magnetron sputtering. Original
1 5. The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the metal layer has a thickness of 5 nm⁻⁵⁰ nm. Original
The meth o d f o r manufacturing the graphene thin-film transist o r of claim 11, wherein the target substrate comprises an insulation layer, wherein a material of the insulation layer includes silicon dioxide, silicon carbide, glass, or sapphire. Original
18. (C anceled) Canceled
19. The meth o d f o r manufactu ri ng the graphene thin-film transist o r of claim 18, wherein the supp ort layer comprises polyurethane. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene thin-film transistor (back-gate)
Materials described outside the worked examples.
graphene
metal layer (Ti/Au composite or single metal)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, which is a schematic structure view of the graphene film in a method for manufacturing the graphene thin-film transistor according to the present …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 0.1 nm | — |
Related documents with shared materials, methods, properties, or citations.
Ti
gold
Au
support layer
copper foil
Cu
polyurethane
insulation layer (SiO2, SiC, glass, or sapphire)
methane
CH₄
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Ti
gold
Au
support layer
copper foil
Cu
polyurethane
insulation layer (SiO2, SiC, glass, or sapphire)
methane
CH₄
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Ti
gold
Au
support layer
copper foil
Cu
polyurethane
insulation layer (SiO2, SiC, glass, or sapphire)
methane
CH₄
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …
Ti
gold
Au
support layer
copper foil
Cu
polyurethane
insulation layer (SiO2, SiC, glass, or sapphire)
methane
CH₄
FIG. 3, for different drain voltages (Vd), all of the minimum values of the drain currents appears in the location of Vg = 0. This shows that the graphene in …