Patent
US 8,334,192METHOD OF FABRICATING GALLIUM NITRIDE SUBSTRATE
Jeong Sik Lee
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,334,192Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 and 2 are schematic views illustrating the bending of a GaN layer occurring in a growing process and a cooling process, respectively; [0024]
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
FIGS. 3A to 3 C are process views illustrating a method of fabricating a GaN substrate according to a first embodiment of the present invention; [0025]
FIGS. 4A to 4 C are process views illustrating a method of fabricating a GaN substrate according to a second embodiment of the present invention; and [0026]
FIGS. 5A and 5B are process views illustrating a method of fabricating a GaN substrate according to a third embodiment of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying, to the nitride embedding layer, a second temperature that is higher than the first temperature to the nitrid e embedding lay e r by and at which nitr o gen evap o rate s so that the indium-rich part is metalized, t o thereby forming a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step, are carried out in the order named, and the void forming step is carried out after the second step.
The method according to claim 1, wherein the void forming step is carried out after the second step and before the third step.
The method according to claim 1, wherein the second step, the third step and the void forming step are carried out in a growing reactor in an in-situ manner.
The method according to claim 1, wherein the nitride embedding layer is comprised of Al xGai-yTnyN (0<x<l -y, 0<y<l).
The method according to claim 1, wherein the first temperature is lower than the second temperature by 100 0C or more.
The method according to claim 1, wherein the first temperature ranges between 500 0C and 950 *C
The method according to claim 1, wherein the plurality of voids is non-uniformly distributed.
The method according to claim 1, wherein the plurality of voids has different sizes.
The method according to claim 1, wherein the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, 3 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multilayered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, the at least one GaN embedding layer is grown at the first temperature, the growing of all the nitride embedding layers precedes applying the second temperature to all the nitride embedding layers at the same time so that all the nitride embedding layers undergo the void forming step at the same time, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
The method according to claim 13, wherein at least one of the plurality of indium-rich parts formed in at least one of the nitride embedding layers combines with at least one of the plurality of indium-rich parts formed in another of the nitride embedding layers to form at least one larger void.
A method of fabricating a 5 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, and the G aN embedding layer is grown at the second temperature so that each of the nitride embedding layers independently undergoes the void forming step.
Embodiments described in the patent, grouped by the materials and process steps they use.
3 materials1 process step
A base substrate is prepared and placed in a growing reactor. A nitride embedding layer (AlxGa₁-yInyN, 0<x<1-y, 0<y<1) is grown on the base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts in the layer. A GaN layer is then grown on the nitride embedding layer at a second temperature (~1000°C, higher than the first by 100°C or more), which metallizes the indium in the indium-rich parts to form voids. The growth can be performed by HVPE, MOCVD, or MBE.
3 materials1 process step
A nitride embedding layer is grown on a base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts. After growth of the nitride embedding layer is complete, the temperature is elevated to a second temperature (higher than the first by 100°C or more) to metallize and evaporate the indium in the indium-rich parts, forming voids. A GaN layer is then grown on the nitride embedding layer. Growth is performed in the same reactor (HVPE, MOCVD, or MBE) in an in-situ manner.
Layer stacks claimed or described, ordered top of device to substrate.
GaN substrate with void-containing nitride embedding layer
Materials described outside the worked examples.
AlGaInN
InGaN
c-plane sapphire
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–950 °C | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,334,192Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 and 2 are schematic views illustrating the bending of a GaN layer occurring in a growing process and a cooling process, respectively; [0024]
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
FIGS. 3A to 3 C are process views illustrating a method of fabricating a GaN substrate according to a first embodiment of the present invention; [0025]
FIGS. 4A to 4 C are process views illustrating a method of fabricating a GaN substrate according to a second embodiment of the present invention; and [0026]
FIGS. 5A and 5B are process views illustrating a method of fabricating a GaN substrate according to a third embodiment of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying, to the nitride embedding layer, a second temperature that is higher than the first temperature to the nitrid e embedding lay e r by and at which nitr o gen evap o rate s so that the indium-rich part is metalized, t o thereby forming a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step, are carried out in the order named, and the void forming step is carried out after the second step.
The method according to claim 1, wherein the void forming step is carried out after the second step and before the third step.
The method according to claim 1, wherein the second step, the third step and the void forming step are carried out in a growing reactor in an in-situ manner.
The method according to claim 1, wherein the nitride embedding layer is comprised of Al xGai-yTnyN (0<x<l -y, 0<y<l).
The method according to claim 1, wherein the first temperature is lower than the second temperature by 100 0C or more.
The method according to claim 1, wherein the first temperature ranges between 500 0C and 950 *C
The method according to claim 1, wherein the plurality of voids is non-uniformly distributed.
The method according to claim 1, wherein the plurality of voids has different sizes.
The method according to claim 1, wherein the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, 3 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multilayered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, the at least one GaN embedding layer is grown at the first temperature, the growing of all the nitride embedding layers precedes applying the second temperature to all the nitride embedding layers at the same time so that all the nitride embedding layers undergo the void forming step at the same time, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
The method according to claim 13, wherein at least one of the plurality of indium-rich parts formed in at least one of the nitride embedding layers combines with at least one of the plurality of indium-rich parts formed in another of the nitride embedding layers to form at least one larger void.
A method of fabricating a 5 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, and the G aN embedding layer is grown at the second temperature so that each of the nitride embedding layers independently undergoes the void forming step.
Embodiments described in the patent, grouped by the materials and process steps they use.
3 materials1 process step
A base substrate is prepared and placed in a growing reactor. A nitride embedding layer (AlxGa₁-yInyN, 0<x<1-y, 0<y<1) is grown on the base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts in the layer. A GaN layer is then grown on the nitride embedding layer at a second temperature (~1000°C, higher than the first by 100°C or more), which metallizes the indium in the indium-rich parts to form voids. The growth can be performed by HVPE, MOCVD, or MBE.
3 materials1 process step
A nitride embedding layer is grown on a base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts. After growth of the nitride embedding layer is complete, the temperature is elevated to a second temperature (higher than the first by 100°C or more) to metallize and evaporate the indium in the indium-rich parts, forming voids. A GaN layer is then grown on the nitride embedding layer. Growth is performed in the same reactor (HVPE, MOCVD, or MBE) in an in-situ manner.
Layer stacks claimed or described, ordered top of device to substrate.
GaN substrate with void-containing nitride embedding layer
Materials described outside the worked examples.
AlGaInN
InGaN
c-plane sapphire
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–950 °C | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,334,192Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 and 2 are schematic views illustrating the bending of a GaN layer occurring in a growing process and a cooling process, respectively; [0024]
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
FIGS. 3A to 3 C are process views illustrating a method of fabricating a GaN substrate according to a first embodiment of the present invention; [0025]
FIGS. 4A to 4 C are process views illustrating a method of fabricating a GaN substrate according to a second embodiment of the present invention; and [0026]
FIGS. 5A and 5B are process views illustrating a method of fabricating a GaN substrate according to a third embodiment of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying, to the nitride embedding layer, a second temperature that is higher than the first temperature to the nitrid e embedding lay e r by and at which nitr o gen evap o rate s so that the indium-rich part is metalized, t o thereby forming a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step, are carried out in the order named, and the void forming step is carried out after the second step.
The method according to claim 1, wherein the void forming step is carried out after the second step and before the third step.
The method according to claim 1, wherein the second step, the third step and the void forming step are carried out in a growing reactor in an in-situ manner.
The method according to claim 1, wherein the nitride embedding layer is comprised of Al xGai-yTnyN (0<x<l -y, 0<y<l).
The method according to claim 1, wherein the first temperature is lower than the second temperature by 100 0C or more.
The method according to claim 1, wherein the first temperature ranges between 500 0C and 950 *C
The method according to claim 1, wherein the plurality of voids is non-uniformly distributed.
The method according to claim 1, wherein the plurality of voids has different sizes.
The method according to claim 1, wherein the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, 3 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multilayered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, the at least one GaN embedding layer is grown at the first temperature, the growing of all the nitride embedding layers precedes applying the second temperature to all the nitride embedding layers at the same time so that all the nitride embedding layers undergo the void forming step at the same time, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
The method according to claim 13, wherein at least one of the plurality of indium-rich parts formed in at least one of the nitride embedding layers combines with at least one of the plurality of indium-rich parts formed in another of the nitride embedding layers to form at least one larger void.
A method of fabricating a 5 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, and the G aN embedding layer is grown at the second temperature so that each of the nitride embedding layers independently undergoes the void forming step.
Embodiments described in the patent, grouped by the materials and process steps they use.
3 materials1 process step
A base substrate is prepared and placed in a growing reactor. A nitride embedding layer (AlxGa₁-yInyN, 0<x<1-y, 0<y<1) is grown on the base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts in the layer. A GaN layer is then grown on the nitride embedding layer at a second temperature (~1000°C, higher than the first by 100°C or more), which metallizes the indium in the indium-rich parts to form voids. The growth can be performed by HVPE, MOCVD, or MBE.
3 materials1 process step
A nitride embedding layer is grown on a base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts. After growth of the nitride embedding layer is complete, the temperature is elevated to a second temperature (higher than the first by 100°C or more) to metallize and evaporate the indium in the indium-rich parts, forming voids. A GaN layer is then grown on the nitride embedding layer. Growth is performed in the same reactor (HVPE, MOCVD, or MBE) in an in-situ manner.
Layer stacks claimed or described, ordered top of device to substrate.
GaN substrate with void-containing nitride embedding layer
Materials described outside the worked examples.
AlGaInN
InGaN
c-plane sapphire
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–950 °C | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,334,192Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 and 2 are schematic views illustrating the bending of a GaN layer occurring in a growing process and a cooling process, respectively; [0024]
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
FIGS. 3A to 3 C are process views illustrating a method of fabricating a GaN substrate according to a first embodiment of the present invention; [0025]
FIGS. 4A to 4 C are process views illustrating a method of fabricating a GaN substrate according to a second embodiment of the present invention; and [0026]
FIGS. 5A and 5B are process views illustrating a method of fabricating a GaN substrate according to a third embodiment of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying, to the nitride embedding layer, a second temperature that is higher than the first temperature to the nitrid e embedding lay e r by and at which nitr o gen evap o rate s so that the indium-rich part is metalized, t o thereby forming a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step, are carried out in the order named, and the void forming step is carried out after the second step.
The method according to claim 1, wherein the void forming step is carried out after the second step and before the third step.
The method according to claim 1, wherein the second step, the third step and the void forming step are carried out in a growing reactor in an in-situ manner.
The method according to claim 1, wherein the nitride embedding layer is comprised of Al xGai-yTnyN (0<x<l -y, 0<y<l).
The method according to claim 1, wherein the first temperature is lower than the second temperature by 100 0C or more.
The method according to claim 1, wherein the first temperature ranges between 500 0C and 950 *C
The method according to claim 1, wherein the plurality of voids is non-uniformly distributed.
The method according to claim 1, wherein the plurality of voids has different sizes.
The method according to claim 1, wherein the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, 3 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
A method of fabricating a gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multilayered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, the at least one GaN embedding layer is grown at the first temperature, the growing of all the nitride embedding layers precedes applying the second temperature to all the nitride embedding layers at the same time so that all the nitride embedding layers undergo the void forming step at the same time, and the GaN layer is grown at the second temperature so that the third step and the void forming step are carried out at the same time.
The method according to claim 13, wherein at least one of the plurality of indium-rich parts formed in at least one of the nitride embedding layers combines with at least one of the plurality of indium-rich parts formed in another of the nitride embedding layers to form at least one larger void.
A method of fabricating a 5 Application No.: 12/334,583 Docket No.: SA M SUN 3.0-043 gallium nitride (GaN) substrate, the method comprising: a first step of preparing a base substrate; a second step of growing a nitride embedding layer on the base substrate at a first temperature, the nitride embedding layer having a plurality of indium-rich parts; a third step of growing a GaN layer on the nitride embedding layer; and a void forming step of applying a second temperature higher than the first temperature to the nitride embedding layer so that the indium-rich part is metalized to form a plurality of voids in the nitride embedding layer, wherein the first step, the second step and the third step are carried out in the order named, the void forming step is carried out after the second step, the nitride embedding layer is multi-layered in such a manner that at least one GaN embedding layer is interposed between the nitride embedding layers, and the G aN embedding layer is grown at the second temperature so that each of the nitride embedding layers independently undergoes the void forming step.
Embodiments described in the patent, grouped by the materials and process steps they use.
3 materials1 process step
A base substrate is prepared and placed in a growing reactor. A nitride embedding layer (AlxGa₁-yInyN, 0<x<1-y, 0<y<1) is grown on the base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts in the layer. A GaN layer is then grown on the nitride embedding layer at a second temperature (~1000°C, higher than the first by 100°C or more), which metallizes the indium in the indium-rich parts to form voids. The growth can be performed by HVPE, MOCVD, or MBE.
3 materials1 process step
A nitride embedding layer is grown on a base substrate at a first temperature (500-950°C, preferably ~850°C), forming indium-rich parts. After growth of the nitride embedding layer is complete, the temperature is elevated to a second temperature (higher than the first by 100°C or more) to metallize and evaporate the indium in the indium-rich parts, forming voids. A GaN layer is then grown on the nitride embedding layer. Growth is performed in the same reactor (HVPE, MOCVD, or MBE) in an in-situ manner.
Layer stacks claimed or described, ordered top of device to substrate.
GaN substrate with void-containing nitride embedding layer
Materials described outside the worked examples.
AlGaInN
InGaN
c-plane sapphire
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2, bending occurs in the counter direction and stress is applied all over the GaN layer. Even after the GaN layer is separated from the sapphire …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–950 °C | — |
Related documents with shared materials, methods, properties, or citations.
a-plane or m-plane sapphire
a-plane or m-plane sapphire
a-plane or m-plane sapphire
a-plane or m-plane sapphire