Patent
Atlas literature
Patent
US 12,416,530 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a cross-sectional view of a structure includ- ing a negative temperature coefficient (NTC) resistor in a gallium nitride (GaN) technology setting, …
FIG. 2, according to alternative embodiments of the disclosure. It is noted that the drawings of the disclosure are not necessarily to scale. The drawings are …
FIG. 3 shows a schematic view of a structure including a temperature detection circuit including an NTC resistor and two temperature independent current …
FIG. 4 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 5 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 6 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 7 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: 45 a negative temperature coefficient (NTC) resistor includ-ing: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer.
The structure of claim 1, wherein the barrier layer includes aluminum gallium nitride (AlGaN) having an alu-minum (Al) mole fraction between 15-25%.
The structure of claim 1, wherein the pGaN layer and the first and second metal electrodes are adjacent a high electron mobility transistor (HEMT).
The structure of claim 1, wherein the isolation region includes an amorphizing dopant species including at least one of argon and nitrogen.
The structure of claim 1, wherein the isolation region is directly under the pGaN layer.
The structure of claim 1, wherein the barrier layer includes a portion directly under the pGaN layer, and the isolation region surrounds the portion of the barrier layer.
The structure of claim 1, wherein the NTC resistor is part of a temperature detection circuit including: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A structure, comprising: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source.
The structure of claim 11, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
The structure of claim 11, wherein the first tempera-ture independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-tem-perature coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source.
The structure of claim 11, wherein the NTC resistor includes: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including 5 a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and at least two spaced-apart metallic electrodes on the pGaN layer.
A structure, comprising: 25 a first temperature independent current source and a second temperature independent current source, wherein the first temperature independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-temperature B₂ coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A negative temperature coefficient (NTC) resistor, comprising: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
negative temperature coefficient (NTC) resistor
Materials described outside the worked examples.
p-type doped gallium nitride
pGaN
gallium nitride channel layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 15–20 nm | — |
Pressure | ≤ 35 bar |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,416,530 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a cross-sectional view of a structure includ- ing a negative temperature coefficient (NTC) resistor in a gallium nitride (GaN) technology setting, …
FIG. 2, according to alternative embodiments of the disclosure. It is noted that the drawings of the disclosure are not necessarily to scale. The drawings are …
FIG. 3 shows a schematic view of a structure including a temperature detection circuit including an NTC resistor and two temperature independent current …
FIG. 4 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 5 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 6 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 7 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: 45 a negative temperature coefficient (NTC) resistor includ-ing: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer.
The structure of claim 1, wherein the barrier layer includes aluminum gallium nitride (AlGaN) having an alu-minum (Al) mole fraction between 15-25%.
The structure of claim 1, wherein the pGaN layer and the first and second metal electrodes are adjacent a high electron mobility transistor (HEMT).
The structure of claim 1, wherein the isolation region includes an amorphizing dopant species including at least one of argon and nitrogen.
The structure of claim 1, wherein the isolation region is directly under the pGaN layer.
The structure of claim 1, wherein the barrier layer includes a portion directly under the pGaN layer, and the isolation region surrounds the portion of the barrier layer.
The structure of claim 1, wherein the NTC resistor is part of a temperature detection circuit including: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A structure, comprising: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source.
The structure of claim 11, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
The structure of claim 11, wherein the first tempera-ture independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-tem-perature coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source.
The structure of claim 11, wherein the NTC resistor includes: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including 5 a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and at least two spaced-apart metallic electrodes on the pGaN layer.
A structure, comprising: 25 a first temperature independent current source and a second temperature independent current source, wherein the first temperature independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-temperature B₂ coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A negative temperature coefficient (NTC) resistor, comprising: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
negative temperature coefficient (NTC) resistor
Materials described outside the worked examples.
p-type doped gallium nitride
pGaN
gallium nitride channel layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 15–20 nm | — |
Pressure | ≤ 35 bar |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,416,530 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a cross-sectional view of a structure includ- ing a negative temperature coefficient (NTC) resistor in a gallium nitride (GaN) technology setting, …
FIG. 2, according to alternative embodiments of the disclosure. It is noted that the drawings of the disclosure are not necessarily to scale. The drawings are …
FIG. 3 shows a schematic view of a structure including a temperature detection circuit including an NTC resistor and two temperature independent current …
FIG. 4 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 5 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 6 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 7 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: 45 a negative temperature coefficient (NTC) resistor includ-ing: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer.
The structure of claim 1, wherein the barrier layer includes aluminum gallium nitride (AlGaN) having an alu-minum (Al) mole fraction between 15-25%.
The structure of claim 1, wherein the pGaN layer and the first and second metal electrodes are adjacent a high electron mobility transistor (HEMT).
The structure of claim 1, wherein the isolation region includes an amorphizing dopant species including at least one of argon and nitrogen.
The structure of claim 1, wherein the isolation region is directly under the pGaN layer.
The structure of claim 1, wherein the barrier layer includes a portion directly under the pGaN layer, and the isolation region surrounds the portion of the barrier layer.
The structure of claim 1, wherein the NTC resistor is part of a temperature detection circuit including: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A structure, comprising: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source.
The structure of claim 11, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
The structure of claim 11, wherein the first tempera-ture independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-tem-perature coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source.
The structure of claim 11, wherein the NTC resistor includes: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including 5 a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and at least two spaced-apart metallic electrodes on the pGaN layer.
A structure, comprising: 25 a first temperature independent current source and a second temperature independent current source, wherein the first temperature independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-temperature B₂ coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A negative temperature coefficient (NTC) resistor, comprising: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
negative temperature coefficient (NTC) resistor
Materials described outside the worked examples.
p-type doped gallium nitride
pGaN
gallium nitride channel layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 15–20 nm | — |
Pressure | ≤ 35 bar |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,416,530 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a cross-sectional view of a structure includ- ing a negative temperature coefficient (NTC) resistor in a gallium nitride (GaN) technology setting, …
FIG. 2, according to alternative embodiments of the disclosure. It is noted that the drawings of the disclosure are not necessarily to scale. The drawings are …
FIG. 3 shows a schematic view of a structure including a temperature detection circuit including an NTC resistor and two temperature independent current …
FIG. 4 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 5 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 6 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
FIG. 7 shows a cross-sectional view of a structure includ- ing parts of the temperature detection circuit and the NTC resistor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: 45 a negative temperature coefficient (NTC) resistor includ-ing: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer.
The structure of claim 1, wherein the barrier layer includes aluminum gallium nitride (AlGaN) having an alu-minum (Al) mole fraction between 15-25%.
The structure of claim 1, wherein the pGaN layer and the first and second metal electrodes are adjacent a high electron mobility transistor (HEMT).
The structure of claim 1, wherein the isolation region includes an amorphizing dopant species including at least one of argon and nitrogen.
The structure of claim 1, wherein the isolation region is directly under the pGaN layer.
The structure of claim 1, wherein the barrier layer includes a portion directly under the pGaN layer, and the isolation region surrounds the portion of the barrier layer.
The structure of claim 1, wherein the NTC resistor is part of a temperature detection circuit including: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A structure, comprising: a first temperature independent current source; a second temperature independent current source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source.
The structure of claim 11, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
The structure of claim 11, wherein the first tempera-ture independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-tem-perature coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source.
The structure of claim 11, wherein the NTC resistor includes: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including 5 a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and at least two spaced-apart metallic electrodes on the pGaN layer.
A structure, comprising: 25 a first temperature independent current source and a second temperature independent current source, wherein the first temperature independent current source and the second temperature independent current source each include a depletion mode HEMT (DM HEMT) having a gate, a first source/drain region and a second source/drain region, and a zero-temperature B₂ coefficient (ZTC) resistor coupled between the first source/drain region and the gate of the DM HEMT, wherein the second source/drain region of the DM HEMT is coupled to a voltage source; an enhancement mode high electron mobility transistor (EM HEMT) having a gate, a first source/drain region and a second source/drain region; a negative temperature coefficient (NTC) resistor includ-ing a first metal electrode and a second metal electrode; a first node coupling the first temperature independent current source, the first metal electrode of the NTC resistor and the gate of the EM HEMT; a second node coupling the first source/drain region of the EM HEMT and the second metal electrode of the NTC resistor to ground; and an output node coupling the second source/drain region of the EM HEMT and the second temperature indepen-dent current source, wherein in response to a temperature crossing a threshold, a voltage change at the NTC resistor and at the gate of EM HEMT causes the EM HEMT to change states.
A negative temperature coefficient (NTC) resistor, comprising: a p-type doped gallium nitride (pGaN) layer; a gallium nitride (GaN) heterojunction structure under the pGaN layer, the GaN heterojunction structure including a barrier layer and a channel layer; an isolation region extending across an interface of the barrier layer and the channel layer; and a first metal electrode on the pGaN layer spaced from a second metal electrode on the pGaN layer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
negative temperature coefficient (NTC) resistor
Materials described outside the worked examples.
p-type doped gallium nitride
pGaN
gallium nitride channel layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 15–20 nm | — |
Pressure | ≤ 35 bar |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
high electron mobility transistor (HEMT) adjacent NTC resistor
No layer stack recorded.
enhancement mode high electron mobility transistor (EM HEMT)
No layer stack recorded.
depletion mode HEMT (DM HEMT) temperature independent current source with ZTC resistor
No layer stack recorded.
aluminum gallium nitride barrier layer
AlGaN
amorphizing dopant species (argon and/or nitrogen)
silicon-chromium
SiCr
silicon carbide substrate
SiC
| — |
Cited non-patent literature · 3
AlN BUFFER N-POLAR GaN HEMT PROFILE
high electron mobility transistor (HEMT) adjacent NTC resistor
No layer stack recorded.
enhancement mode high electron mobility transistor (EM HEMT)
No layer stack recorded.
depletion mode HEMT (DM HEMT) temperature independent current source with ZTC resistor
No layer stack recorded.
aluminum gallium nitride barrier layer
AlGaN
amorphizing dopant species (argon and/or nitrogen)
silicon-chromium
SiCr
silicon carbide substrate
SiC
| — |
Cited non-patent literature · 3
AlN BUFFER N-POLAR GaN HEMT PROFILE
high electron mobility transistor (HEMT) adjacent NTC resistor
No layer stack recorded.
enhancement mode high electron mobility transistor (EM HEMT)
No layer stack recorded.
depletion mode HEMT (DM HEMT) temperature independent current source with ZTC resistor
No layer stack recorded.
aluminum gallium nitride barrier layer
AlGaN
amorphizing dopant species (argon and/or nitrogen)
silicon-chromium
SiCr
silicon carbide substrate
SiC
| — |
Cited non-patent literature · 3
AlN BUFFER N-POLAR GaN HEMT PROFILE
high electron mobility transistor (HEMT) adjacent NTC resistor
No layer stack recorded.
enhancement mode high electron mobility transistor (EM HEMT)
No layer stack recorded.
depletion mode HEMT (DM HEMT) temperature independent current source with ZTC resistor
No layer stack recorded.
aluminum gallium nitride barrier layer
AlGaN
amorphizing dopant species (argon and/or nitrogen)
silicon-chromium
SiCr
silicon carbide substrate
SiC
| — |
Cited non-patent literature · 3
