Patent
US 8,685,844SUB-10 NM GRAPHENE NANORIBBON LATTICES
Christos D. Dimitrakopoulos
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,685,844Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a pictorial representation (through a cross sectional view) illustrating a structure including a blanket layer of graphene formed on an exposed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a structure including a substrate, and a blanket layer of silicon carbide …
FIG. 10 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 11 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 12 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 13 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 14 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 15 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 16 is a pictorial representation (though a cross sectional view) illustrating the structure of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a semiconductor structure comprising: forming a blanket layer of graphene on an exposed surface of a copper substrate; forming a blanket layer of aluminum on an exposed surface of the blanket layer of graphene; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of the first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of graphene using said plurality of alumina portions as an etch mask to provide a graphene lattice comprising an ordered array of graphene nanoribbons, each graphene nanoribbon within said ordered array having a width of less than 10 nm; removing said etch mask; and transferring said ordered a rr ay of graphene nanoribbons to a substrate.
The method of Claim 1, wherein said forming the blanket layer of graphene comprises chemical vapor deposition.
The method of Claim 1, wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 24 of 28 4. The method of Claim 1, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 1, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 1, wherein each of alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of graphene.
The method of Claim 1, wherein said removing the adjacent amorphous alumina portions comprises etching with an acid.
The method of Claim 1, wherein the removing the exposed portions of the blanket layer of graphene comprises etching with an oxygen plasma.
The method of Claim 1, wherein said removing said etch mask comprises a wet etch process.
The method of Claim 1, wherein said transferring the ordered a rr ay of graphene nanoribbons to the substrate comprises: applying a transfer substrate to a surface of said copper substrate that includes said ordered a rr ay of graphene nanoribbons located thereon; removing the copper substrate; bonding exposed portions of each of said graphene nanoribbons of said ordered array of graphene nanoribbons to an exposed surface of the substrate; and removing said transfer substrate.
The method of Claim 1, wherein said copper substrate comprises a copper foil.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 25 of 28 13. A method of forming a semiconductor structure comprising: providing a structure comprising, from bottom to top, a blanket layer of silicon carbide, a blanket layer of titanium located on an exposed surface of the blanket layer of silicon carbide, and a blanket layer of aluminum on an exposed surface of the blanket layer of titanium; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of titanium and underlying portions of the blanker layer of silicon carbide using said plurality of alumina portions as an etch mask to provide an ordered a rr ay of silicon carbide portions, each silicon carbide portion having said width of said alumina portion of first density; removing said etch mask and remaining portions of said blanket layer of titanium; and forming a layer of graphene on all exposed surface of each of said silicon carbide portions, wherein each layer of graphene has a width of less than 10 nm.
The method of Claim 13, wherein said providing the structure further comprises a handle substrate beneath said blanket layer of silicon carbide.
The method of Claim 13, wherein said wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 26 of 28 16. The method of Claim 13, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 13, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 13, wherein each of said alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of titanium.
The method of Claim 13, wherein said removing exposed portions of the blanket layer of titanium and said underlying portions of the blanker layer of silicon carbide comprise reactive ion etching.
The method of Claim 13, wherein said removing said etch mask and said remaining portions of said blanket layer of titanium comprises etching.
The method of Claim 13, wherein said forming the layer of graphene comprises chemical vapor deposition.
The method of Claim 13, wherein said layer of graphene is located on the topmost surface and sidewall surfaces of said each of said silicon carbide portions.
Layer stacks claimed or described, ordered top of device to substrate.
ordered array of graphene nanoribbons on substrate (CVD graphene route)
ordered array of graphene nanoribbons on SiC nanostructures (SiC sublimation route)
Materials described outside the worked examples.
graphene
C
aluminum
Al
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Temperature |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,685,844Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a pictorial representation (through a cross sectional view) illustrating a structure including a blanket layer of graphene formed on an exposed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a structure including a substrate, and a blanket layer of silicon carbide …
FIG. 10 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 11 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 12 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 13 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 14 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 15 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 16 is a pictorial representation (though a cross sectional view) illustrating the structure of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a semiconductor structure comprising: forming a blanket layer of graphene on an exposed surface of a copper substrate; forming a blanket layer of aluminum on an exposed surface of the blanket layer of graphene; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of the first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of graphene using said plurality of alumina portions as an etch mask to provide a graphene lattice comprising an ordered array of graphene nanoribbons, each graphene nanoribbon within said ordered array having a width of less than 10 nm; removing said etch mask; and transferring said ordered a rr ay of graphene nanoribbons to a substrate.
The method of Claim 1, wherein said forming the blanket layer of graphene comprises chemical vapor deposition.
The method of Claim 1, wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 24 of 28 4. The method of Claim 1, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 1, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 1, wherein each of alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of graphene.
The method of Claim 1, wherein said removing the adjacent amorphous alumina portions comprises etching with an acid.
The method of Claim 1, wherein the removing the exposed portions of the blanket layer of graphene comprises etching with an oxygen plasma.
The method of Claim 1, wherein said removing said etch mask comprises a wet etch process.
The method of Claim 1, wherein said transferring the ordered a rr ay of graphene nanoribbons to the substrate comprises: applying a transfer substrate to a surface of said copper substrate that includes said ordered a rr ay of graphene nanoribbons located thereon; removing the copper substrate; bonding exposed portions of each of said graphene nanoribbons of said ordered array of graphene nanoribbons to an exposed surface of the substrate; and removing said transfer substrate.
The method of Claim 1, wherein said copper substrate comprises a copper foil.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 25 of 28 13. A method of forming a semiconductor structure comprising: providing a structure comprising, from bottom to top, a blanket layer of silicon carbide, a blanket layer of titanium located on an exposed surface of the blanket layer of silicon carbide, and a blanket layer of aluminum on an exposed surface of the blanket layer of titanium; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of titanium and underlying portions of the blanker layer of silicon carbide using said plurality of alumina portions as an etch mask to provide an ordered a rr ay of silicon carbide portions, each silicon carbide portion having said width of said alumina portion of first density; removing said etch mask and remaining portions of said blanket layer of titanium; and forming a layer of graphene on all exposed surface of each of said silicon carbide portions, wherein each layer of graphene has a width of less than 10 nm.
The method of Claim 13, wherein said providing the structure further comprises a handle substrate beneath said blanket layer of silicon carbide.
The method of Claim 13, wherein said wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 26 of 28 16. The method of Claim 13, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 13, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 13, wherein each of said alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of titanium.
The method of Claim 13, wherein said removing exposed portions of the blanket layer of titanium and said underlying portions of the blanker layer of silicon carbide comprise reactive ion etching.
The method of Claim 13, wherein said removing said etch mask and said remaining portions of said blanket layer of titanium comprises etching.
The method of Claim 13, wherein said forming the layer of graphene comprises chemical vapor deposition.
The method of Claim 13, wherein said layer of graphene is located on the topmost surface and sidewall surfaces of said each of said silicon carbide portions.
Layer stacks claimed or described, ordered top of device to substrate.
ordered array of graphene nanoribbons on substrate (CVD graphene route)
ordered array of graphene nanoribbons on SiC nanostructures (SiC sublimation route)
Materials described outside the worked examples.
graphene
C
aluminum
Al
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Temperature |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,685,844Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a pictorial representation (through a cross sectional view) illustrating a structure including a blanket layer of graphene formed on an exposed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a structure including a substrate, and a blanket layer of silicon carbide …
FIG. 10 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 11 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 12 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 13 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 14 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 15 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 16 is a pictorial representation (though a cross sectional view) illustrating the structure of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a semiconductor structure comprising: forming a blanket layer of graphene on an exposed surface of a copper substrate; forming a blanket layer of aluminum on an exposed surface of the blanket layer of graphene; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of the first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of graphene using said plurality of alumina portions as an etch mask to provide a graphene lattice comprising an ordered array of graphene nanoribbons, each graphene nanoribbon within said ordered array having a width of less than 10 nm; removing said etch mask; and transferring said ordered a rr ay of graphene nanoribbons to a substrate.
The method of Claim 1, wherein said forming the blanket layer of graphene comprises chemical vapor deposition.
The method of Claim 1, wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 24 of 28 4. The method of Claim 1, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 1, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 1, wherein each of alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of graphene.
The method of Claim 1, wherein said removing the adjacent amorphous alumina portions comprises etching with an acid.
The method of Claim 1, wherein the removing the exposed portions of the blanket layer of graphene comprises etching with an oxygen plasma.
The method of Claim 1, wherein said removing said etch mask comprises a wet etch process.
The method of Claim 1, wherein said transferring the ordered a rr ay of graphene nanoribbons to the substrate comprises: applying a transfer substrate to a surface of said copper substrate that includes said ordered a rr ay of graphene nanoribbons located thereon; removing the copper substrate; bonding exposed portions of each of said graphene nanoribbons of said ordered array of graphene nanoribbons to an exposed surface of the substrate; and removing said transfer substrate.
The method of Claim 1, wherein said copper substrate comprises a copper foil.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 25 of 28 13. A method of forming a semiconductor structure comprising: providing a structure comprising, from bottom to top, a blanket layer of silicon carbide, a blanket layer of titanium located on an exposed surface of the blanket layer of silicon carbide, and a blanket layer of aluminum on an exposed surface of the blanket layer of titanium; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of titanium and underlying portions of the blanker layer of silicon carbide using said plurality of alumina portions as an etch mask to provide an ordered a rr ay of silicon carbide portions, each silicon carbide portion having said width of said alumina portion of first density; removing said etch mask and remaining portions of said blanket layer of titanium; and forming a layer of graphene on all exposed surface of each of said silicon carbide portions, wherein each layer of graphene has a width of less than 10 nm.
The method of Claim 13, wherein said providing the structure further comprises a handle substrate beneath said blanket layer of silicon carbide.
The method of Claim 13, wherein said wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 26 of 28 16. The method of Claim 13, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 13, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 13, wherein each of said alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of titanium.
The method of Claim 13, wherein said removing exposed portions of the blanket layer of titanium and said underlying portions of the blanker layer of silicon carbide comprise reactive ion etching.
The method of Claim 13, wherein said removing said etch mask and said remaining portions of said blanket layer of titanium comprises etching.
The method of Claim 13, wherein said forming the layer of graphene comprises chemical vapor deposition.
The method of Claim 13, wherein said layer of graphene is located on the topmost surface and sidewall surfaces of said each of said silicon carbide portions.
Layer stacks claimed or described, ordered top of device to substrate.
ordered array of graphene nanoribbons on substrate (CVD graphene route)
ordered array of graphene nanoribbons on SiC nanostructures (SiC sublimation route)
Materials described outside the worked examples.
graphene
C
aluminum
Al
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Temperature |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,685,844Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a pictorial representation (through a cross sectional view) illustrating a structure including a blanket layer of graphene formed on an exposed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a structure including a substrate, and a blanket layer of silicon carbide …
FIG. 10 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 11 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 12 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 13 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 14 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 15 is a pictorial representation (though a cross sectional view) illustrating the structure of
FIG. 16 is a pictorial representation (though a cross sectional view) illustrating the structure of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a semiconductor structure comprising: forming a blanket layer of graphene on an exposed surface of a copper substrate; forming a blanket layer of aluminum on an exposed surface of the blanket layer of graphene; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of the first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of graphene using said plurality of alumina portions as an etch mask to provide a graphene lattice comprising an ordered array of graphene nanoribbons, each graphene nanoribbon within said ordered array having a width of less than 10 nm; removing said etch mask; and transferring said ordered a rr ay of graphene nanoribbons to a substrate.
The method of Claim 1, wherein said forming the blanket layer of graphene comprises chemical vapor deposition.
The method of Claim 1, wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 24 of 28 4. The method of Claim 1, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 1, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 1, wherein each of alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of graphene.
The method of Claim 1, wherein said removing the adjacent amorphous alumina portions comprises etching with an acid.
The method of Claim 1, wherein the removing the exposed portions of the blanket layer of graphene comprises etching with an oxygen plasma.
The method of Claim 1, wherein said removing said etch mask comprises a wet etch process.
The method of Claim 1, wherein said transferring the ordered a rr ay of graphene nanoribbons to the substrate comprises: applying a transfer substrate to a surface of said copper substrate that includes said ordered a rr ay of graphene nanoribbons located thereon; removing the copper substrate; bonding exposed portions of each of said graphene nanoribbons of said ordered array of graphene nanoribbons to an exposed surface of the substrate; and removing said transfer substrate.
The method of Claim 1, wherein said copper substrate comprises a copper foil.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 25 of 28 13. A method of forming a semiconductor structure comprising: providing a structure comprising, from bottom to top, a blanket layer of silicon carbide, a blanket layer of titanium located on an exposed surface of the blanket layer of silicon carbide, and a blanket layer of aluminum on an exposed surface of the blanket layer of titanium; pre-patterning the blanket layer of aluminum to form a plurality of regularly spaced pits within the blanket layer of aluminum; conve rt ing the pre-patterned blanket layer of aluminum having said plurality of regularly spaced pits into a layer of porous anodized alumina, said layer of porous anodized alumina comprising a plurality of alumina portions of a first density and having an ordered lattice arr angement, and amorphous alumina portions of a second density that are adjacent to said alumina portions of first density, wherein said first density is greater than the second density; removing the adjacent amorphous alumina portions from said layer of porous anodized alumina, wherein the remaining plurality of alumina portions each has a width of less than 10 nm; removing exposed portions of the blanket layer of titanium and underlying portions of the blanker layer of silicon carbide using said plurality of alumina portions as an etch mask to provide an ordered a rr ay of silicon carbide portions, each silicon carbide portion having said width of said alumina portion of first density; removing said etch mask and remaining portions of said blanket layer of titanium; and forming a layer of graphene on all exposed surface of each of said silicon carbide portions, wherein each layer of graphene has a width of less than 10 nm.
The method of Claim 13, wherein said providing the structure further comprises a handle substrate beneath said blanket layer of silicon carbide.
The method of Claim 13, wherein said wherein said forming the layer of aluminum comprises atomic layer deposition.
YO R₉₂₀₁₂₀₁₄₆US₁ Page 26 of 28 16. The method of Claim 13, wherein said pre-patterning said blanket layer of aluminum comprises nanoimprintation or interference lithography and etching.
The method of Claim 13, wherein said converting the pre-patterned blanket layer of aluminum comprises anozidation at a potential from 8 Volts to 500 Volts.
The method of Claim 13, wherein each of said alumina portions having said first density has a bottommost surface in contact with an uppermost surface of said blanket layer of titanium.
The method of Claim 13, wherein said removing exposed portions of the blanket layer of titanium and said underlying portions of the blanker layer of silicon carbide comprise reactive ion etching.
The method of Claim 13, wherein said removing said etch mask and said remaining portions of said blanket layer of titanium comprises etching.
The method of Claim 13, wherein said forming the layer of graphene comprises chemical vapor deposition.
The method of Claim 13, wherein said layer of graphene is located on the topmost surface and sidewall surfaces of said each of said silicon carbide portions.
Layer stacks claimed or described, ordered top of device to substrate.
ordered array of graphene nanoribbons on substrate (CVD graphene route)
ordered array of graphene nanoribbons on SiC nanostructures (SiC sublimation route)
Materials described outside the worked examples.
graphene
C
aluminum
Al
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Temperature |
Related documents with shared materials, methods, properties, or citations.
porous anodized alumina
Al₂O₃
copper substrate
Cu
silicon carbide
SiC
titanium
Ti
titanium oxide
| 800–1080 °C |
| — |
Thickness | 0.34–0.8 nm | — |
Thickness | 0.7–3.4 nm | — |
Thickness | 50–500 nm | — |
Thickness | 100–1000 nm | — |
Thickness | 3–10 nm | — |
Thickness | 5–50 nm | — |
Thickness | 45–100 nm | — |
Thickness | 100–200 nm | — |
Thickness | 200–500 nm | — |
Thickness | 7–55 nm | — |
Thickness | 4–9 nm | — |
Thickness | 5–100 nm | — |
Thickness | 50–1000 nm | — |
Thickness | ≤ 10 nm | — |
METHOD FOR CONTINUOUS PRODUCTION OF HIGH QUALITY GRAPHENE
porous anodized alumina
Al₂O₃
copper substrate
Cu
silicon carbide
SiC
titanium
Ti
titanium oxide
| 800–1080 °C |
| — |
Thickness | 0.34–0.8 nm | — |
Thickness | 0.7–3.4 nm | — |
Thickness | 50–500 nm | — |
Thickness | 100–1000 nm | — |
Thickness | 3–10 nm | — |
Thickness | 5–50 nm | — |
Thickness | 45–100 nm | — |
Thickness | 100–200 nm | — |
Thickness | 200–500 nm | — |
Thickness | 7–55 nm | — |
Thickness | 4–9 nm | — |
Thickness | 5–100 nm | — |
Thickness | 50–1000 nm | — |
Thickness | ≤ 10 nm | — |
METHOD FOR CONTINUOUS PRODUCTION OF HIGH QUALITY GRAPHENE
porous anodized alumina
Al₂O₃
copper substrate
Cu
silicon carbide
SiC
titanium
Ti
titanium oxide
| 800–1080 °C |
| — |
Thickness | 0.34–0.8 nm | — |
Thickness | 0.7–3.4 nm | — |
Thickness | 50–500 nm | — |
Thickness | 100–1000 nm | — |
Thickness | 3–10 nm | — |
Thickness | 5–50 nm | — |
Thickness | 45–100 nm | — |
Thickness | 100–200 nm | — |
Thickness | 200–500 nm | — |
Thickness | 7–55 nm | — |
Thickness | 4–9 nm | — |
Thickness | 5–100 nm | — |
Thickness | 50–1000 nm | — |
Thickness | ≤ 10 nm | — |
METHOD FOR CONTINUOUS PRODUCTION OF HIGH QUALITY GRAPHENE
porous anodized alumina
Al₂O₃
copper substrate
Cu
silicon carbide
SiC
titanium
Ti
titanium oxide
| 800–1080 °C |
| — |
Thickness | 0.34–0.8 nm | — |
Thickness | 0.7–3.4 nm | — |
Thickness | 50–500 nm | — |
Thickness | 100–1000 nm | — |
Thickness | 3–10 nm | — |
Thickness | 5–50 nm | — |
Thickness | 45–100 nm | — |
Thickness | 100–200 nm | — |
Thickness | 200–500 nm | — |
Thickness | 7–55 nm | — |
Thickness | 4–9 nm | — |
Thickness | 5–100 nm | — |
Thickness | 50–1000 nm | — |
Thickness | ≤ 10 nm | — |
METHOD FOR CONTINUOUS PRODUCTION OF HIGH QUALITY GRAPHENE