Patent
US 11,955,251 B2CRYSTAL AND SUBSTRATE OF CONDUCTIVE GAAS, AND METHOD FOR FORMING THE SAME
Takashi Sakurada, Tomohiro Kawase
Sumitomo Electric Industries, Ltd., Osaka (JP)·Apr. 9, 2024·US
Copyright © 2026 Matter42. All rights reserved.
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Atlas literature
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US 11,955,251 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A conductive GaAs single crystal substrate cut from a conductive GaAs single crystal, comprising: a polished mirror surface; an atomic concentration of Si being more than 1×1017 cm⁻³; and a density of precipitates having sizes of at least 30 nm being at most 400 cm⁻²; wherein on the polished mirror surface a density of microscopic defects having sizes of at least 0.265 µm measured by a surface particle inspection device is at most 0.3 cm⁻², and an average dislocation density of the substrate is at most 92 cm⁻², and dopants contained in the substrate consist of Si.
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 300 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 100 cm⁻² and in the mirror surface the density of microscopic defects having sizes of at least 0.265 µm measured by the surface particle inspection device is at most 0.1 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates is measured by an infrared-ray scattering.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 4-inch.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 6-inch. 11 12
The conductive GaAs single crystal substrate according to claim 1, wherein the substrate is for a laser device.
The conductive GaAs single crystal substrate according to claim 1, further comprising an epitaxial layer stacked thereon.
A laser device comprising: the conductive GaAs single crystal substrate according to claim 1; and an epitaxial layer stacked on the conductive GaAs single crystal substrate. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials2 process steps
GaAs single crystals were grown using a vertical Bridgman method. A pBN crucible with ~4-inch body diameter was loaded with ~10 kg of six-nines purity GaAs polycrystals and high-purity Si dopant. After single crystal growth, post-annealing was performed in the growth furnace at a prescribed temperature for a prescribed time, followed by cooling to 900°C at ~20°C/hr and then to 500°C at ~50°C/hr. Substrates were cut and polished to a mirror surface and characterized for precipitate density (by IR scattering), microscopic defect density (by surface particle inspection device, threshold 0.265 µm), and dislocation density.
Layer stacks claimed or described, ordered top of device to substrate.
conductive GaAs single crystal substrate
laser device with conductive GaAs substrate and epitaxial layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Si atomic concentration in conductive GaAs crystal | ≥ 100000000000000000 | GaAs |
Density of precipitates (>=30 nm) in conductive GaAs substrate | ≤ 400 |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 19
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,955,251 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A conductive GaAs single crystal substrate cut from a conductive GaAs single crystal, comprising: a polished mirror surface; an atomic concentration of Si being more than 1×1017 cm⁻³; and a density of precipitates having sizes of at least 30 nm being at most 400 cm⁻²; wherein on the polished mirror surface a density of microscopic defects having sizes of at least 0.265 µm measured by a surface particle inspection device is at most 0.3 cm⁻², and an average dislocation density of the substrate is at most 92 cm⁻², and dopants contained in the substrate consist of Si.
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 300 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 100 cm⁻² and in the mirror surface the density of microscopic defects having sizes of at least 0.265 µm measured by the surface particle inspection device is at most 0.1 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates is measured by an infrared-ray scattering.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 4-inch.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 6-inch. 11 12
The conductive GaAs single crystal substrate according to claim 1, wherein the substrate is for a laser device.
The conductive GaAs single crystal substrate according to claim 1, further comprising an epitaxial layer stacked thereon.
A laser device comprising: the conductive GaAs single crystal substrate according to claim 1; and an epitaxial layer stacked on the conductive GaAs single crystal substrate. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials2 process steps
GaAs single crystals were grown using a vertical Bridgman method. A pBN crucible with ~4-inch body diameter was loaded with ~10 kg of six-nines purity GaAs polycrystals and high-purity Si dopant. After single crystal growth, post-annealing was performed in the growth furnace at a prescribed temperature for a prescribed time, followed by cooling to 900°C at ~20°C/hr and then to 500°C at ~50°C/hr. Substrates were cut and polished to a mirror surface and characterized for precipitate density (by IR scattering), microscopic defect density (by surface particle inspection device, threshold 0.265 µm), and dislocation density.
Layer stacks claimed or described, ordered top of device to substrate.
conductive GaAs single crystal substrate
laser device with conductive GaAs substrate and epitaxial layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Si atomic concentration in conductive GaAs crystal | ≥ 100000000000000000 | GaAs |
Density of precipitates (>=30 nm) in conductive GaAs substrate | ≤ 400 |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 19
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,955,251 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A conductive GaAs single crystal substrate cut from a conductive GaAs single crystal, comprising: a polished mirror surface; an atomic concentration of Si being more than 1×1017 cm⁻³; and a density of precipitates having sizes of at least 30 nm being at most 400 cm⁻²; wherein on the polished mirror surface a density of microscopic defects having sizes of at least 0.265 µm measured by a surface particle inspection device is at most 0.3 cm⁻², and an average dislocation density of the substrate is at most 92 cm⁻², and dopants contained in the substrate consist of Si.
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 300 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 100 cm⁻² and in the mirror surface the density of microscopic defects having sizes of at least 0.265 µm measured by the surface particle inspection device is at most 0.1 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates is measured by an infrared-ray scattering.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 4-inch.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 6-inch. 11 12
The conductive GaAs single crystal substrate according to claim 1, wherein the substrate is for a laser device.
The conductive GaAs single crystal substrate according to claim 1, further comprising an epitaxial layer stacked thereon.
A laser device comprising: the conductive GaAs single crystal substrate according to claim 1; and an epitaxial layer stacked on the conductive GaAs single crystal substrate. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials2 process steps
GaAs single crystals were grown using a vertical Bridgman method. A pBN crucible with ~4-inch body diameter was loaded with ~10 kg of six-nines purity GaAs polycrystals and high-purity Si dopant. After single crystal growth, post-annealing was performed in the growth furnace at a prescribed temperature for a prescribed time, followed by cooling to 900°C at ~20°C/hr and then to 500°C at ~50°C/hr. Substrates were cut and polished to a mirror surface and characterized for precipitate density (by IR scattering), microscopic defect density (by surface particle inspection device, threshold 0.265 µm), and dislocation density.
Layer stacks claimed or described, ordered top of device to substrate.
conductive GaAs single crystal substrate
laser device with conductive GaAs substrate and epitaxial layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Si atomic concentration in conductive GaAs crystal | ≥ 100000000000000000 | GaAs |
Density of precipitates (>=30 nm) in conductive GaAs substrate | ≤ 400 |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 19
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,955,251 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A conductive GaAs single crystal substrate cut from a conductive GaAs single crystal, comprising: a polished mirror surface; an atomic concentration of Si being more than 1×1017 cm⁻³; and a density of precipitates having sizes of at least 30 nm being at most 400 cm⁻²; wherein on the polished mirror surface a density of microscopic defects having sizes of at least 0.265 µm measured by a surface particle inspection device is at most 0.3 cm⁻², and an average dislocation density of the substrate is at most 92 cm⁻², and dopants contained in the substrate consist of Si.
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 300 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates having sizes of at least 30 nm contained in the substrate is at most 100 cm⁻² and in the mirror surface the density of microscopic defects having sizes of at least 0.265 µm measured by the surface particle inspection device is at most 0.1 cm⁻².
The conductive GaAs single crystal substrate according to claim 1, wherein the density of precipitates is measured by an infrared-ray scattering.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 4-inch.
The conductive GaAs single crystal substrate according to claim 1, wherein a diameter of the substrate is 6-inch. 11 12
The conductive GaAs single crystal substrate according to claim 1, wherein the substrate is for a laser device.
The conductive GaAs single crystal substrate according to claim 1, further comprising an epitaxial layer stacked thereon.
A laser device comprising: the conductive GaAs single crystal substrate according to claim 1; and an epitaxial layer stacked on the conductive GaAs single crystal substrate. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials2 process steps
GaAs single crystals were grown using a vertical Bridgman method. A pBN crucible with ~4-inch body diameter was loaded with ~10 kg of six-nines purity GaAs polycrystals and high-purity Si dopant. After single crystal growth, post-annealing was performed in the growth furnace at a prescribed temperature for a prescribed time, followed by cooling to 900°C at ~20°C/hr and then to 500°C at ~50°C/hr. Substrates were cut and polished to a mirror surface and characterized for precipitate density (by IR scattering), microscopic defect density (by surface particle inspection device, threshold 0.265 µm), and dislocation density.
Layer stacks claimed or described, ordered top of device to substrate.
conductive GaAs single crystal substrate
laser device with conductive GaAs substrate and epitaxial layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 is a schematic graph showing a temperature distribution during crystal growth in the crystal growth apparatus of
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Si atomic concentration in conductive GaAs crystal | ≥ 100000000000000000 | GaAs |
Density of precipitates (>=30 nm) in conductive GaAs substrate | ≤ 400 |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 19
Related documents with shared materials, methods, properties, or citations.
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Density of microscopic defects (>=0.265 µm) on polished mirror surface | ≤ 0.3 | GaAs |
Average dislocation density of conductive GaAs substrate | ≤ 92 | GaAs |
Density of precipitates (>=30 nm) — tighter embodiment | ≤ 300 | GaAs |
Density of precipitates (>=30 nm) — tightest embodiment | ≤ 100 | GaAs |
Density of microscopic defects (>=0.265 µm) — tighter embodiment | ≤ 0.1 | GaAs |
Dislocation density of conductive GaAs crystal (description embodiment) | ≤ 500 | GaAs |
Temperature | 500–900 °C | — |
Thickness | ≤ 400 cm | — |
Thickness | ≤ 0.5 cm | — |
Temperature | ≤ 1130 °C | — |
Thickness | ≤ 500 cm | — |
Thickness | ≤ 200 cm | — |
Temperature | ≥ 1130 °C | — |
Temperature | ≥ 600 °C | — |
Temperature | ≥ 1160 °C | — |
Temperature | ≥ 1200 °C | — |
Duration | ≥ 10 hours | — |
Duration | ≥ 20 hours | — |
Duration | ≥ 40 hours | — |
Thickness | ≥ 0.265 µm | — |
Thickness | ≥ 30 nm | — |
Thickness | ≥ 2 cm | — |
Thickness | ≥ 1 cm | — |
Thickness | ≤ 0.3 cm | — |
Thickness | ≤ 92 cm | — |
Thickness | ≤ 300 cm | — |
Thickness | ≤ 0.1 cm | — |
Thickness | ≤ 1 cm | — |
Cited non-patent literature · 4
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Density of microscopic defects (>=0.265 µm) on polished mirror surface | ≤ 0.3 | GaAs |
Average dislocation density of conductive GaAs substrate | ≤ 92 | GaAs |
Density of precipitates (>=30 nm) — tighter embodiment | ≤ 300 | GaAs |
Density of precipitates (>=30 nm) — tightest embodiment | ≤ 100 | GaAs |
Density of microscopic defects (>=0.265 µm) — tighter embodiment | ≤ 0.1 | GaAs |
Dislocation density of conductive GaAs crystal (description embodiment) | ≤ 500 | GaAs |
Temperature | 500–900 °C | — |
Thickness | ≤ 400 cm | — |
Thickness | ≤ 0.5 cm | — |
Temperature | ≤ 1130 °C | — |
Thickness | ≤ 500 cm | — |
Thickness | ≤ 200 cm | — |
Temperature | ≥ 1130 °C | — |
Temperature | ≥ 600 °C | — |
Temperature | ≥ 1160 °C | — |
Temperature | ≥ 1200 °C | — |
Duration | ≥ 10 hours | — |
Duration | ≥ 20 hours | — |
Duration | ≥ 40 hours | — |
Thickness | ≥ 0.265 µm | — |
Thickness | ≥ 30 nm | — |
Thickness | ≥ 2 cm | — |
Thickness | ≥ 1 cm | — |
Thickness | ≤ 0.3 cm | — |
Thickness | ≤ 92 cm | — |
Thickness | ≤ 300 cm | — |
Thickness | ≤ 0.1 cm | — |
Thickness | ≤ 1 cm | — |
Cited non-patent literature · 4
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Density of microscopic defects (>=0.265 µm) on polished mirror surface | ≤ 0.3 | GaAs |
Average dislocation density of conductive GaAs substrate | ≤ 92 | GaAs |
Density of precipitates (>=30 nm) — tighter embodiment | ≤ 300 | GaAs |
Density of precipitates (>=30 nm) — tightest embodiment | ≤ 100 | GaAs |
Density of microscopic defects (>=0.265 µm) — tighter embodiment | ≤ 0.1 | GaAs |
Dislocation density of conductive GaAs crystal (description embodiment) | ≤ 500 | GaAs |
Temperature | 500–900 °C | — |
Thickness | ≤ 400 cm | — |
Thickness | ≤ 0.5 cm | — |
Temperature | ≤ 1130 °C | — |
Thickness | ≤ 500 cm | — |
Thickness | ≤ 200 cm | — |
Temperature | ≥ 1130 °C | — |
Temperature | ≥ 600 °C | — |
Temperature | ≥ 1160 °C | — |
Temperature | ≥ 1200 °C | — |
Duration | ≥ 10 hours | — |
Duration | ≥ 20 hours | — |
Duration | ≥ 40 hours | — |
Thickness | ≥ 0.265 µm | — |
Thickness | ≥ 30 nm | — |
Thickness | ≥ 2 cm | — |
Thickness | ≥ 1 cm | — |
Thickness | ≤ 0.3 cm | — |
Thickness | ≤ 92 cm | — |
Thickness | ≤ 300 cm | — |
Thickness | ≤ 0.1 cm | — |
Thickness | ≤ 1 cm | — |
Cited non-patent literature · 4
FIG. 3 is a schematic graph showing a temperature distribution during post-annealing after the crystal growth in 50 the crystal growth apparatus of
Density of microscopic defects (>=0.265 µm) on polished mirror surface | ≤ 0.3 | GaAs |
Average dislocation density of conductive GaAs substrate | ≤ 92 | GaAs |
Density of precipitates (>=30 nm) — tighter embodiment | ≤ 300 | GaAs |
Density of precipitates (>=30 nm) — tightest embodiment | ≤ 100 | GaAs |
Density of microscopic defects (>=0.265 µm) — tighter embodiment | ≤ 0.1 | GaAs |
Dislocation density of conductive GaAs crystal (description embodiment) | ≤ 500 | GaAs |
Temperature | 500–900 °C | — |
Thickness | ≤ 400 cm | — |
Thickness | ≤ 0.5 cm | — |
Temperature | ≤ 1130 °C | — |
Thickness | ≤ 500 cm | — |
Thickness | ≤ 200 cm | — |
Temperature | ≥ 1130 °C | — |
Temperature | ≥ 600 °C | — |
Temperature | ≥ 1160 °C | — |
Temperature | ≥ 1200 °C | — |
Duration | ≥ 10 hours | — |
Duration | ≥ 20 hours | — |
Duration | ≥ 40 hours | — |
Thickness | ≥ 0.265 µm | — |
Thickness | ≥ 30 nm | — |
Thickness | ≥ 2 cm | — |
Thickness | ≥ 1 cm | — |
Thickness | ≤ 0.3 cm | — |
Thickness | ≤ 92 cm | — |
Thickness | ≤ 300 cm | — |
Thickness | ≤ 0.1 cm | — |
Thickness | ≤ 1 cm | — |
Cited non-patent literature · 4