Patent
US 8,772,098TRANSPORT CONDUITS FOR CONTACTS TO GRAPHENE
Christos D. Dimitrakopoulos
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,772,098Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. The metals may be a single element or a metal alloy. For example, the metal may be copper (Cu), titanium (Ti), nickel (Ni), palladium (Pd), gold (Au) …
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
FIG. 5 illustrates a method of forming cuts, according to an embodiment of the invention. Detailed Description 5 Illustrative embodiments of the invention may …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A method comprising: forming a graphene layer on a substrate, the graphene layer having at least a first portion and a second portion; forming one or more cuts in at least one of the first portion and the second portion; forming first and second source/drain regions spaced apart relative to one another on the substrate; wherein the first source/drain region is formed on the first portion of the graphene layer and the second source/drain region is formed on the second portion of the graphene layer.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer directly on the substrate.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer apart from the substrate and transferring the graphene layer onto the substrate.
The method of claim 22, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 22, wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 22, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 22, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 22, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamellae of the first material and at least a portion of the graphene below the lamella e of the first material using a reactive ion etching process.
3 3. The method of claim 22, wherein forming the one or more cuts comprises forming the one or more cuts apart relative to one another such that the cuts do not merge to form a single cut.
A method, comprising: forming at least one graphene layer; forming one or more cuts in at least one portion of the graphene layer; and bonding a metal to the at least one portion of the graphene layer.
The method of claim 25, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 25, wherein wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 25, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 25, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 25, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamella e of the first material and at least a portion of the graphene below the lamellae of the first material using a reactive
Layer stacks claimed or described, ordered top of device to substrate.
back-gated graphene field-effect transistor
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,772,098Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. The metals may be a single element or a metal alloy. For example, the metal may be copper (Cu), titanium (Ti), nickel (Ni), palladium (Pd), gold (Au) …
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
FIG. 5 illustrates a method of forming cuts, according to an embodiment of the invention. Detailed Description 5 Illustrative embodiments of the invention may …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A method comprising: forming a graphene layer on a substrate, the graphene layer having at least a first portion and a second portion; forming one or more cuts in at least one of the first portion and the second portion; forming first and second source/drain regions spaced apart relative to one another on the substrate; wherein the first source/drain region is formed on the first portion of the graphene layer and the second source/drain region is formed on the second portion of the graphene layer.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer directly on the substrate.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer apart from the substrate and transferring the graphene layer onto the substrate.
The method of claim 22, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 22, wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 22, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 22, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 22, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamellae of the first material and at least a portion of the graphene below the lamella e of the first material using a reactive ion etching process.
3 3. The method of claim 22, wherein forming the one or more cuts comprises forming the one or more cuts apart relative to one another such that the cuts do not merge to form a single cut.
A method, comprising: forming at least one graphene layer; forming one or more cuts in at least one portion of the graphene layer; and bonding a metal to the at least one portion of the graphene layer.
The method of claim 25, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 25, wherein wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 25, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 25, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 25, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamella e of the first material and at least a portion of the graphene below the lamellae of the first material using a reactive
Layer stacks claimed or described, ordered top of device to substrate.
back-gated graphene field-effect transistor
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,772,098Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. The metals may be a single element or a metal alloy. For example, the metal may be copper (Cu), titanium (Ti), nickel (Ni), palladium (Pd), gold (Au) …
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
FIG. 5 illustrates a method of forming cuts, according to an embodiment of the invention. Detailed Description 5 Illustrative embodiments of the invention may …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A method comprising: forming a graphene layer on a substrate, the graphene layer having at least a first portion and a second portion; forming one or more cuts in at least one of the first portion and the second portion; forming first and second source/drain regions spaced apart relative to one another on the substrate; wherein the first source/drain region is formed on the first portion of the graphene layer and the second source/drain region is formed on the second portion of the graphene layer.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer directly on the substrate.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer apart from the substrate and transferring the graphene layer onto the substrate.
The method of claim 22, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 22, wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 22, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 22, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 22, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamellae of the first material and at least a portion of the graphene below the lamella e of the first material using a reactive ion etching process.
3 3. The method of claim 22, wherein forming the one or more cuts comprises forming the one or more cuts apart relative to one another such that the cuts do not merge to form a single cut.
A method, comprising: forming at least one graphene layer; forming one or more cuts in at least one portion of the graphene layer; and bonding a metal to the at least one portion of the graphene layer.
The method of claim 25, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 25, wherein wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 25, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 25, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 25, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamella e of the first material and at least a portion of the graphene below the lamellae of the first material using a reactive
Layer stacks claimed or described, ordered top of device to substrate.
back-gated graphene field-effect transistor
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,772,098Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1. The metals may be a single element or a metal alloy. For example, the metal may be copper (Cu), titanium (Ti), nickel (Ni), palladium (Pd), gold (Au) …
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
FIG. 5 illustrates a method of forming cuts, according to an embodiment of the invention. Detailed Description 5 Illustrative embodiments of the invention may …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A method comprising: forming a graphene layer on a substrate, the graphene layer having at least a first portion and a second portion; forming one or more cuts in at least one of the first portion and the second portion; forming first and second source/drain regions spaced apart relative to one another on the substrate; wherein the first source/drain region is formed on the first portion of the graphene layer and the second source/drain region is formed on the second portion of the graphene layer.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer directly on the substrate.
The method of claim 22, wherein the step of forming the graphene layer comprises forming the graphene layer apart from the substrate and transferring the graphene layer onto the substrate.
The method of claim 22, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 22, wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 22, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 22, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 22, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamellae of the first material and at least a portion of the graphene below the lamella e of the first material using a reactive ion etching process.
3 3. The method of claim 22, wherein forming the one or more cuts comprises forming the one or more cuts apart relative to one another such that the cuts do not merge to form a single cut.
A method, comprising: forming at least one graphene layer; forming one or more cuts in at least one portion of the graphene layer; and bonding a metal to the at least one portion of the graphene layer.
The method of claim 25, wherein forming the one or more cuts comprises forming two or more cuts parallel to one another.
The method of claim 25, wherein wherein the one or more cuts are formed using one of electron beam lithography, nanoimprint lithography and milling with a focused-ion beam.
The method of claim 25, further comprising cleaning the graphene layer to remove at least a portion of residue formed on the graphene layer as a result of forming the one or more cuts.
The method of claim 25, further comprising annealing the graphene layer subsequent to forming the one or more cuts.
The method of claim 25, wherein forming the one or more cuts comprises: forming alternating narrow lamellae of a first material and a second material on a surface of the graphene layer; and removing the narrow lamella e of the first material and at least a portion of the graphene below the lamellae of the first material using a reactive
Layer stacks claimed or described, ordered top of device to substrate.
back-gated graphene field-effect transistor
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 2 shows an example of a back-gated FET 200. FET 200 has an oxide 202 10 formed on a heavily doped substrate (gate) 201. A graphene layer 203 is …
Related documents with shared materials, methods, properties, or citations.
copper
Cu
titanium
Ti
nickel
Ni
palladium
Pd
gold
Au
Ti/Pd/Au alloy
block co-polymer or polymer blend (self-assembled nanostructures)
silicon dioxide (oxide)
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
copper
Cu
titanium
Ti
nickel
Ni
palladium
Pd
gold
Au
Ti/Pd/Au alloy
block co-polymer or polymer blend (self-assembled nanostructures)
silicon dioxide (oxide)
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
copper
Cu
titanium
Ti
nickel
Ni
palladium
Pd
gold
Au
Ti/Pd/Au alloy
block co-polymer or polymer blend (self-assembled nanostructures)
silicon dioxide (oxide)
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …
copper
Cu
titanium
Ti
nickel
Ni
palladium
Pd
gold
Au
Ti/Pd/Au alloy
block co-polymer or polymer blend (self-assembled nanostructures)
silicon dioxide (oxide)
FIG. 3B shows a portion of a FET 302 where two sets of cuts 320-1 and 320-2 are formed in the graphene layer 310-2. Each set of cuts 320 in FET 302 consists of …
FIG. 4 also shows a FET 400' with two sets of cuts 420- 1' and 420-2' on a graphene layer 401' separated by a distance 410'. Distances 410 and 410' illustrate …