Patent
US 9,331,198Title: CONTROLLED EPITAXIAL BORON NITRIDE GROWTH FOR GRAPHENE BASED TRANSISTORS FIGURE 1 (a) co I Co CoSi₂(111}/Si
Jeffry Kelber
University of North Texas·9 January 2014·US
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US 9,331,198Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 reflector growth of h-BN(0001) on CoSi 2(111)/Si(1 11): (a) AES and (b) LEED image for ~ 6 ML CoSi 2(111)/Si(1 11): (c) and (d) corresponding data af t …
FIG. 2 gives LEED and STM d I/dV data for BN monolayer and graphene/BN heterojunction grown on Ru(0001): (a) LEED image for h-BN(0001)/Ru(0001). Main LEED …
FIG. 3 is (a) LEED, (b) STM constant current image and (c) corresponding line scan for a trilayer h-BN film grown by ALD on Ru(0001). The 3.2 t0.1 A step …
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
FIG. 5 shows 300 K Reflectivity data (red) and MOKE data (blue) indicating ferromagnetic hysteresis for graphene conduction electrons, induced by …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(CURRENTLY A M ENDED) A vertical graphene transistor comprising: a metal substrate, multiple layers of epitaxial hexagonal Boron Nitride (h-BN) there over, and a layer of graphene formed on said h-BN opposite the metal substrate, wherein said h-BN is comprised of a number of epitaxial la y ers of h-BN sufficient to provide a barrier la y er thickness to develop predetermined ON-OFF rates and lateral mobility in excess of 2000 cm 2/V-sec.
The vertical graphene transistor of Claim 1, wherein said substrate is comprised of silicon, ruthenium, cobalt, chrome, nickel, iron, platinum or palladium.
The vertical graphene transistor of Claim 1, wherein that transistor is fabricated on a substrate used to form part of an array in a complementary metal oxide semiconductor (CMOS) integrated circuit.
The vertical graphene transistor of Claim 1, wherein said transistor exhibits ON-OFF ratios of in excess of 1 0 4.
(CURRENTLY A M ENDED) A method of preparing the vertical graphene transistor of Claim 1, comprising: forming multiple layers of epitaxial h-BN on a major surface of a metal substrate by atomic layer deposition (ALD) and depositing a layer of graphene on a surface of said h-BN Docket No.: QNTM-0013-UT₁ Application No. 14/412,709 Page 4 of 7 opposite the surface on said substrate, and providing electrical contacts on said graphene, wherein a number of said la y ers of h-BN formed on said substrate is determined by the number of la y ers required to suppress orbital hybridization of said h-BN and provide a predetermined ON-OFF rate for said device.
. canceled
(CURRENTLY A M ENDED) The process of Claim from 3-15 epitaxial layers of h-BN on said substrate.
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical graphene transistor
Materials described outside the worked examples.
hexagonal boron nitride
h-BN
graphene
C
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | ≥ 2000 cm2/V-sec | C |
Fet On Off Ratio | ≥ 10000 | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,331,198Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 reflector growth of h-BN(0001) on CoSi 2(111)/Si(1 11): (a) AES and (b) LEED image for ~ 6 ML CoSi 2(111)/Si(1 11): (c) and (d) corresponding data af t …
FIG. 2 gives LEED and STM d I/dV data for BN monolayer and graphene/BN heterojunction grown on Ru(0001): (a) LEED image for h-BN(0001)/Ru(0001). Main LEED …
FIG. 3 is (a) LEED, (b) STM constant current image and (c) corresponding line scan for a trilayer h-BN film grown by ALD on Ru(0001). The 3.2 t0.1 A step …
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
FIG. 5 shows 300 K Reflectivity data (red) and MOKE data (blue) indicating ferromagnetic hysteresis for graphene conduction electrons, induced by …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(CURRENTLY A M ENDED) A vertical graphene transistor comprising: a metal substrate, multiple layers of epitaxial hexagonal Boron Nitride (h-BN) there over, and a layer of graphene formed on said h-BN opposite the metal substrate, wherein said h-BN is comprised of a number of epitaxial la y ers of h-BN sufficient to provide a barrier la y er thickness to develop predetermined ON-OFF rates and lateral mobility in excess of 2000 cm 2/V-sec.
The vertical graphene transistor of Claim 1, wherein said substrate is comprised of silicon, ruthenium, cobalt, chrome, nickel, iron, platinum or palladium.
The vertical graphene transistor of Claim 1, wherein that transistor is fabricated on a substrate used to form part of an array in a complementary metal oxide semiconductor (CMOS) integrated circuit.
The vertical graphene transistor of Claim 1, wherein said transistor exhibits ON-OFF ratios of in excess of 1 0 4.
(CURRENTLY A M ENDED) A method of preparing the vertical graphene transistor of Claim 1, comprising: forming multiple layers of epitaxial h-BN on a major surface of a metal substrate by atomic layer deposition (ALD) and depositing a layer of graphene on a surface of said h-BN Docket No.: QNTM-0013-UT₁ Application No. 14/412,709 Page 4 of 7 opposite the surface on said substrate, and providing electrical contacts on said graphene, wherein a number of said la y ers of h-BN formed on said substrate is determined by the number of la y ers required to suppress orbital hybridization of said h-BN and provide a predetermined ON-OFF rate for said device.
. canceled
(CURRENTLY A M ENDED) The process of Claim from 3-15 epitaxial layers of h-BN on said substrate.
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical graphene transistor
Materials described outside the worked examples.
hexagonal boron nitride
h-BN
graphene
C
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | ≥ 2000 cm2/V-sec | C |
Fet On Off Ratio | ≥ 10000 | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,331,198Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 reflector growth of h-BN(0001) on CoSi 2(111)/Si(1 11): (a) AES and (b) LEED image for ~ 6 ML CoSi 2(111)/Si(1 11): (c) and (d) corresponding data af t …
FIG. 2 gives LEED and STM d I/dV data for BN monolayer and graphene/BN heterojunction grown on Ru(0001): (a) LEED image for h-BN(0001)/Ru(0001). Main LEED …
FIG. 3 is (a) LEED, (b) STM constant current image and (c) corresponding line scan for a trilayer h-BN film grown by ALD on Ru(0001). The 3.2 t0.1 A step …
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
FIG. 5 shows 300 K Reflectivity data (red) and MOKE data (blue) indicating ferromagnetic hysteresis for graphene conduction electrons, induced by …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(CURRENTLY A M ENDED) A vertical graphene transistor comprising: a metal substrate, multiple layers of epitaxial hexagonal Boron Nitride (h-BN) there over, and a layer of graphene formed on said h-BN opposite the metal substrate, wherein said h-BN is comprised of a number of epitaxial la y ers of h-BN sufficient to provide a barrier la y er thickness to develop predetermined ON-OFF rates and lateral mobility in excess of 2000 cm 2/V-sec.
The vertical graphene transistor of Claim 1, wherein said substrate is comprised of silicon, ruthenium, cobalt, chrome, nickel, iron, platinum or palladium.
The vertical graphene transistor of Claim 1, wherein that transistor is fabricated on a substrate used to form part of an array in a complementary metal oxide semiconductor (CMOS) integrated circuit.
The vertical graphene transistor of Claim 1, wherein said transistor exhibits ON-OFF ratios of in excess of 1 0 4.
(CURRENTLY A M ENDED) A method of preparing the vertical graphene transistor of Claim 1, comprising: forming multiple layers of epitaxial h-BN on a major surface of a metal substrate by atomic layer deposition (ALD) and depositing a layer of graphene on a surface of said h-BN Docket No.: QNTM-0013-UT₁ Application No. 14/412,709 Page 4 of 7 opposite the surface on said substrate, and providing electrical contacts on said graphene, wherein a number of said la y ers of h-BN formed on said substrate is determined by the number of la y ers required to suppress orbital hybridization of said h-BN and provide a predetermined ON-OFF rate for said device.
. canceled
(CURRENTLY A M ENDED) The process of Claim from 3-15 epitaxial layers of h-BN on said substrate.
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical graphene transistor
Materials described outside the worked examples.
hexagonal boron nitride
h-BN
graphene
C
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | ≥ 2000 cm2/V-sec | C |
Fet On Off Ratio | ≥ 10000 | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,331,198Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 reflector growth of h-BN(0001) on CoSi 2(111)/Si(1 11): (a) AES and (b) LEED image for ~ 6 ML CoSi 2(111)/Si(1 11): (c) and (d) corresponding data af t …
FIG. 2 gives LEED and STM d I/dV data for BN monolayer and graphene/BN heterojunction grown on Ru(0001): (a) LEED image for h-BN(0001)/Ru(0001). Main LEED …
FIG. 3 is (a) LEED, (b) STM constant current image and (c) corresponding line scan for a trilayer h-BN film grown by ALD on Ru(0001). The 3.2 t0.1 A step …
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
FIG. 5 shows 300 K Reflectivity data (red) and MOKE data (blue) indicating ferromagnetic hysteresis for graphene conduction electrons, induced by …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(CURRENTLY A M ENDED) A vertical graphene transistor comprising: a metal substrate, multiple layers of epitaxial hexagonal Boron Nitride (h-BN) there over, and a layer of graphene formed on said h-BN opposite the metal substrate, wherein said h-BN is comprised of a number of epitaxial la y ers of h-BN sufficient to provide a barrier la y er thickness to develop predetermined ON-OFF rates and lateral mobility in excess of 2000 cm 2/V-sec.
The vertical graphene transistor of Claim 1, wherein said substrate is comprised of silicon, ruthenium, cobalt, chrome, nickel, iron, platinum or palladium.
The vertical graphene transistor of Claim 1, wherein that transistor is fabricated on a substrate used to form part of an array in a complementary metal oxide semiconductor (CMOS) integrated circuit.
The vertical graphene transistor of Claim 1, wherein said transistor exhibits ON-OFF ratios of in excess of 1 0 4.
(CURRENTLY A M ENDED) A method of preparing the vertical graphene transistor of Claim 1, comprising: forming multiple layers of epitaxial h-BN on a major surface of a metal substrate by atomic layer deposition (ALD) and depositing a layer of graphene on a surface of said h-BN Docket No.: QNTM-0013-UT₁ Application No. 14/412,709 Page 4 of 7 opposite the surface on said substrate, and providing electrical contacts on said graphene, wherein a number of said la y ers of h-BN formed on said substrate is determined by the number of la y ers required to suppress orbital hybridization of said h-BN and provide a predetermined ON-OFF rate for said device.
. canceled
(CURRENTLY A M ENDED) The process of Claim from 3-15 epitaxial layers of h-BN on said substrate.
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical graphene transistor
Materials described outside the worked examples.
hexagonal boron nitride
h-BN
graphene
C
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4 reflects substrate-induced band gap formation in graphene. (a) HOMO and LUMO orbitals of isolated graphene lattice at the Dirac point are degenerate due …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | ≥ 2000 cm2/V-sec | C |
Fet On Off Ratio | ≥ 10000 | — |
Related documents with shared materials, methods, properties, or citations.
metal substrate (silicon, ruthenium, cobalt, chrome, nickel, iron, platinum, or palladium)
metal silicide
cobalt silicide
CoSi₂
— |
| 0.5–1 eV |
| — |
— | ≥ 0.5 eV | — |
metal substrate (silicon, ruthenium, cobalt, chrome, nickel, iron, platinum, or palladium)
metal silicide
cobalt silicide
CoSi₂
— |
| 0.5–1 eV |
| — |
— | ≥ 0.5 eV | — |
metal substrate (silicon, ruthenium, cobalt, chrome, nickel, iron, platinum, or palladium)
metal silicide
cobalt silicide
CoSi₂
— |
| 0.5–1 eV |
| — |
— | ≥ 0.5 eV | — |
metal substrate (silicon, ruthenium, cobalt, chrome, nickel, iron, platinum, or palladium)
metal silicide
cobalt silicide
CoSi₂
— |
| 0.5–1 eV |
| — |
— | ≥ 0.5 eV | — |