Patent
Atlas literature
Patent
US 12,520,534 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 8. As shown in
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
FIGS. 32A∼E of patent litera- ture 2 and further without using complicated processes such B₂ as forming a deep groove in the AlxGa₁-xN layer 12 and burying the …
FIG. 57C and
FIG. 65 57D of patent literature 1 or
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode, NPZ d≤2.64×1014 [cm⁻² nm] being satisfied when the polarization charge amount at the hetero-interface between the AlxGa1−xN layer and the first undoped GaN layer and the hetero-interface between the AlxGa1−xN layer and the second undoped GaN layer is denoted as NPZ and the thickness of the AlxGa1−xN layer is denoted as d, the In composition y and the thickness t of the p-type InyGa1−yN layer being selected to satisfy y×t≤0.20×5 [nm].
The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the sheet resistance of the epi substrate in which the first undoped GaN layer, the AlxGa1−xN layer, the second undoped GaN layer, the p-type GaN layer and the p-type InyGa1−yN layer are stacked on the whole surface of a substrate is not smaller than 20 KΩ/u.
Electrical equipment, comprising: at least a transistor, the transistor being a normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
normally-off mode polarization super junction GaN-based field effect transistor
Materials described outside the worked examples.
first undoped GaN layer
GaN
AlxGa₁-xN layer
AlxGa₁-xN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
epi substrate sheet resistance (minimum, claim 2) | ≥ 20 kΩ/sq | GaNAlxGa₁-xNGaN |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
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Patent
Atlas literature
Patent
US 12,520,534 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 8. As shown in
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
FIGS. 32A∼E of patent litera- ture 2 and further without using complicated processes such B₂ as forming a deep groove in the AlxGa₁-xN layer 12 and burying the …
FIG. 57C and
FIG. 65 57D of patent literature 1 or
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode, NPZ d≤2.64×1014 [cm⁻² nm] being satisfied when the polarization charge amount at the hetero-interface between the AlxGa1−xN layer and the first undoped GaN layer and the hetero-interface between the AlxGa1−xN layer and the second undoped GaN layer is denoted as NPZ and the thickness of the AlxGa1−xN layer is denoted as d, the In composition y and the thickness t of the p-type InyGa1−yN layer being selected to satisfy y×t≤0.20×5 [nm].
The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the sheet resistance of the epi substrate in which the first undoped GaN layer, the AlxGa1−xN layer, the second undoped GaN layer, the p-type GaN layer and the p-type InyGa1−yN layer are stacked on the whole surface of a substrate is not smaller than 20 KΩ/u.
Electrical equipment, comprising: at least a transistor, the transistor being a normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
normally-off mode polarization super junction GaN-based field effect transistor
Materials described outside the worked examples.
first undoped GaN layer
GaN
AlxGa₁-xN layer
AlxGa₁-xN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
epi substrate sheet resistance (minimum, claim 2) | ≥ 20 kΩ/sq | GaNAlxGa₁-xNGaN |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,520,534 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 8. As shown in
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
FIGS. 32A∼E of patent litera- ture 2 and further without using complicated processes such B₂ as forming a deep groove in the AlxGa₁-xN layer 12 and burying the …
FIG. 57C and
FIG. 65 57D of patent literature 1 or
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode, NPZ d≤2.64×1014 [cm⁻² nm] being satisfied when the polarization charge amount at the hetero-interface between the AlxGa1−xN layer and the first undoped GaN layer and the hetero-interface between the AlxGa1−xN layer and the second undoped GaN layer is denoted as NPZ and the thickness of the AlxGa1−xN layer is denoted as d, the In composition y and the thickness t of the p-type InyGa1−yN layer being selected to satisfy y×t≤0.20×5 [nm].
The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the sheet resistance of the epi substrate in which the first undoped GaN layer, the AlxGa1−xN layer, the second undoped GaN layer, the p-type GaN layer and the p-type InyGa1−yN layer are stacked on the whole surface of a substrate is not smaller than 20 KΩ/u.
Electrical equipment, comprising: at least a transistor, the transistor being a normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
normally-off mode polarization super junction GaN-based field effect transistor
Materials described outside the worked examples.
first undoped GaN layer
GaN
AlxGa₁-xN layer
AlxGa₁-xN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
epi substrate sheet resistance (minimum, claim 2) | ≥ 20 kΩ/sq | GaNAlxGa₁-xNGaN |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,520,534 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 8. As shown in
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
FIGS. 32A∼E of patent litera- ture 2 and further without using complicated processes such B₂ as forming a deep groove in the AlxGa₁-xN layer 12 and burying the …
FIG. 57C and
FIG. 65 57D of patent literature 1 or
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode, NPZ d≤2.64×1014 [cm⁻² nm] being satisfied when the polarization charge amount at the hetero-interface between the AlxGa1−xN layer and the first undoped GaN layer and the hetero-interface between the AlxGa1−xN layer and the second undoped GaN layer is denoted as NPZ and the thickness of the AlxGa1−xN layer is denoted as d, the In composition y and the thickness t of the p-type InyGa1−yN layer being selected to satisfy y×t≤0.20×5 [nm].
The normally-off mode polarization super junction GaN-based field effect transistor according to claim 1 wherein the sheet resistance of the epi substrate in which the first undoped GaN layer, the AlxGa1−xN layer, the second undoped GaN layer, the p-type GaN layer and the p-type InyGa1−yN layer are stacked on the whole surface of a substrate is not smaller than 20 KΩ/u.
Electrical equipment, comprising: at least a transistor, the transistor being a normally-off mode polarization super junction GaN-based field effect transistor, comprising: a first undoped GaN layer, an AlxGa1−xN layer (0<x<1) on the first undoped GaN layer, a second undoped GaN layer having an island-like shape on the AlxGa1−xN layer, a p-type GaN layer on the second undoped GaN layer, a p-type InyGa1−yN layer (0<y<1) on the p-type GaN layer, a gate electrode electrically connected to the p-type InyGa1−yN layer, a source electrode on the AlxGa1−xN layer; and a drain electrode on the AlxGa1−xN layer, the p-type GaN layer existing on the whole surface of the second undoped GaN layer or on only one side of the surface of the second undoped GaN layer on the side of the source electrode, the p-type InyGa1−yN layer existing on only one side of the surface of the p-type GaN layer on the side of the source electrode if the p-type GaN layer exists on the whole surface of the second undoped GaN layer or existing on the whole surface or a part of the surface of the p-type GaN layer if the p-type GaN layer exists on only one side of the surface of the second undoped GaN layer on the side of the source electrode. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
normally-off mode polarization super junction GaN-based field effect transistor
Materials described outside the worked examples.
first undoped GaN layer
GaN
AlxGa₁-xN layer
AlxGa₁-xN
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
epi substrate sheet resistance (minimum, claim 2) | ≥ 20 kΩ/sq | GaNAlxGa₁-xNGaN |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 9
Related documents with shared materials, methods, properties, or citations.
p-type InyGa₁-yN layer
InyGa₁-yN
AluGa₁-uN interlayer
AluGa₁-uN
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
epi substrate sheet resistance (preferred minimum, claim 3) | ≥ 45 kΩ/sq | GaNAlxGa₁-xNGaNGaNInyGa₁-yN |
gate threshold voltage (normally-off condition) | ≥ 0 V | — |
Cited non-patent literature · 3
p-type InyGa₁-yN layer
InyGa₁-yN
AluGa₁-uN interlayer
AluGa₁-uN
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
epi substrate sheet resistance (preferred minimum, claim 3) | ≥ 45 kΩ/sq | GaNAlxGa₁-xNGaNGaNInyGa₁-yN |
gate threshold voltage (normally-off condition) | ≥ 0 V | — |
Cited non-patent literature · 3
p-type InyGa₁-yN layer
InyGa₁-yN
AluGa₁-uN interlayer
AluGa₁-uN
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
epi substrate sheet resistance (preferred minimum, claim 3) | ≥ 45 kΩ/sq | GaNAlxGa₁-xNGaNGaNInyGa₁-yN |
gate threshold voltage (normally-off condition) | ≥ 0 V | — |
Cited non-patent literature · 3
p-type InyGa₁-yN layer
InyGa₁-yN
AluGa₁-uN interlayer
AluGa₁-uN
FIG. 1, in the normally-off mode polarization super junction GaN-based FET according to the first embodiment, an undoped GaN layer 11, an AlxGa₁-xN layer 12 and …
FIG. 2 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 3 show the Id-Vd characteristics of the 35 FET 1 and the FET 2, respectively. The gate width (Wg) of the FET 1 and the FET 2 was about 190 mm. The gate …
FIG. 4 A schematic view showing the drain current-gate voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 5. The maximum value of Id was set to 1 A due to the reason of measurement system used. In
FIG. 6 A schematic view showing the drain current-drain voltage characteristics of the FET 1 prepared to consider the normally-off mode polarization super …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 7, voltage resistance of the FET 1 and the FET 2 is very high and leakage current was about 1 µA when Vd=1200 V. (Relation Between the Thickness of the …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 9 A schematic view showing the threshold voltage Vth plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the FETs 1, 2, 3, 4, 5 prepared to …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 10 A schematic view showing the sheet resistance of the epi substrate plotted against the thickness d of the AlxGa₁-xN layer (x=0.21) of the samples 1, 2, …
FIG. 11 A schematic view showing the relation between the Al composition x of the AlxGa₁-xN layer and the polar- ization charge amount of the FETs 1, 2, 3, 4, …
FIG. 12 A cross-sectional view showing a normally-off mode polarization super junction GaN-based FET according to a second embodiment of the invention. 35 …
FIG. 31 of patent literature 2. The Second Embodiment [The Normally-Off Mode Polarization Super Junction GaN- Based FET] As shown in
epi substrate sheet resistance (preferred minimum, claim 3) | ≥ 45 kΩ/sq | GaNAlxGa₁-xNGaNGaNInyGa₁-yN |
gate threshold voltage (normally-off condition) | ≥ 0 V | — |
Cited non-patent literature · 3
