Patent
US 9,484,470METHOD OF FABRICATING A GaN P-I-N DIODE USING IMPLANTATION
Isik C. Kizilyalli
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
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US 9,484,470Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how an implanted region 50 can be used to alleviate field crowding near the edge 30 of a second P-i-N diode 100-2, according to one …
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 coupled to first GaN epitaxial layer 201. The second GaN epitaxial layer 301 may have a …
FIG. 4 illustrates the formation of a metal structure 401 below the GaN substrate 200. The metal structure 401 can be one or more layers of metal that serve as …
FIG. 5 illustrates the removal at least a portion of the second GaN epitaxial layer 301 20 to expose one or more surfaces 502 physically adjacent to a …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 7 illustrates the formation of a metal structure 701 coupled to the second GaN epitaxial layer 301. This metal structure 701, can provide an anode Ohmic …
FIG. 8 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge implanted regions for edge termination …
FIG. 9. As shown by blocks 1010-1030, the method of
FIG. 10 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge termination structure and an optional …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A I II -nitride semiconductor device, comprising: a I II -nitride substrate of a first conductivity type; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 1, wherein the first I II -nitride epitaxial layer comprises an n-type GaN epitaxial material.
The device of claim 1, wherein the depth of the implanted region is between 0.1 m and 1 m.
The device of claim 1, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 1, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 1, further comprising a dielectric layer coupled to the implanted region.
A I II -nitride P-i-N diode, comprising: a I II -nitride substrate of a first conductivity type, wherein the I II -nitride substrate forms one of either a cathode or an anode of the P-i-N diode; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer forms the other of either the cathode or the anode of the P-i-N diode; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 11, wherein the first I II -nitride epitaxial layer comprises an n-type G aN epitaxial material.
The device of claim 11, wherein the depth of the implanted region is between 0.1 m and 1 km.
The device of claim 11, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 11, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 11, further comprising a dielectric layer coupled to the implanted region.
Layer stacks claimed or described, ordered top of device to substrate.
III-nitride semiconductor device
III-nitride P-i-N diode
Materials described outside the worked examples.
III-nitride epitaxial layer (first conductivity type)
III-nitride epitaxial layer (second conductivity type)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
breakdown_voltage | ≥ 600 | — |
Temperature | 300–900 °C |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,484,470Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how an implanted region 50 can be used to alleviate field crowding near the edge 30 of a second P-i-N diode 100-2, according to one …
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 coupled to first GaN epitaxial layer 201. The second GaN epitaxial layer 301 may have a …
FIG. 4 illustrates the formation of a metal structure 401 below the GaN substrate 200. The metal structure 401 can be one or more layers of metal that serve as …
FIG. 5 illustrates the removal at least a portion of the second GaN epitaxial layer 301 20 to expose one or more surfaces 502 physically adjacent to a …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 7 illustrates the formation of a metal structure 701 coupled to the second GaN epitaxial layer 301. This metal structure 701, can provide an anode Ohmic …
FIG. 8 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge implanted regions for edge termination …
FIG. 9. As shown by blocks 1010-1030, the method of
FIG. 10 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge termination structure and an optional …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A I II -nitride semiconductor device, comprising: a I II -nitride substrate of a first conductivity type; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 1, wherein the first I II -nitride epitaxial layer comprises an n-type GaN epitaxial material.
The device of claim 1, wherein the depth of the implanted region is between 0.1 m and 1 m.
The device of claim 1, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 1, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 1, further comprising a dielectric layer coupled to the implanted region.
A I II -nitride P-i-N diode, comprising: a I II -nitride substrate of a first conductivity type, wherein the I II -nitride substrate forms one of either a cathode or an anode of the P-i-N diode; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer forms the other of either the cathode or the anode of the P-i-N diode; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 11, wherein the first I II -nitride epitaxial layer comprises an n-type G aN epitaxial material.
The device of claim 11, wherein the depth of the implanted region is between 0.1 m and 1 km.
The device of claim 11, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 11, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 11, further comprising a dielectric layer coupled to the implanted region.
Layer stacks claimed or described, ordered top of device to substrate.
III-nitride semiconductor device
III-nitride P-i-N diode
Materials described outside the worked examples.
III-nitride epitaxial layer (first conductivity type)
III-nitride epitaxial layer (second conductivity type)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
breakdown_voltage | ≥ 600 | — |
Temperature | 300–900 °C |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,484,470Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how an implanted region 50 can be used to alleviate field crowding near the edge 30 of a second P-i-N diode 100-2, according to one …
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 coupled to first GaN epitaxial layer 201. The second GaN epitaxial layer 301 may have a …
FIG. 4 illustrates the formation of a metal structure 401 below the GaN substrate 200. The metal structure 401 can be one or more layers of metal that serve as …
FIG. 5 illustrates the removal at least a portion of the second GaN epitaxial layer 301 20 to expose one or more surfaces 502 physically adjacent to a …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 7 illustrates the formation of a metal structure 701 coupled to the second GaN epitaxial layer 301. This metal structure 701, can provide an anode Ohmic …
FIG. 8 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge implanted regions for edge termination …
FIG. 9. As shown by blocks 1010-1030, the method of
FIG. 10 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge termination structure and an optional …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A I II -nitride semiconductor device, comprising: a I II -nitride substrate of a first conductivity type; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 1, wherein the first I II -nitride epitaxial layer comprises an n-type GaN epitaxial material.
The device of claim 1, wherein the depth of the implanted region is between 0.1 m and 1 m.
The device of claim 1, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 1, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 1, further comprising a dielectric layer coupled to the implanted region.
A I II -nitride P-i-N diode, comprising: a I II -nitride substrate of a first conductivity type, wherein the I II -nitride substrate forms one of either a cathode or an anode of the P-i-N diode; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer forms the other of either the cathode or the anode of the P-i-N diode; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 11, wherein the first I II -nitride epitaxial layer comprises an n-type G aN epitaxial material.
The device of claim 11, wherein the depth of the implanted region is between 0.1 m and 1 km.
The device of claim 11, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 11, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 11, further comprising a dielectric layer coupled to the implanted region.
Layer stacks claimed or described, ordered top of device to substrate.
III-nitride semiconductor device
III-nitride P-i-N diode
Materials described outside the worked examples.
III-nitride epitaxial layer (first conductivity type)
III-nitride epitaxial layer (second conductivity type)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
breakdown_voltage | ≥ 600 | — |
Temperature | 300–900 °C |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,484,470Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how an implanted region 50 can be used to alleviate field crowding near the edge 30 of a second P-i-N diode 100-2, according to one …
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 coupled to first GaN epitaxial layer 201. The second GaN epitaxial layer 301 may have a …
FIG. 4 illustrates the formation of a metal structure 401 below the GaN substrate 200. The metal structure 401 can be one or more layers of metal that serve as …
FIG. 5 illustrates the removal at least a portion of the second GaN epitaxial layer 301 20 to expose one or more surfaces 502 physically adjacent to a …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 7 illustrates the formation of a metal structure 701 coupled to the second GaN epitaxial layer 301. This metal structure 701, can provide an anode Ohmic …
FIG. 8 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge implanted regions for edge termination …
FIG. 9. As shown by blocks 1010-1030, the method of
FIG. 10 is a simplified flowchart illustrating a method of fabricating a I II -nitride semiconductor device with an edge termination structure and an optional …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A I II -nitride semiconductor device, comprising: a I II -nitride substrate of a first conductivity type; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 1, wherein the first I II -nitride epitaxial layer comprises an n-type GaN epitaxial material.
The device of claim 1, wherein the depth of the implanted region is between 0.1 m and 1 m.
The device of claim 1, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 1, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 1, further comprising a dielectric layer coupled to the implanted region.
A I II -nitride P-i-N diode, comprising: a I II -nitride substrate of a first conductivity type, wherein the I II -nitride substrate forms one of either a cathode or an anode of the P-i-N diode; a first I II -nitride epitaxial layer of the first conductivity type coupled to the III- nitride substrate, wherein the first I II -nitride epitaxial layer is characterized by a first charge density; a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer forms the other of either the cathode or the anode of the P-i-N diode; and an implanted region in the first I II -nitride epitaxial layer, wherein the implanted region of the first III-nitride epitaxial layer is of the first conductivity type, wherein the implanted region of the first I II -nitride epitaxial layer is characterized by a second charge density, and wherein the second charge density is lower than the first charge density.
The device of claim 11, wherein the first I II -nitride epitaxial layer comprises an n-type G aN epitaxial material.
The device of claim 11, wherein the depth of the implanted region is between 0.1 m and 1 km.
The device of claim 11, wherein a width of the implanted region is 0.5 m or greater.
The device of claim 11, wherein the I II -nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
The device of claim 11, further comprising a dielectric layer coupled to the implanted region.
Layer stacks claimed or described, ordered top of device to substrate.
III-nitride semiconductor device
III-nitride P-i-N diode
Materials described outside the worked examples.
III-nitride epitaxial layer (first conductivity type)
III-nitride epitaxial layer (second conductivity type)
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2-7 are simplified cross-sectional diagrams illustrating a process for creating a P- i-N diode in GaN with an implanted region(s) according to an …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
breakdown_voltage | ≥ 600 | — |
Temperature | 300–900 °C |
Related documents with shared materials, methods, properties, or citations.
n-type GaN epitaxial material
GaN
III-nitride substrate
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
| — |
Voltage | ≥ 1 V | — |
n-type GaN epitaxial material
GaN
III-nitride substrate
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
| — |
Voltage | ≥ 1 V | — |
n-type GaN epitaxial material
GaN
III-nitride substrate
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
| — |
Voltage | ≥ 1 V | — |
n-type GaN epitaxial material
GaN
III-nitride substrate
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
FIG. 6 is a simplified cross-sectional diagram illustrating ion implantation into a 5 portion of the first GaN epitaxial layer 201 to form one or more isolation …
| — |
Voltage | ≥ 1 V | — |