A method of fabricating a vertical JFET, the method comprising: providing a I II -nitride epitaxial structure including: a I II -nitride substrate; and a plurality of epitaxial layers coupled to the I II -nitride substrate; removing a portion of the plurality of epitaxial layers to form a set of recesses extending a predetermined distance into the plurality of epitaxial layers, wherein the set of recesses are disposed between remaining portions of the plurality of epitaxial layers; regrowing a plurality of regrown epitaxial layers coupled to at least a portion of one of the plurality of epitaxial layers and the remaining portions of the plurality of epitaxial layers, wherein one of the plurality of regrown epitaxial layers is electrically coupled to one of the plurality of epitaxial layers; removing a portion of the plurality of regrown epitaxial layers to expose a portion of the one of the plurality of epitaxial layers; forming a source contact electrically coupled to the one of the plurality of epitaxial layers; forming a gate contact electrically coupled to another of the plurality of epitaxial layers; and forming a drain contact electrically coupled to the III -nitride substrate. withdrawn

A vertical JFET comprising: a GaN substrate comprising a drain of the JF ET; a plurality of patterned epitaxial layers coupled to the GaN substrate, wherein: a distal epitaxial layer with respect to the GaN substrate comprises a first part of a source channel, and portions of adjacent patterned epitaxial layers are separated by a gap having a predetermined distance; a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap, wherein a proximal regrown epitaxial layer with respect to the GaN substrate comprises a second part of the source channel; a source contact passing through portions of a distal regrown epitaxial layer with respect to the GaN substrate and in electrical contact with the source channel; Page 3 of 7 App l. No. 13/735,912 PATENT Amdt. dated Response to Final Office Action of a gate contact in electrical contact with a distal regrown epitaxial layer with respect to the GaN substrate; and a drain contact in electrical contact with the GaN substrate.

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A method of fabricating a vertical JFET, the method comprising: providing a I II -nitride epitaxial structure including: a I II -nitride substrate; and a plurality of epitaxial layers coupled to the I II -nitride substrate; removing a portion of the plurality of epitaxial layers to form a set of recesses extending a predetermined distance into the plurality of epitaxial layers, wherein the set of recesses are disposed between remaining portions of the plurality of epitaxial layers; regrowing a plurality of regrown epitaxial layers coupled to at least a portion of one of the plurality of epitaxial layers and the remaining portions of the plurality of epitaxial layers, wherein one of the plurality of regrown epitaxial layers is electrically coupled to one of the plurality of epitaxial layers; removing a portion of the plurality of regrown epitaxial layers to expose a portion of the one of the plurality of epitaxial layers; forming a source contact electrically coupled to the one of the plurality of epitaxial layers; forming a gate contact electrically coupled to another of the plurality of epitaxial layers; and forming a drain contact electrically coupled to the III -nitride substrate. withdrawn

A vertical JFET comprising: a GaN substrate comprising a drain of the JF ET; a plurality of patterned epitaxial layers coupled to the GaN substrate, wherein: a distal epitaxial layer with respect to the GaN substrate comprises a first part of a source channel, and portions of adjacent patterned epitaxial layers are separated by a gap having a predetermined distance; a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap, wherein a proximal regrown epitaxial layer with respect to the GaN substrate comprises a second part of the source channel; a source contact passing through portions of a distal regrown epitaxial layer with respect to the GaN substrate and in electrical contact with the source channel; Page 3 of 7 App l. No. 13/735,912 PATENT Amdt. dated Response to Final Office Action of a gate contact in electrical contact with a distal regrown epitaxial layer with respect to the GaN substrate; and a drain contact in electrical contact with the GaN substrate.

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A method of fabricating a vertical JFET, the method comprising: providing a I II -nitride epitaxial structure including: a I II -nitride substrate; and a plurality of epitaxial layers coupled to the I II -nitride substrate; removing a portion of the plurality of epitaxial layers to form a set of recesses extending a predetermined distance into the plurality of epitaxial layers, wherein the set of recesses are disposed between remaining portions of the plurality of epitaxial layers; regrowing a plurality of regrown epitaxial layers coupled to at least a portion of one of the plurality of epitaxial layers and the remaining portions of the plurality of epitaxial layers, wherein one of the plurality of regrown epitaxial layers is electrically coupled to one of the plurality of epitaxial layers; removing a portion of the plurality of regrown epitaxial layers to expose a portion of the one of the plurality of epitaxial layers; forming a source contact electrically coupled to the one of the plurality of epitaxial layers; forming a gate contact electrically coupled to another of the plurality of epitaxial layers; and forming a drain contact electrically coupled to the III -nitride substrate. withdrawn

A vertical JFET comprising: a GaN substrate comprising a drain of the JF ET; a plurality of patterned epitaxial layers coupled to the GaN substrate, wherein: a distal epitaxial layer with respect to the GaN substrate comprises a first part of a source channel, and portions of adjacent patterned epitaxial layers are separated by a gap having a predetermined distance; a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap, wherein a proximal regrown epitaxial layer with respect to the GaN substrate comprises a second part of the source channel; a source contact passing through portions of a distal regrown epitaxial layer with respect to the GaN substrate and in electrical contact with the source channel; Page 3 of 7 App l. No. 13/735,912 PATENT Amdt. dated Response to Final Office Action of a gate contact in electrical contact with a distal regrown epitaxial layer with respect to the GaN substrate; and a drain contact in electrical contact with the GaN substrate.

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A method of fabricating a vertical JFET, the method comprising: providing a I II -nitride epitaxial structure including: a I II -nitride substrate; and a plurality of epitaxial layers coupled to the I II -nitride substrate; removing a portion of the plurality of epitaxial layers to form a set of recesses extending a predetermined distance into the plurality of epitaxial layers, wherein the set of recesses are disposed between remaining portions of the plurality of epitaxial layers; regrowing a plurality of regrown epitaxial layers coupled to at least a portion of one of the plurality of epitaxial layers and the remaining portions of the plurality of epitaxial layers, wherein one of the plurality of regrown epitaxial layers is electrically coupled to one of the plurality of epitaxial layers; removing a portion of the plurality of regrown epitaxial layers to expose a portion of the one of the plurality of epitaxial layers; forming a source contact electrically coupled to the one of the plurality of epitaxial layers; forming a gate contact electrically coupled to another of the plurality of epitaxial layers; and forming a drain contact electrically coupled to the III -nitride substrate. withdrawn

A vertical JFET comprising: a GaN substrate comprising a drain of the JF ET; a plurality of patterned epitaxial layers coupled to the GaN substrate, wherein: a distal epitaxial layer with respect to the GaN substrate comprises a first part of a source channel, and portions of adjacent patterned epitaxial layers are separated by a gap having a predetermined distance; a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap, wherein a proximal regrown epitaxial layer with respect to the GaN substrate comprises a second part of the source channel; a source contact passing through portions of a distal regrown epitaxial layer with respect to the GaN substrate and in electrical contact with the source channel; Page 3 of 7 App l. No. 13/735,912 PATENT Amdt. dated Response to Final Office Action of a gate contact in electrical contact with a distal regrown epitaxial layer with respect to the GaN substrate; and a drain contact in electrical contact with the GaN substrate.

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