Patent
US 10,886,328MONOLITHICALLY INTEGRATED GaN LIGHT-EMITTING DIODE WITH SILICON TRANSISTOR FOR DISPLAYS
Ning Li
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,886,328Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of semiconductor structure 100 after forming the semiconductor on insulator (SOI) substrate in accordance with an embodiment …
FIG. 2 is a cross-sectional view of semiconductor structure 200 after forming oxide layer 23 on semiconductor structure 200 in accordance with an embodiment of …
FIG. 3 is a cross-sectional view of the semiconductor structure after forming a trench exposing a sub-surface of a bottom silicon layer and depositing a first …
FIG. 4 is a cross-sectional view of semiconductor structure 400 after etching spacer layer 34 on exposed horizontal surfaces of semiconductor structure 400 to …
FIG. 5 is a cross-sectional view of semiconductor structure 500 after forming LED layer 55 on exposed horizontal surfaces of semiconductor structure 500 in …
FIG. 6 is a cross-sectional view of semiconductor structure 600 after a chemical- mechanical polish (CMP) of the top surface to semiconductor structure 600 in …
FIG. 7 is a cross-sectional view of the semiconductor structure after depositing a layer of dielectric material on the semiconductor structure in accordance …
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices acts as a switch connecting to a micro- light emitting diode of the plurality of micro-light emitting diodes.
The full color micro-display of claim 1, wherein the silicon on insulator substrate has a bottom layer of silicon with a surface in a (111) crystal orientation and a top layer of silicon with a surface in a (100) crystal orientation.
The full color micro-display of claim 1, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are formed using gallium nitride.
The full color micro-display of claim 1, wherein each micro-light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate has a size of 3 um by 3 um to 250 um by 250 um.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on insulator substrate provide a maximum current capacity of 10 mA.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on oxide substrate connect to a control I/C device.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes, wherein each of red micro-light emitting diodes, each of the green micro-light emitting diodes, and each of the blue micro-light emitting diodes are formed using a different light- emitting compound Group I II-V semiconductor material; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices, acting as a switch, connects to a micro- light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are each formed from two or more elements from a group of: gallium, nitride, aluminum, indium, arsenic, and phosphorous.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes are formed using one of Al I nGaP or AlGaAs.
The full color micro-display of claim 9, wherein the plurality of green micro-light emitting diodes are formed using of one InGaN, GaP, or GaN.
The full color micro-display of claim 9, wherein the plurality of blue micro-light emitting diodes are formed using one of GaN, GaP, or InGaN.
The full color micro-display of claim 9, wherein each LED of the plurality of micro- light emitting diodes in the silicon on insulator substrate has a size of 3 u m by 3 u m to 250 u m by 250 u m.
The full color micro-display of claim 9, wherein each transistor of the plurality of transistor devices provide a maximum cu rr ent capacity of 10 mA.
A method of forming a micro-light emitting diode and a transistor on a silicon on insulator (S OI) substrate, the method comprising: depositing an oxide layer over the S OI substrate, wherein the S OI substrate includes a bottom silicon layer with a (111) crystal orientation, a buried insulator layer, and a top silicon layer with a (100) crystal orientation; etching a trench in the S OI substrate; forming a sidewall spacer in the trench; depositing a layer of a light emitting compound Group I II -V semiconductor material; removing the oxide layer, a top portion of the top silicon layer with the (100) crystal orientation, and a top portion of the layer of a light emitting compound Group I II-V semiconductor material; depositing a protective dielectric cap material on the top layer of silicon and on the layer of a light emitting compound Group I II -V semiconductor material; selectively removing a portion of the protective dielectric cap material from exposed surfaces of the top layer of silicon; forming a transistor on the top layer of silicon adjacent to the protective cap material; removing the protective dielectric cap material; and forming the light-emitting diode using the layer of a light emitting compound Group III -V semiconductor material.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, further comprising connecting the micro-light emitting diode and the transistor with back-end of line semiconductor processes, wherein the micro-light emitting diode and the transistor form a pixel in a micro-display.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using GaN coated with phosphor.
The method of forming the micro-light emitting diode and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using a light-emitting compound semiconductor material using two or more elements from a group of gallium, indium, nitride, aluminum, arsenic, and phosphorous.
Layer stacks claimed or described, ordered top of device to substrate.
full color micro-display
micro-LED and transistor on SOI substrate (method structure)
Materials described outside the worked examples.
silicon on insulator substrate
silicon (111) bottom layer
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
transistor maximum current capacity | 10 mA | — |
Thickness | 3–250 um |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,886,328Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of semiconductor structure 100 after forming the semiconductor on insulator (SOI) substrate in accordance with an embodiment …
FIG. 2 is a cross-sectional view of semiconductor structure 200 after forming oxide layer 23 on semiconductor structure 200 in accordance with an embodiment of …
FIG. 3 is a cross-sectional view of the semiconductor structure after forming a trench exposing a sub-surface of a bottom silicon layer and depositing a first …
FIG. 4 is a cross-sectional view of semiconductor structure 400 after etching spacer layer 34 on exposed horizontal surfaces of semiconductor structure 400 to …
FIG. 5 is a cross-sectional view of semiconductor structure 500 after forming LED layer 55 on exposed horizontal surfaces of semiconductor structure 500 in …
FIG. 6 is a cross-sectional view of semiconductor structure 600 after a chemical- mechanical polish (CMP) of the top surface to semiconductor structure 600 in …
FIG. 7 is a cross-sectional view of the semiconductor structure after depositing a layer of dielectric material on the semiconductor structure in accordance …
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices acts as a switch connecting to a micro- light emitting diode of the plurality of micro-light emitting diodes.
The full color micro-display of claim 1, wherein the silicon on insulator substrate has a bottom layer of silicon with a surface in a (111) crystal orientation and a top layer of silicon with a surface in a (100) crystal orientation.
The full color micro-display of claim 1, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are formed using gallium nitride.
The full color micro-display of claim 1, wherein each micro-light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate has a size of 3 um by 3 um to 250 um by 250 um.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on insulator substrate provide a maximum current capacity of 10 mA.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on oxide substrate connect to a control I/C device.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes, wherein each of red micro-light emitting diodes, each of the green micro-light emitting diodes, and each of the blue micro-light emitting diodes are formed using a different light- emitting compound Group I II-V semiconductor material; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices, acting as a switch, connects to a micro- light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are each formed from two or more elements from a group of: gallium, nitride, aluminum, indium, arsenic, and phosphorous.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes are formed using one of Al I nGaP or AlGaAs.
The full color micro-display of claim 9, wherein the plurality of green micro-light emitting diodes are formed using of one InGaN, GaP, or GaN.
The full color micro-display of claim 9, wherein the plurality of blue micro-light emitting diodes are formed using one of GaN, GaP, or InGaN.
The full color micro-display of claim 9, wherein each LED of the plurality of micro- light emitting diodes in the silicon on insulator substrate has a size of 3 u m by 3 u m to 250 u m by 250 u m.
The full color micro-display of claim 9, wherein each transistor of the plurality of transistor devices provide a maximum cu rr ent capacity of 10 mA.
A method of forming a micro-light emitting diode and a transistor on a silicon on insulator (S OI) substrate, the method comprising: depositing an oxide layer over the S OI substrate, wherein the S OI substrate includes a bottom silicon layer with a (111) crystal orientation, a buried insulator layer, and a top silicon layer with a (100) crystal orientation; etching a trench in the S OI substrate; forming a sidewall spacer in the trench; depositing a layer of a light emitting compound Group I II -V semiconductor material; removing the oxide layer, a top portion of the top silicon layer with the (100) crystal orientation, and a top portion of the layer of a light emitting compound Group I II-V semiconductor material; depositing a protective dielectric cap material on the top layer of silicon and on the layer of a light emitting compound Group I II -V semiconductor material; selectively removing a portion of the protective dielectric cap material from exposed surfaces of the top layer of silicon; forming a transistor on the top layer of silicon adjacent to the protective cap material; removing the protective dielectric cap material; and forming the light-emitting diode using the layer of a light emitting compound Group III -V semiconductor material.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, further comprising connecting the micro-light emitting diode and the transistor with back-end of line semiconductor processes, wherein the micro-light emitting diode and the transistor form a pixel in a micro-display.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using GaN coated with phosphor.
The method of forming the micro-light emitting diode and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using a light-emitting compound semiconductor material using two or more elements from a group of gallium, indium, nitride, aluminum, arsenic, and phosphorous.
Layer stacks claimed or described, ordered top of device to substrate.
full color micro-display
micro-LED and transistor on SOI substrate (method structure)
Materials described outside the worked examples.
silicon on insulator substrate
silicon (111) bottom layer
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
transistor maximum current capacity | 10 mA | — |
Thickness | 3–250 um |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,886,328Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of semiconductor structure 100 after forming the semiconductor on insulator (SOI) substrate in accordance with an embodiment …
FIG. 2 is a cross-sectional view of semiconductor structure 200 after forming oxide layer 23 on semiconductor structure 200 in accordance with an embodiment of …
FIG. 3 is a cross-sectional view of the semiconductor structure after forming a trench exposing a sub-surface of a bottom silicon layer and depositing a first …
FIG. 4 is a cross-sectional view of semiconductor structure 400 after etching spacer layer 34 on exposed horizontal surfaces of semiconductor structure 400 to …
FIG. 5 is a cross-sectional view of semiconductor structure 500 after forming LED layer 55 on exposed horizontal surfaces of semiconductor structure 500 in …
FIG. 6 is a cross-sectional view of semiconductor structure 600 after a chemical- mechanical polish (CMP) of the top surface to semiconductor structure 600 in …
FIG. 7 is a cross-sectional view of the semiconductor structure after depositing a layer of dielectric material on the semiconductor structure in accordance …
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices acts as a switch connecting to a micro- light emitting diode of the plurality of micro-light emitting diodes.
The full color micro-display of claim 1, wherein the silicon on insulator substrate has a bottom layer of silicon with a surface in a (111) crystal orientation and a top layer of silicon with a surface in a (100) crystal orientation.
The full color micro-display of claim 1, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are formed using gallium nitride.
The full color micro-display of claim 1, wherein each micro-light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate has a size of 3 um by 3 um to 250 um by 250 um.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on insulator substrate provide a maximum current capacity of 10 mA.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on oxide substrate connect to a control I/C device.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes, wherein each of red micro-light emitting diodes, each of the green micro-light emitting diodes, and each of the blue micro-light emitting diodes are formed using a different light- emitting compound Group I II-V semiconductor material; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices, acting as a switch, connects to a micro- light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are each formed from two or more elements from a group of: gallium, nitride, aluminum, indium, arsenic, and phosphorous.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes are formed using one of Al I nGaP or AlGaAs.
The full color micro-display of claim 9, wherein the plurality of green micro-light emitting diodes are formed using of one InGaN, GaP, or GaN.
The full color micro-display of claim 9, wherein the plurality of blue micro-light emitting diodes are formed using one of GaN, GaP, or InGaN.
The full color micro-display of claim 9, wherein each LED of the plurality of micro- light emitting diodes in the silicon on insulator substrate has a size of 3 u m by 3 u m to 250 u m by 250 u m.
The full color micro-display of claim 9, wherein each transistor of the plurality of transistor devices provide a maximum cu rr ent capacity of 10 mA.
A method of forming a micro-light emitting diode and a transistor on a silicon on insulator (S OI) substrate, the method comprising: depositing an oxide layer over the S OI substrate, wherein the S OI substrate includes a bottom silicon layer with a (111) crystal orientation, a buried insulator layer, and a top silicon layer with a (100) crystal orientation; etching a trench in the S OI substrate; forming a sidewall spacer in the trench; depositing a layer of a light emitting compound Group I II -V semiconductor material; removing the oxide layer, a top portion of the top silicon layer with the (100) crystal orientation, and a top portion of the layer of a light emitting compound Group I II-V semiconductor material; depositing a protective dielectric cap material on the top layer of silicon and on the layer of a light emitting compound Group I II -V semiconductor material; selectively removing a portion of the protective dielectric cap material from exposed surfaces of the top layer of silicon; forming a transistor on the top layer of silicon adjacent to the protective cap material; removing the protective dielectric cap material; and forming the light-emitting diode using the layer of a light emitting compound Group III -V semiconductor material.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, further comprising connecting the micro-light emitting diode and the transistor with back-end of line semiconductor processes, wherein the micro-light emitting diode and the transistor form a pixel in a micro-display.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using GaN coated with phosphor.
The method of forming the micro-light emitting diode and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using a light-emitting compound semiconductor material using two or more elements from a group of gallium, indium, nitride, aluminum, arsenic, and phosphorous.
Layer stacks claimed or described, ordered top of device to substrate.
full color micro-display
micro-LED and transistor on SOI substrate (method structure)
Materials described outside the worked examples.
silicon on insulator substrate
silicon (111) bottom layer
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
transistor maximum current capacity | 10 mA | — |
Thickness | 3–250 um |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,886,328Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of semiconductor structure 100 after forming the semiconductor on insulator (SOI) substrate in accordance with an embodiment …
FIG. 2 is a cross-sectional view of semiconductor structure 200 after forming oxide layer 23 on semiconductor structure 200 in accordance with an embodiment of …
FIG. 3 is a cross-sectional view of the semiconductor structure after forming a trench exposing a sub-surface of a bottom silicon layer and depositing a first …
FIG. 4 is a cross-sectional view of semiconductor structure 400 after etching spacer layer 34 on exposed horizontal surfaces of semiconductor structure 400 to …
FIG. 5 is a cross-sectional view of semiconductor structure 500 after forming LED layer 55 on exposed horizontal surfaces of semiconductor structure 500 in …
FIG. 6 is a cross-sectional view of semiconductor structure 600 after a chemical- mechanical polish (CMP) of the top surface to semiconductor structure 600 in …
FIG. 7 is a cross-sectional view of the semiconductor structure after depositing a layer of dielectric material on the semiconductor structure in accordance …
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices acts as a switch connecting to a micro- light emitting diode of the plurality of micro-light emitting diodes.
The full color micro-display of claim 1, wherein the silicon on insulator substrate has a bottom layer of silicon with a surface in a (111) crystal orientation and a top layer of silicon with a surface in a (100) crystal orientation.
The full color micro-display of claim 1, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are formed using gallium nitride.
The full color micro-display of claim 1, wherein each micro-light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate has a size of 3 um by 3 um to 250 um by 250 um.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on insulator substrate provide a maximum current capacity of 10 mA.
The full color micro-display of claim 1, wherein the plurality of transistor devices in the silicon on oxide substrate connect to a control I/C device.
A full color micro-display, comprising: a plurality of micro-light emitting diodes in a silicon on insulator substrate, wherein the plurality of micro-light emitting diodes include a plurality of red micro-light emitting diodes, a plurality of green micro-light emitting diodes, and a plurality of blue micro-light emitting diodes, wherein each of red micro-light emitting diodes, each of the green micro-light emitting diodes, and each of the blue micro-light emitting diodes are formed using a different light- emitting compound Group I II-V semiconductor material; and a plurality of transistor devices in the silicon on insulator substrate, wherein each transistor device of the plurality of transistor devices, acting as a switch, connects to a micro- light emitting diode of the plurality of micro-light emitting diodes in the silicon on insulator substrate.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes, the plurality of green micro-light emitting diodes, and the plurality of blue micro-light emitting diodes are each formed from two or more elements from a group of: gallium, nitride, aluminum, indium, arsenic, and phosphorous.
The full color micro-display of claim 9, wherein the plurality of red micro-light emitting diodes are formed using one of Al I nGaP or AlGaAs.
The full color micro-display of claim 9, wherein the plurality of green micro-light emitting diodes are formed using of one InGaN, GaP, or GaN.
The full color micro-display of claim 9, wherein the plurality of blue micro-light emitting diodes are formed using one of GaN, GaP, or InGaN.
The full color micro-display of claim 9, wherein each LED of the plurality of micro- light emitting diodes in the silicon on insulator substrate has a size of 3 u m by 3 u m to 250 u m by 250 u m.
The full color micro-display of claim 9, wherein each transistor of the plurality of transistor devices provide a maximum cu rr ent capacity of 10 mA.
A method of forming a micro-light emitting diode and a transistor on a silicon on insulator (S OI) substrate, the method comprising: depositing an oxide layer over the S OI substrate, wherein the S OI substrate includes a bottom silicon layer with a (111) crystal orientation, a buried insulator layer, and a top silicon layer with a (100) crystal orientation; etching a trench in the S OI substrate; forming a sidewall spacer in the trench; depositing a layer of a light emitting compound Group I II -V semiconductor material; removing the oxide layer, a top portion of the top silicon layer with the (100) crystal orientation, and a top portion of the layer of a light emitting compound Group I II-V semiconductor material; depositing a protective dielectric cap material on the top layer of silicon and on the layer of a light emitting compound Group I II -V semiconductor material; selectively removing a portion of the protective dielectric cap material from exposed surfaces of the top layer of silicon; forming a transistor on the top layer of silicon adjacent to the protective cap material; removing the protective dielectric cap material; and forming the light-emitting diode using the layer of a light emitting compound Group III -V semiconductor material.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, further comprising connecting the micro-light emitting diode and the transistor with back-end of line semiconductor processes, wherein the micro-light emitting diode and the transistor form a pixel in a micro-display.
The method of forming the micro-light emitting diodes and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using GaN coated with phosphor.
The method of forming the micro-light emitting diode and the transistor on the S OI substrate of claim 17, wherein the micro-light emitting diode is formed using a light-emitting compound semiconductor material using two or more elements from a group of gallium, indium, nitride, aluminum, arsenic, and phosphorous.
Layer stacks claimed or described, ordered top of device to substrate.
full color micro-display
micro-LED and transistor on SOI substrate (method structure)
Materials described outside the worked examples.
silicon on insulator substrate
silicon (111) bottom layer
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 8. Dielectric layer 77 provides a cap covering LED layer 55 during subsequent semiconductor device processing. [0033]
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
transistor maximum current capacity | 10 mA | — |
Thickness | 3–250 um |
Related documents with shared materials, methods, properties, or citations.
gallium nitride
GaN
phosphor
epoxy phosphate
first quantum dot (red-emitting)
second quantum dot (green-emitting)
light-emitting compound Group III-V semiconductor material
AlInGaP
AlGaAs
InGaN
GaP
buried oxide layer (BOX)
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
| — |
Thickness | 3–50 um | — |
Thickness | 1–50 um | — |
Thickness | 3–250 µm | — |
Thickness | 5–500 µm | — |
Thickness | 5–100 um | — |
Thickness | 5–20 µm | — |
Thickness | 1–50 µm | — |
Thickness | 8–15 um | — |
gallium nitride
GaN
phosphor
epoxy phosphate
first quantum dot (red-emitting)
second quantum dot (green-emitting)
light-emitting compound Group III-V semiconductor material
AlInGaP
AlGaAs
InGaN
GaP
buried oxide layer (BOX)
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
| — |
Thickness | 3–50 um | — |
Thickness | 1–50 um | — |
Thickness | 3–250 µm | — |
Thickness | 5–500 µm | — |
Thickness | 5–100 um | — |
Thickness | 5–20 µm | — |
Thickness | 1–50 µm | — |
Thickness | 8–15 um | — |
gallium nitride
GaN
phosphor
epoxy phosphate
first quantum dot (red-emitting)
second quantum dot (green-emitting)
light-emitting compound Group III-V semiconductor material
AlInGaP
AlGaAs
InGaN
GaP
buried oxide layer (BOX)
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
| — |
Thickness | 3–50 um | — |
Thickness | 1–50 um | — |
Thickness | 3–250 µm | — |
Thickness | 5–500 µm | — |
Thickness | 5–100 um | — |
Thickness | 5–20 µm | — |
Thickness | 1–50 µm | — |
Thickness | 8–15 um | — |
gallium nitride
GaN
phosphor
epoxy phosphate
first quantum dot (red-emitting)
second quantum dot (green-emitting)
light-emitting compound Group III-V semiconductor material
AlInGaP
AlGaAs
InGaN
GaP
buried oxide layer (BOX)
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 9. The thinness of spacer layer 34 can be important to reduce or prevent blockage of light emitted from the completed LED. [0030]
FIG. 10. In this way, transistor 122 can act as a switch for LED 120. In various embodiments, interconnect 123B connects transistor 122 to a control integrated …
FIG. 11 depicts a top surface of silicon layer 12, transistor 122, LED 120, and interconnects 123A and 123B. In various embodiments, transistor 122 is a switch …
FIG. 12 is a top view of second semiconductor structure with three LED devices and three transistors on a S OI substrate in accordance with an embodiment of …
| — |
Thickness | 3–50 um | — |
Thickness | 1–50 um | — |
Thickness | 3–250 µm | — |
Thickness | 5–500 µm | — |
Thickness | 5–100 um | — |
Thickness | 5–20 µm | — |
Thickness | 1–50 µm | — |
Thickness | 8–15 um | — |