HIGH-VOLTAGE GALLIUM NITRIDE SCHOTTKY DIODE

Arnaud Yvon

Patent

Atlas literature

Patent

US 9,735,292

HIGH-VOLTAGE GALLIUM NITRIDE SCHOTTKY DIODE

Arnaud Yvon

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

8 independent · 20 dependent

1
IndependentSiGaNAlGaNSiGaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)
A Schottky diode comprising, in the following order between a lower surface and an upper surface: a doped silicon support; a non-doped silicon layer; a buﬀer layer; a non-doped GaN layer; and an A l GaN layer; and further including: a ﬁrst metallization extending through the A l GaN layer forming an ohmic contact; a second metallization on the A l GaN layer forming a Schottky contact; a ﬁrst via extending from the ﬁrst metallization towards the lower surface and passing through the non-doped GaN layer, the buﬀer layer and the non-doped silicon layer; and a second via extending from the second metallization towards the upper surface.
1. 2
  Dependent← claim 1GaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)
  The Schottky diode of claim 1, wherein the ﬁrst and second metallizations each form a periodically repeated pattern.
2. 5
  Dependent← claim 1SiO₂GaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)
  The Schottky diode of claim 1, further comprising, between the doped silicon support and the non-doped silicon layer, a silicon oxide layer, and wherein said ﬁrst via further extends passing through the silicon oxide layer.
3. 6
  Dependent← claim 1GaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)
  The Schottky diode of claim 1, wherein the ﬁrst via extends to make contact with a top of the doped silicon support.
4. 8
  Dependent← claim 1GaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)
  The Schottky diode of claim 1, wherein the second metallization comprises periodically repeated ﬁrst islands.
5. 27
  Dependent← claim 1GaNSiGaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)
  The Schottky diode of claim 1, wherein the buﬀer layer is on and in direct contact with the non-doped silicon layer, and wherein the non-doped GaN layer is on and in direct contact with the buﬀer layer. 5 Gardere0l-10093393v.1 CUSTOMER NO. 117381 PATENT APPLICATION Docket No. 140649-1100
3
Independent
Claims 3 -4.. canceled
4
Independent
canceled
7
Independent
. 2 Gardere0l-10093393v.1 CUSTOMER NO. 117381 PATENT APPLICATION Docket No. 140649-1100 canceled
12
IndependentSiGaNAlGaNSiSiO₂GaN Schottky diode on SOI substrate (claim 12 embodiment)
A Schottky diode, comprising: a silicon on insulator substrate having a semiconductor support, an insulator layer on the semiconductor support and a semiconductor layer on the insulator layer; an A l GaN layer over the silicon on insulator substrate; a non-doped silicon layer between the semiconductor layer and the A l GaN layer; a non-doped GaN layer between the non-doped silicon layer and the A l GaN layer; a ﬁrst metallization pattern extending through the A l GaN layer forming an ohmic contact; a second metallization pattern on the A l GaN layer forming a Schottky contact; ﬁrst vias extending from a bottom of the ﬁrst metallization pattern through the nondoped GaN AlGaN layer, the non-doped silicon GaN layer, the semiconductor layer and the insulator layer to contact the semiconductor support; and second vias extending from a top of the second metallization pattern through a further insulating layer overlying the ﬁrst and second metallization patterns.
1. 14
  Dependent← claim 12AlNGaN Schottky diode on SOI substrate (claim 12 embodiment)
  The Schottky diode of claim 12, further comprising an aluminum nitride layer between the non-doped silicon layer and the non-doped GaN layer, said ﬁrst vias further passing through said aluminum nitride layer.
2. 16
  Dependent← claim 12GaN Schottky diode on SOI substrate (claim 12 embodiment)
  The Schottky diode of claim 12, wherein the ﬁrst and second metallization patterns form interleaved strips.
3. 17
  Dependent← claim 12GaN Schottky diode on SOI substrate (claim 12 embodiment)
  The Schottky diode of claim 12, wherein the ﬁrst metallization pattern forms hexagons and the second metallization pattern forms islands within the hexagons.
4. 18
  Dependent← claim 12GaN Schottky diode on SOI substrate (claim 12 embodiment)
  The Schottky diode of claim 12, wherein the ﬁrst and second metallization patterns form islands arranged in a checkerboard pattern.
13
Independent
. 3 Gardere0l-10093393v.1 CUSTOMER NO. 117381 PATENT APPLICATION Docket No. 140649-1100 canceled
15
Independent
. canceled
19
IndependentAlGaNSiGaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
A Schottky diode, comprising: a bulk semiconductor substrate; a non-doped semiconductor layer on the bulk semiconductor substrate; a plurality of doped regions within the non-doped semiconductor layer; an A l GaN layer over the non-doped semiconductor layer; a ﬁrst metallization pattern extending through the A l GaN layer forming an ohmic contact; a second metallization pattern on the A l GaN layer forming a Schottky contact; ﬁrst vias extending from a bottom of the ﬁrst metallization pattern to contact the doped regions of the non-doped semiconductor layer; and second vias extending from a top of the second metallization pattern through an insulating layer overlying the ﬁrst and second metallization patterns. 4 Gardere0l-10093393v.1 CUSTOMER NO. 117381 PATENT APPLICATION Docket No. 140649-1100
1. 20
  Dependent← claim 19AlNGaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, further comprising an aluminum nitride layer between the non-doped semiconductor layer and the A l GaN layer, said ﬁrst vias further passing through said aluminum nitride layer.
2. 21
  Dependent← claim 19GaNGaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, further comprising a non-doped GaN layer between the nondoped semiconductor layer and the A l GaN layer, said ﬁrst vias further passing through said nondoped GaN layer.
3. 22
  Dependent← claim 19GaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, wherein the ﬁrst and second metallization patterns form interleaved strips.
4. 23
  Dependent← claim 19GaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, wherein the ﬁrst metallization pattern forms hexagons and the second metallization pattern forms islands within the hexagons.
5. 24
  Dependent← claim 19GaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, wherein the ﬁrst and second metallization patterns form islands arranged in a checkerboard pattern.
6. 25
  Dependent← claim 19GaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, wherein plurality of doped regions have a same thickness as the non-doped semiconductor layer and contact a top of the bulk semiconductor substrate.
7. 26
  Dependent← claim 19GaN Schottky diode on bulk semiconductor substrate with doped regions (claim 19 embodiment)
  The Schottky diode of claim 19, further including a buﬀer layer on and in direct contact with the non-doped semiconductor layer.

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

GaN Schottky diode on doped silicon support with SOI-type substrate (claim 1 embodiment)

AlGaNbarrier layer

GaNchannel/drift layer

buffer layerbuffer layer

Sinon-doped silicon interlayer

Sisubstrate

GaN Schottky diode on SOI substrate (claim 12 embodiment)

Materials

Materials described outside the worked examples.

doped silicon support

Substrate

Non-Doped Interlayer/Breakdown Voltage Enhancement

non-doped GaN layer

GaN

Why these are connected

Related documents with shared materials, methods, properties, or citations.

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