Patent
US 9,819,152Method to fabricate GaN-based vertical-cavity surface-emitting devices featuring silicon-
PING-HUI YEH
US
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Patent
Atlas literature
Patent
US 9,819,152Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a basic diagram of a GaN-based light-emitting device with a silicon-diffusion defined current blocking layer of the present invention;
Figure 2 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking layer of the present invention in a horizontal configuration;
Figure 3 is a CCD photograph showing various size of light-emitting aperture with current 10 mA, indicating that the size of light-emitting aperture equals to the silicon-diffusion defined aperture of the present invention;
Figure 4 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking l ayer of the present invention in a vertical configuration. Detailed Description of the Preferred Embodiments As shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region, including a vertical-cavity surface-emitting laser and a resonant-cavity light emitting diode in a horizontal configuration-s4a-a %*emte*4Mg-4, wherein the method exploits an epitaxial wafer including a P-type GaN layer, a multiple-quantum well active layer, and a N-type GaN layer, comprising steps: determining the pattern of a silicon-diffusion region with photolithography; etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer by placing the wafer in an inductively coupled plasma-reactive ion etcher; coating a silicon thin film on the pre-patterned surface of the P-type gallium nitride layer, and lifting off the silicon deposited on the non-diffusion areas; heating to diffuse the silicon of the silicon thin film downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the silicon-diffusion region of the P-type GaN layer that has been diffused with the silicon is converted into a N-type gallium nitride region forming a current confining region, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, furnishing a light-emitting aperture in the light-emitting region, wherein on top of the outer edge of the central hollow annular shape is superposed with a silicon nitride or oxide insulating layer, and soaking the wafer in buffered oxide etch solution for removing residual silicon left on the surface after diffusion to complete the fabrication process of the silicon-diffusion defined current blocking region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the thickness of etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer is from 5 to 20 nm.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, wherein the size of the current-passing aperture of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based light-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, including edge-emitting laser and super luminescent diode, wherein the silicon-diffusion region circumscribing a current-passing area for light-emitting devices, wherein the size of the current-passing area of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the coating surface is kept smooth to enhance optical coating quality, resonant effect, and reducing spectral width of light-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion defined current blocking region is determined by the diffusion time that depends on the thickness and hole 3 concentration of the P-type gallium nitride layer, while the thickness or hole concentration increases or decreases the diffusion time will increase or decrease correspondingly in a range of 10 to 30 minutes to obtain an appropriate diffusion depth, wherein the depth of the silicon-diffusion is kept more than 30 nm away from the multi-quantum well layer of the GaN-based vertical cavity surface-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the fabrication of current blocking region uses an electron beam evaporator for coating a silicon thin film with thickness from 3 0 nm to 100 nm on the surface of the P-type gallium nitride layer, followed by heating the silicon of the silicon thin film to diffuse downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the heating temperature range is from 750 to 850 degree C with duration of 10 to 30 minutes for controlling the depth of the silicon-diffusion. 4
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based vertical-cavity surface-emitting laser (VCSEL)
GaN-based resonant-cavity light-emitting diode (RCLED)
Materials described outside the worked examples.
P-type GaN layer
GaN
P-type gallium indium nitride thin film
GaInN
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0–100 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,819,152Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a basic diagram of a GaN-based light-emitting device with a silicon-diffusion defined current blocking layer of the present invention;
Figure 2 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking layer of the present invention in a horizontal configuration;
Figure 3 is a CCD photograph showing various size of light-emitting aperture with current 10 mA, indicating that the size of light-emitting aperture equals to the silicon-diffusion defined aperture of the present invention;
Figure 4 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking l ayer of the present invention in a vertical configuration. Detailed Description of the Preferred Embodiments As shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region, including a vertical-cavity surface-emitting laser and a resonant-cavity light emitting diode in a horizontal configuration-s4a-a %*emte*4Mg-4, wherein the method exploits an epitaxial wafer including a P-type GaN layer, a multiple-quantum well active layer, and a N-type GaN layer, comprising steps: determining the pattern of a silicon-diffusion region with photolithography; etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer by placing the wafer in an inductively coupled plasma-reactive ion etcher; coating a silicon thin film on the pre-patterned surface of the P-type gallium nitride layer, and lifting off the silicon deposited on the non-diffusion areas; heating to diffuse the silicon of the silicon thin film downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the silicon-diffusion region of the P-type GaN layer that has been diffused with the silicon is converted into a N-type gallium nitride region forming a current confining region, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, furnishing a light-emitting aperture in the light-emitting region, wherein on top of the outer edge of the central hollow annular shape is superposed with a silicon nitride or oxide insulating layer, and soaking the wafer in buffered oxide etch solution for removing residual silicon left on the surface after diffusion to complete the fabrication process of the silicon-diffusion defined current blocking region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the thickness of etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer is from 5 to 20 nm.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, wherein the size of the current-passing aperture of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based light-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, including edge-emitting laser and super luminescent diode, wherein the silicon-diffusion region circumscribing a current-passing area for light-emitting devices, wherein the size of the current-passing area of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the coating surface is kept smooth to enhance optical coating quality, resonant effect, and reducing spectral width of light-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion defined current blocking region is determined by the diffusion time that depends on the thickness and hole 3 concentration of the P-type gallium nitride layer, while the thickness or hole concentration increases or decreases the diffusion time will increase or decrease correspondingly in a range of 10 to 30 minutes to obtain an appropriate diffusion depth, wherein the depth of the silicon-diffusion is kept more than 30 nm away from the multi-quantum well layer of the GaN-based vertical cavity surface-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the fabrication of current blocking region uses an electron beam evaporator for coating a silicon thin film with thickness from 3 0 nm to 100 nm on the surface of the P-type gallium nitride layer, followed by heating the silicon of the silicon thin film to diffuse downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the heating temperature range is from 750 to 850 degree C with duration of 10 to 30 minutes for controlling the depth of the silicon-diffusion. 4
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based vertical-cavity surface-emitting laser (VCSEL)
GaN-based resonant-cavity light-emitting diode (RCLED)
Materials described outside the worked examples.
P-type GaN layer
GaN
P-type gallium indium nitride thin film
GaInN
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0–100 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,819,152Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a basic diagram of a GaN-based light-emitting device with a silicon-diffusion defined current blocking layer of the present invention;
Figure 2 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking layer of the present invention in a horizontal configuration;
Figure 3 is a CCD photograph showing various size of light-emitting aperture with current 10 mA, indicating that the size of light-emitting aperture equals to the silicon-diffusion defined aperture of the present invention;
Figure 4 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking l ayer of the present invention in a vertical configuration. Detailed Description of the Preferred Embodiments As shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region, including a vertical-cavity surface-emitting laser and a resonant-cavity light emitting diode in a horizontal configuration-s4a-a %*emte*4Mg-4, wherein the method exploits an epitaxial wafer including a P-type GaN layer, a multiple-quantum well active layer, and a N-type GaN layer, comprising steps: determining the pattern of a silicon-diffusion region with photolithography; etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer by placing the wafer in an inductively coupled plasma-reactive ion etcher; coating a silicon thin film on the pre-patterned surface of the P-type gallium nitride layer, and lifting off the silicon deposited on the non-diffusion areas; heating to diffuse the silicon of the silicon thin film downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the silicon-diffusion region of the P-type GaN layer that has been diffused with the silicon is converted into a N-type gallium nitride region forming a current confining region, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, furnishing a light-emitting aperture in the light-emitting region, wherein on top of the outer edge of the central hollow annular shape is superposed with a silicon nitride or oxide insulating layer, and soaking the wafer in buffered oxide etch solution for removing residual silicon left on the surface after diffusion to complete the fabrication process of the silicon-diffusion defined current blocking region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the thickness of etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer is from 5 to 20 nm.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, wherein the size of the current-passing aperture of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based light-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, including edge-emitting laser and super luminescent diode, wherein the silicon-diffusion region circumscribing a current-passing area for light-emitting devices, wherein the size of the current-passing area of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the coating surface is kept smooth to enhance optical coating quality, resonant effect, and reducing spectral width of light-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion defined current blocking region is determined by the diffusion time that depends on the thickness and hole 3 concentration of the P-type gallium nitride layer, while the thickness or hole concentration increases or decreases the diffusion time will increase or decrease correspondingly in a range of 10 to 30 minutes to obtain an appropriate diffusion depth, wherein the depth of the silicon-diffusion is kept more than 30 nm away from the multi-quantum well layer of the GaN-based vertical cavity surface-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the fabrication of current blocking region uses an electron beam evaporator for coating a silicon thin film with thickness from 3 0 nm to 100 nm on the surface of the P-type gallium nitride layer, followed by heating the silicon of the silicon thin film to diffuse downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the heating temperature range is from 750 to 850 degree C with duration of 10 to 30 minutes for controlling the depth of the silicon-diffusion. 4
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based vertical-cavity surface-emitting laser (VCSEL)
GaN-based resonant-cavity light-emitting diode (RCLED)
Materials described outside the worked examples.
P-type GaN layer
GaN
P-type gallium indium nitride thin film
GaInN
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0–100 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,819,152Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a basic diagram of a GaN-based light-emitting device with a silicon-diffusion defined current blocking layer of the present invention;
Figure 2 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking layer of the present invention in a horizontal configuration;
Figure 3 is a CCD photograph showing various size of light-emitting aperture with current 10 mA, indicating that the size of light-emitting aperture equals to the silicon-diffusion defined aperture of the present invention;
Figure 4 is a schematic diagram of a GaN-based vertical-cavity surface-emitting device with a silicon-diffusion defined current blocking l ayer of the present invention in a vertical configuration. Detailed Description of the Preferred Embodiments As shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region, including a vertical-cavity surface-emitting laser and a resonant-cavity light emitting diode in a horizontal configuration-s4a-a %*emte*4Mg-4, wherein the method exploits an epitaxial wafer including a P-type GaN layer, a multiple-quantum well active layer, and a N-type GaN layer, comprising steps: determining the pattern of a silicon-diffusion region with photolithography; etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer by placing the wafer in an inductively coupled plasma-reactive ion etcher; coating a silicon thin film on the pre-patterned surface of the P-type gallium nitride layer, and lifting off the silicon deposited on the non-diffusion areas; heating to diffuse the silicon of the silicon thin film downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the silicon-diffusion region of the P-type GaN layer that has been diffused with the silicon is converted into a N-type gallium nitride region forming a current confining region, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, furnishing a light-emitting aperture in the light-emitting region, wherein on top of the outer edge of the central hollow annular shape is superposed with a silicon nitride or oxide insulating layer, and soaking the wafer in buffered oxide etch solution for removing residual silicon left on the surface after diffusion to complete the fabrication process of the silicon-diffusion defined current blocking region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the thickness of etching away high concentration holes of the P-type gallium indium nitride thin film on the surface of the P-type GaN layer is from 5 to 20 nm.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion region is of a hollow annular shape, and the inner edge of the central hollow annular shape circumscribes a current-passing aperture for light-emitting devices, wherein the size of the current-passing aperture of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based light-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, including edge-emitting laser and super luminescent diode, wherein the silicon-diffusion region circumscribing a current-passing area for light-emitting devices, wherein the size of the current-passing area of the light-emitting devices is determined by the size of the central hollow area surrounded by the silicon-diffusion region.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the coating surface is kept smooth to enhance optical coating quality, resonant effect, and reducing spectral width of light-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the silicon-diffusion defined current blocking region is determined by the diffusion time that depends on the thickness and hole 3 concentration of the P-type gallium nitride layer, while the thickness or hole concentration increases or decreases the diffusion time will increase or decrease correspondingly in a range of 10 to 30 minutes to obtain an appropriate diffusion depth, wherein the depth of the silicon-diffusion is kept more than 30 nm away from the multi-quantum well layer of the GaN-based vertical cavity surface-emitting devices.
The method for the fabrication of GaN-based vertical cavity surface-emitting devices with a structure having a silicon-diffusion defined current blocking region of claim 1, wherein the fabrication of current blocking region uses an electron beam evaporator for coating a silicon thin film with thickness from 3 0 nm to 100 nm on the surface of the P-type gallium nitride layer, followed by heating the silicon of the silicon thin film to diffuse downward into the P-type GaN layer in a rapid thermal annealing furnace, wherein the heating temperature range is from 750 to 850 degree C with duration of 10 to 30 minutes for controlling the depth of the silicon-diffusion. 4
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based vertical-cavity surface-emitting laser (VCSEL)
GaN-based resonant-cavity light-emitting diode (RCLED)
Materials described outside the worked examples.
P-type GaN layer
GaN
P-type gallium indium nitride thin film
GaInN
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0–100 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
GaN-based edge-emitting laser
No layer stack recorded.
GaN-based super luminescent diode
No layer stack recorded.
silicon thin film
Si
silicon nitride or oxide insulating layer
multiple-quantum well active layer
buffered oxide etch solution
| 5–20 nm |
| — |
Duration | 10–30 minutes | — |
Thickness | ≥ 30 nm | — |
GaN-based edge-emitting laser
No layer stack recorded.
GaN-based super luminescent diode
No layer stack recorded.
silicon thin film
Si
silicon nitride or oxide insulating layer
multiple-quantum well active layer
buffered oxide etch solution
| 5–20 nm |
| — |
Duration | 10–30 minutes | — |
Thickness | ≥ 30 nm | — |
GaN-based edge-emitting laser
No layer stack recorded.
GaN-based super luminescent diode
No layer stack recorded.
silicon thin film
Si
silicon nitride or oxide insulating layer
multiple-quantum well active layer
buffered oxide etch solution
| 5–20 nm |
| — |
Duration | 10–30 minutes | — |
Thickness | ≥ 30 nm | — |
GaN-based edge-emitting laser
No layer stack recorded.
GaN-based super luminescent diode
No layer stack recorded.
silicon thin film
Si
silicon nitride or oxide insulating layer
multiple-quantum well active layer
buffered oxide etch solution
| 5–20 nm |
| — |
Duration | 10–30 minutes | — |
Thickness | ≥ 30 nm | — |