Patent
US 11,239,081METHOD FOR PREPARING OHMIC CONTACT ELECTRODE OF GALLIUM NITRIDE-BASED DEVICE
Yongliang TAN
US
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Patent
Atlas literature
Patent
US 11,239,081Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic diagram illustrating an implementation flow of a method for preparing an ohmic contact electrode of a GaN-based device according to an …
FIG. 2 is a schematic diagram illustrating structures obtained during an implementation flow of the method for preparing an ohmic contact electrode of a …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for preparing an ohmic contact electrode of a gallium nitride (GaN)-based device, comprising following steps: step S 1: growing a first dielectric layer on an upper surface of the GaN-based device; step S 2: implanting at least one of silicon ions or indium ions into a region of the first dielectric layer corresponding to an ohmic contact electrode region of the GaN- based device and into the ohmic contact electrode region; step S3: growing a second dielectric layer on an upper surface of the first dielectric layer; step S4: activating the at least one of silicon ions or indium ions using a high temperature annealing process, so as to form an N-type highly doped region; step S5: respectively removing portions, corresponding to the ohmic contact electrode region, of the first dielectric layer and the second dielectric layer; and step S6: growing a metal layer on an upper surface of the ohmic contact electrode region of the GaN-based device, so as to form the ohmic contact electrode, wherein the step S 2 comprises: step S 21: applying a first photoresist layer to an upper surface of a portion of the first dielectric layer corresponding to a first region of the GaN-based device, wherein the first region is a region other than the ohmic contact electrode region of the GaN-based device; step S 22: implanting the at least one of silicon ions or indium ions using ion implantation; and step S23: removing the first photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the step S₃ and the step S₄ comprise [[ing]] the following steps: step S₃ 1: applying a second photoresist layer to an upper surface of a portion of the second dielectric layer corresponding to the first region; step S 32: removing the portions of the first dielectric layer and the second dielectric layer corresponding to the ohmic contact electrode region respectively using a dry etching process; step 33: performing evaporation deposition of the metal layer on the upper surface of the GaN-based device using an electron beam evaporation process; and step 34: removing the second photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the first dielectric layer is an SiN layer or an SiO 2 layer, and the first dielectric layer has a thickness of 10 to 50 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the second dielectric layer is an SiN layer or an A l N layer, and the second dielectric layer has a thickness of 10 to 200 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the silicon ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 14 cm 2 to 10 16 c m- 2; and wherein the indium ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 13 cm 2 to 10 16 c m 2. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the metal layer comprises a Ti/Au layer, a Ti/Pt/Au layer, a Ti/Al layer or a Ti/Al/Ni/Au layer. Original
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the at least one of silicon ions or indium ions have an implantation depth of 80 to 120 nanometers. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein a process condition of the high temperature annealing process comprises: an annealing temperature of 850 to 1400 °C and an annealing duration of 10 to 60 minutes. Previously presented
Canceled
Canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based device with ohmic contact electrode
Materials described outside the worked examples.
silicon ions
indium ions
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–50 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,239,081Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic diagram illustrating an implementation flow of a method for preparing an ohmic contact electrode of a GaN-based device according to an …
FIG. 2 is a schematic diagram illustrating structures obtained during an implementation flow of the method for preparing an ohmic contact electrode of a …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for preparing an ohmic contact electrode of a gallium nitride (GaN)-based device, comprising following steps: step S 1: growing a first dielectric layer on an upper surface of the GaN-based device; step S 2: implanting at least one of silicon ions or indium ions into a region of the first dielectric layer corresponding to an ohmic contact electrode region of the GaN- based device and into the ohmic contact electrode region; step S3: growing a second dielectric layer on an upper surface of the first dielectric layer; step S4: activating the at least one of silicon ions or indium ions using a high temperature annealing process, so as to form an N-type highly doped region; step S5: respectively removing portions, corresponding to the ohmic contact electrode region, of the first dielectric layer and the second dielectric layer; and step S6: growing a metal layer on an upper surface of the ohmic contact electrode region of the GaN-based device, so as to form the ohmic contact electrode, wherein the step S 2 comprises: step S 21: applying a first photoresist layer to an upper surface of a portion of the first dielectric layer corresponding to a first region of the GaN-based device, wherein the first region is a region other than the ohmic contact electrode region of the GaN-based device; step S 22: implanting the at least one of silicon ions or indium ions using ion implantation; and step S23: removing the first photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the step S₃ and the step S₄ comprise [[ing]] the following steps: step S₃ 1: applying a second photoresist layer to an upper surface of a portion of the second dielectric layer corresponding to the first region; step S 32: removing the portions of the first dielectric layer and the second dielectric layer corresponding to the ohmic contact electrode region respectively using a dry etching process; step 33: performing evaporation deposition of the metal layer on the upper surface of the GaN-based device using an electron beam evaporation process; and step 34: removing the second photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the first dielectric layer is an SiN layer or an SiO 2 layer, and the first dielectric layer has a thickness of 10 to 50 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the second dielectric layer is an SiN layer or an A l N layer, and the second dielectric layer has a thickness of 10 to 200 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the silicon ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 14 cm 2 to 10 16 c m- 2; and wherein the indium ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 13 cm 2 to 10 16 c m 2. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the metal layer comprises a Ti/Au layer, a Ti/Pt/Au layer, a Ti/Al layer or a Ti/Al/Ni/Au layer. Original
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the at least one of silicon ions or indium ions have an implantation depth of 80 to 120 nanometers. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein a process condition of the high temperature annealing process comprises: an annealing temperature of 850 to 1400 °C and an annealing duration of 10 to 60 minutes. Previously presented
Canceled
Canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based device with ohmic contact electrode
Materials described outside the worked examples.
silicon ions
indium ions
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–50 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,239,081Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic diagram illustrating an implementation flow of a method for preparing an ohmic contact electrode of a GaN-based device according to an …
FIG. 2 is a schematic diagram illustrating structures obtained during an implementation flow of the method for preparing an ohmic contact electrode of a …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for preparing an ohmic contact electrode of a gallium nitride (GaN)-based device, comprising following steps: step S 1: growing a first dielectric layer on an upper surface of the GaN-based device; step S 2: implanting at least one of silicon ions or indium ions into a region of the first dielectric layer corresponding to an ohmic contact electrode region of the GaN- based device and into the ohmic contact electrode region; step S3: growing a second dielectric layer on an upper surface of the first dielectric layer; step S4: activating the at least one of silicon ions or indium ions using a high temperature annealing process, so as to form an N-type highly doped region; step S5: respectively removing portions, corresponding to the ohmic contact electrode region, of the first dielectric layer and the second dielectric layer; and step S6: growing a metal layer on an upper surface of the ohmic contact electrode region of the GaN-based device, so as to form the ohmic contact electrode, wherein the step S 2 comprises: step S 21: applying a first photoresist layer to an upper surface of a portion of the first dielectric layer corresponding to a first region of the GaN-based device, wherein the first region is a region other than the ohmic contact electrode region of the GaN-based device; step S 22: implanting the at least one of silicon ions or indium ions using ion implantation; and step S23: removing the first photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the step S₃ and the step S₄ comprise [[ing]] the following steps: step S₃ 1: applying a second photoresist layer to an upper surface of a portion of the second dielectric layer corresponding to the first region; step S 32: removing the portions of the first dielectric layer and the second dielectric layer corresponding to the ohmic contact electrode region respectively using a dry etching process; step 33: performing evaporation deposition of the metal layer on the upper surface of the GaN-based device using an electron beam evaporation process; and step 34: removing the second photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the first dielectric layer is an SiN layer or an SiO 2 layer, and the first dielectric layer has a thickness of 10 to 50 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the second dielectric layer is an SiN layer or an A l N layer, and the second dielectric layer has a thickness of 10 to 200 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the silicon ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 14 cm 2 to 10 16 c m- 2; and wherein the indium ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 13 cm 2 to 10 16 c m 2. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the metal layer comprises a Ti/Au layer, a Ti/Pt/Au layer, a Ti/Al layer or a Ti/Al/Ni/Au layer. Original
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the at least one of silicon ions or indium ions have an implantation depth of 80 to 120 nanometers. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein a process condition of the high temperature annealing process comprises: an annealing temperature of 850 to 1400 °C and an annealing duration of 10 to 60 minutes. Previously presented
Canceled
Canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based device with ohmic contact electrode
Materials described outside the worked examples.
silicon ions
indium ions
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–50 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,239,081Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic diagram illustrating an implementation flow of a method for preparing an ohmic contact electrode of a GaN-based device according to an …
FIG. 2 is a schematic diagram illustrating structures obtained during an implementation flow of the method for preparing an ohmic contact electrode of a …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for preparing an ohmic contact electrode of a gallium nitride (GaN)-based device, comprising following steps: step S 1: growing a first dielectric layer on an upper surface of the GaN-based device; step S 2: implanting at least one of silicon ions or indium ions into a region of the first dielectric layer corresponding to an ohmic contact electrode region of the GaN- based device and into the ohmic contact electrode region; step S3: growing a second dielectric layer on an upper surface of the first dielectric layer; step S4: activating the at least one of silicon ions or indium ions using a high temperature annealing process, so as to form an N-type highly doped region; step S5: respectively removing portions, corresponding to the ohmic contact electrode region, of the first dielectric layer and the second dielectric layer; and step S6: growing a metal layer on an upper surface of the ohmic contact electrode region of the GaN-based device, so as to form the ohmic contact electrode, wherein the step S 2 comprises: step S 21: applying a first photoresist layer to an upper surface of a portion of the first dielectric layer corresponding to a first region of the GaN-based device, wherein the first region is a region other than the ohmic contact electrode region of the GaN-based device; step S 22: implanting the at least one of silicon ions or indium ions using ion implantation; and step S23: removing the first photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the step S₃ and the step S₄ comprise [[ing]] the following steps: step S₃ 1: applying a second photoresist layer to an upper surface of a portion of the second dielectric layer corresponding to the first region; step S 32: removing the portions of the first dielectric layer and the second dielectric layer corresponding to the ohmic contact electrode region respectively using a dry etching process; step 33: performing evaporation deposition of the metal layer on the upper surface of the GaN-based device using an electron beam evaporation process; and step 34: removing the second photoresist layer. Currently amended
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the first dielectric layer is an SiN layer or an SiO 2 layer, and the first dielectric layer has a thickness of 10 to 50 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the second dielectric layer is an SiN layer or an A l N layer, and the second dielectric layer has a thickness of 10 to 200 nanometers. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the silicon ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 14 cm 2 to 10 16 c m- 2; and wherein the indium ions have an implantation energy of 30 to 200 keV and an implantation dose of 10 13 cm 2 to 10 16 c m 2. Original
The method for preparing an ohmic contact electrode of a GaN- based device according to claim 1, wherein the metal layer comprises a Ti/Au layer, a Ti/Pt/Au layer, a Ti/Al layer or a Ti/Al/Ni/Au layer. Original
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein the at least one of silicon ions or indium ions have an implantation depth of 80 to 120 nanometers. Currently amended
The method for preparing an ohmic contact electrode of a GaN-based device according to claim 1, wherein a process condition of the high temperature annealing process comprises: an annealing temperature of 850 to 1400 °C and an annealing duration of 10 to 60 minutes. Previously presented
Canceled
Canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based device with ohmic contact electrode
Materials described outside the worked examples.
silicon ions
indium ions
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–50 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
SiN
GaN
metal layer (ohmic contact electrode)
SiO₂
AlN
Ti/Au layer
Ti/Pt/Au layer
Ti/Al layer
Ti/Al/Ni/Au layer
AlGaN
| — |
Thickness | 10–200 nm | — |
Duration | 10–60 minutes | — |
Thickness | 1–2 µm | — |
Thickness | 80–120 nm | — |
Temperature | 850–1400 °C | — |
SiN
GaN
metal layer (ohmic contact electrode)
SiO₂
AlN
Ti/Au layer
Ti/Pt/Au layer
Ti/Al layer
Ti/Al/Ni/Au layer
AlGaN
| — |
Thickness | 10–200 nm | — |
Duration | 10–60 minutes | — |
Thickness | 1–2 µm | — |
Thickness | 80–120 nm | — |
Temperature | 850–1400 °C | — |
SiN
GaN
metal layer (ohmic contact electrode)
SiO₂
AlN
Ti/Au layer
Ti/Pt/Au layer
Ti/Al layer
Ti/Al/Ni/Au layer
AlGaN
| — |
Thickness | 10–200 nm | — |
Duration | 10–60 minutes | — |
Thickness | 1–2 µm | — |
Thickness | 80–120 nm | — |
Temperature | 850–1400 °C | — |
SiN
GaN
metal layer (ohmic contact electrode)
SiO₂
AlN
Ti/Au layer
Ti/Pt/Au layer
Ti/Al layer
Ti/Al/Ni/Au layer
AlGaN
| — |
Thickness | 10–200 nm | — |
Duration | 10–60 minutes | — |
Thickness | 1–2 µm | — |
Thickness | 80–120 nm | — |
Temperature | 850–1400 °C | — |