Patent
US 10,319,829Vertical Junction Field Effect Transistor (VJFET)
No layer stack recorded.
n-doped III-nitride
n-doped GaN
GaN
FIG. 8 provide a particular method of fabricating a V J FET according to an embodiment of the present invention. Other sequences of steps may also be performed …
Thickness | 1–6 nm | — |
Thickness | 3–4 nm | — |
Thickness | 200–365 nm | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 200 cm | — |
Thickness | ≤ 1 cm | — |
Thickness | ≤ 365 nm | — |
Voltage | ≥ 1 V | — |
Thickness | ≥ 4 nm | — |
Vertical Junction Field Effect Transistor (VJFET)
No layer stack recorded.
n-doped III-nitride
n-doped GaN
GaN
FIG. 8 provide a particular method of fabricating a V J FET according to an embodiment of the present invention. Other sequences of steps may also be performed …
Thickness | 1–6 nm | — |
Thickness | 3–4 nm | — |
Thickness | 200–365 nm | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 200 cm | — |
Thickness | ≤ 1 cm | — |
Thickness | ≤ 365 nm | — |
Voltage | ≥ 1 V | — |
Thickness | ≥ 4 nm | — |
Vertical Junction Field Effect Transistor (VJFET)
No layer stack recorded.
n-doped III-nitride
n-doped GaN
GaN
FIG. 8 provide a particular method of fabricating a V J FET according to an embodiment of the present invention. Other sequences of steps may also be performed …
Thickness | 1–6 nm | — |
Thickness | 3–4 nm | — |
Thickness | 200–365 nm | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 200 cm | — |
Thickness | ≤ 1 cm | — |
Thickness | ≤ 365 nm | — |
Voltage | ≥ 1 V | — |
Thickness | ≥ 4 nm | — |
Vertical Junction Field Effect Transistor (VJFET)
No layer stack recorded.
n-doped III-nitride
n-doped GaN
GaN
FIG. 8 provide a particular method of fabricating a V J FET according to an embodiment of the present invention. Other sequences of steps may also be performed …
Thickness | 1–6 nm | — |
Thickness | 3–4 nm | — |
Thickness | 200–365 nm | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 200 cm | — |
Thickness | ≤ 1 cm | — |
Thickness | ≤ 365 nm | — |
Voltage | ≥ 1 V | — |
Thickness | ≥ 4 nm | — |