Patent
US 9,082,809GRAPHENE BASE TRANSISTOR HAVING COMPOSITIONALLY-GRADED COLLECTOR BARRIER LAYER
Jaroslaw Dabrowski
US
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Patent
Atlas literature
Patent
US 9,082,809Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterzed in that wherein the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer and which has a dielectric constant that decreases with increasin g distance from the base layer in the direction p ointin g from the base layer to the collector layer.
The junction transistor of claim 1, wherein the collector barrier layer comprises a Ta₂ O₅ layer adjacent to the collector layer, and a Ta x Ti1.x O layer adjacent to the base layer, wherein x increases with increasing distance from the barrier layer.
The junction transistor of claim 1, wherein a dielectric constant of the collector barrier layer decreases from a value between 40 and 60 at an interface between the graphene layer and the collector barrier layer, to a value between 3 and 5 at an interface between the collector barrier layer and the collector.
The junction transistor of claim 1, wherein the emitter layer comprises a titanium nitride layer.
1 0. The junction transistor of claim 1, wherein the emitter layer comprises a Er₂Ge₂ layer. 3 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
1 2. The junction transistor of claim 1, wherein the a layer stack formed by the emitter layer and the emitter barrier layer comprises a n ** -Si(001)/i-Si(001) layer stack, a n ** -Ge(001)/i-Ge(001) layer stack, or a n ** -GaAs(001)/i-GaAs(001) layer stack, or an Er₂Ge₂/Ge layer stack.
The junction transistor of claim 1, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer.
T -he-A junction transistor -ef--laim-41, com p risin g, on a substrate an emitter layer, a collector layer, and a base layer that com p rises a grap hene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and ad j acent to the grap hene layer, wherein the collector barrier layer is a com p ositionally g raded material layer, which has an electron affinity that decreases in a direction p ointin g from the base layer to the collector layer, and wherein the electron affinity of the collector barrier layer decreases linearly with increasing distance from the base layer.
The junction transistor of claim 2, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer. 2 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
Layer stacks claimed or described, ordered top of device to substrate.
graphene base junction transistor
Materials described outside the worked examples.
graphene
C
compositionally graded collector barrier layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
dielectric constant at graphene/collector-barrier interface | 40–60 | compositionally graded collector barrier layer |
dielectric constant at collector-barrier/collector interface |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,082,809Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterzed in that wherein the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer and which has a dielectric constant that decreases with increasin g distance from the base layer in the direction p ointin g from the base layer to the collector layer.
The junction transistor of claim 1, wherein the collector barrier layer comprises a Ta₂ O₅ layer adjacent to the collector layer, and a Ta x Ti1.x O layer adjacent to the base layer, wherein x increases with increasing distance from the barrier layer.
The junction transistor of claim 1, wherein a dielectric constant of the collector barrier layer decreases from a value between 40 and 60 at an interface between the graphene layer and the collector barrier layer, to a value between 3 and 5 at an interface between the collector barrier layer and the collector.
The junction transistor of claim 1, wherein the emitter layer comprises a titanium nitride layer.
1 0. The junction transistor of claim 1, wherein the emitter layer comprises a Er₂Ge₂ layer. 3 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
1 2. The junction transistor of claim 1, wherein the a layer stack formed by the emitter layer and the emitter barrier layer comprises a n ** -Si(001)/i-Si(001) layer stack, a n ** -Ge(001)/i-Ge(001) layer stack, or a n ** -GaAs(001)/i-GaAs(001) layer stack, or an Er₂Ge₂/Ge layer stack.
The junction transistor of claim 1, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer.
T -he-A junction transistor -ef--laim-41, com p risin g, on a substrate an emitter layer, a collector layer, and a base layer that com p rises a grap hene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and ad j acent to the grap hene layer, wherein the collector barrier layer is a com p ositionally g raded material layer, which has an electron affinity that decreases in a direction p ointin g from the base layer to the collector layer, and wherein the electron affinity of the collector barrier layer decreases linearly with increasing distance from the base layer.
The junction transistor of claim 2, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer. 2 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
Layer stacks claimed or described, ordered top of device to substrate.
graphene base junction transistor
Materials described outside the worked examples.
graphene
C
compositionally graded collector barrier layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
dielectric constant at graphene/collector-barrier interface | 40–60 | compositionally graded collector barrier layer |
dielectric constant at collector-barrier/collector interface |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,082,809Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterzed in that wherein the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer and which has a dielectric constant that decreases with increasin g distance from the base layer in the direction p ointin g from the base layer to the collector layer.
The junction transistor of claim 1, wherein the collector barrier layer comprises a Ta₂ O₅ layer adjacent to the collector layer, and a Ta x Ti1.x O layer adjacent to the base layer, wherein x increases with increasing distance from the barrier layer.
The junction transistor of claim 1, wherein a dielectric constant of the collector barrier layer decreases from a value between 40 and 60 at an interface between the graphene layer and the collector barrier layer, to a value between 3 and 5 at an interface between the collector barrier layer and the collector.
The junction transistor of claim 1, wherein the emitter layer comprises a titanium nitride layer.
1 0. The junction transistor of claim 1, wherein the emitter layer comprises a Er₂Ge₂ layer. 3 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
1 2. The junction transistor of claim 1, wherein the a layer stack formed by the emitter layer and the emitter barrier layer comprises a n ** -Si(001)/i-Si(001) layer stack, a n ** -Ge(001)/i-Ge(001) layer stack, or a n ** -GaAs(001)/i-GaAs(001) layer stack, or an Er₂Ge₂/Ge layer stack.
The junction transistor of claim 1, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer.
T -he-A junction transistor -ef--laim-41, com p risin g, on a substrate an emitter layer, a collector layer, and a base layer that com p rises a grap hene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and ad j acent to the grap hene layer, wherein the collector barrier layer is a com p ositionally g raded material layer, which has an electron affinity that decreases in a direction p ointin g from the base layer to the collector layer, and wherein the electron affinity of the collector barrier layer decreases linearly with increasing distance from the base layer.
The junction transistor of claim 2, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer. 2 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
Layer stacks claimed or described, ordered top of device to substrate.
graphene base junction transistor
Materials described outside the worked examples.
graphene
C
compositionally graded collector barrier layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
dielectric constant at graphene/collector-barrier interface | 40–60 | compositionally graded collector barrier layer |
dielectric constant at collector-barrier/collector interface |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,082,809Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterzed in that wherein the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer and which has a dielectric constant that decreases with increasin g distance from the base layer in the direction p ointin g from the base layer to the collector layer.
The junction transistor of claim 1, wherein the collector barrier layer comprises a Ta₂ O₅ layer adjacent to the collector layer, and a Ta x Ti1.x O layer adjacent to the base layer, wherein x increases with increasing distance from the barrier layer.
The junction transistor of claim 1, wherein a dielectric constant of the collector barrier layer decreases from a value between 40 and 60 at an interface between the graphene layer and the collector barrier layer, to a value between 3 and 5 at an interface between the collector barrier layer and the collector.
The junction transistor of claim 1, wherein the emitter layer comprises a titanium nitride layer.
1 0. The junction transistor of claim 1, wherein the emitter layer comprises a Er₂Ge₂ layer. 3 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
1 2. The junction transistor of claim 1, wherein the a layer stack formed by the emitter layer and the emitter barrier layer comprises a n ** -Si(001)/i-Si(001) layer stack, a n ** -Ge(001)/i-Ge(001) layer stack, or a n ** -GaAs(001)/i-GaAs(001) layer stack, or an Er₂Ge₂/Ge layer stack.
The junction transistor of claim 1, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer.
T -he-A junction transistor -ef--laim-41, com p risin g, on a substrate an emitter layer, a collector layer, and a base layer that com p rises a grap hene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and ad j acent to the grap hene layer, wherein the collector barrier layer is a com p ositionally g raded material layer, which has an electron affinity that decreases in a direction p ointin g from the base layer to the collector layer, and wherein the electron affinity of the collector barrier layer decreases linearly with increasing distance from the base layer.
The junction transistor of claim 2, wherein the collector barrier layer comprises a sub-layer arranged adjacent to the collector layer and having an electron affinity that does not change with increasing distance from the base layer. 2 Application Serial No.: 13/473,873 Attorney Docket No. 536-009.053
Layer stacks claimed or described, ordered top of device to substrate.
graphene base junction transistor
Materials described outside the worked examples.
graphene
C
compositionally graded collector barrier layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
dielectric constant at graphene/collector-barrier interface | 40–60 | compositionally graded collector barrier layer |
dielectric constant at collector-barrier/collector interface |
Related documents with shared materials, methods, properties, or citations.
silicon dioxide
SiO₂
compositionally graded SixTi₁-xO₂
SixTi(1-x)O₂
tantalum pentoxide
Ta₂O₅
compositionally graded TaxTi₁-xO
TaxTi(1-x)O
titanium nitride
TiN
erbium digermanide
Er₂Ge₂
silicon
Si
germanium
Ge
gallium arsenide
GaAs
titanium dioxide
TiO₂
boron nitride
BN
strontium titanate
SrTiO₃
compositionally graded collector barrier layer |
SiO2 sublayer thickness | 5–30 nm | SiO₂ |
SixTi1-xO2 graded layer thickness | 10–90 nm | SixTi(1-x)O₂ |
SrTiO3 interface layer thickness | 0.5–3 nm | SrTiO₃ |
Voltage | 6–106 V | — |
Pressure | 536-009.053 pa | — |
Thickness | 10–30 nm | — |
Thickness | 20–40 nm | — |
— | 0–0.4 eV | — |
— | 0–0.2 eV | — |
Voltage | 10–20 V | — |
Thickness | ≤ 5 nm | — |
silicon dioxide
SiO₂
compositionally graded SixTi₁-xO₂
SixTi(1-x)O₂
tantalum pentoxide
Ta₂O₅
compositionally graded TaxTi₁-xO
TaxTi(1-x)O
titanium nitride
TiN
erbium digermanide
Er₂Ge₂
silicon
Si
germanium
Ge
gallium arsenide
GaAs
titanium dioxide
TiO₂
boron nitride
BN
strontium titanate
SrTiO₃
compositionally graded collector barrier layer |
SiO2 sublayer thickness | 5–30 nm | SiO₂ |
SixTi1-xO2 graded layer thickness | 10–90 nm | SixTi(1-x)O₂ |
SrTiO3 interface layer thickness | 0.5–3 nm | SrTiO₃ |
Voltage | 6–106 V | — |
Pressure | 536-009.053 pa | — |
Thickness | 10–30 nm | — |
Thickness | 20–40 nm | — |
— | 0–0.4 eV | — |
— | 0–0.2 eV | — |
Voltage | 10–20 V | — |
Thickness | ≤ 5 nm | — |
silicon dioxide
SiO₂
compositionally graded SixTi₁-xO₂
SixTi(1-x)O₂
tantalum pentoxide
Ta₂O₅
compositionally graded TaxTi₁-xO
TaxTi(1-x)O
titanium nitride
TiN
erbium digermanide
Er₂Ge₂
silicon
Si
germanium
Ge
gallium arsenide
GaAs
titanium dioxide
TiO₂
boron nitride
BN
strontium titanate
SrTiO₃
compositionally graded collector barrier layer |
SiO2 sublayer thickness | 5–30 nm | SiO₂ |
SixTi1-xO2 graded layer thickness | 10–90 nm | SixTi(1-x)O₂ |
SrTiO3 interface layer thickness | 0.5–3 nm | SrTiO₃ |
Voltage | 6–106 V | — |
Pressure | 536-009.053 pa | — |
Thickness | 10–30 nm | — |
Thickness | 20–40 nm | — |
— | 0–0.4 eV | — |
— | 0–0.2 eV | — |
Voltage | 10–20 V | — |
Thickness | ≤ 5 nm | — |
silicon dioxide
SiO₂
compositionally graded SixTi₁-xO₂
SixTi(1-x)O₂
tantalum pentoxide
Ta₂O₅
compositionally graded TaxTi₁-xO
TaxTi(1-x)O
titanium nitride
TiN
erbium digermanide
Er₂Ge₂
silicon
Si
germanium
Ge
gallium arsenide
GaAs
titanium dioxide
TiO₂
boron nitride
BN
strontium titanate
SrTiO₃
compositionally graded collector barrier layer |
SiO2 sublayer thickness | 5–30 nm | SiO₂ |
SixTi1-xO2 graded layer thickness | 10–90 nm | SixTi(1-x)O₂ |
SrTiO3 interface layer thickness | 0.5–3 nm | SrTiO₃ |
Voltage | 6–106 V | — |
Pressure | 536-009.053 pa | — |
Thickness | 10–30 nm | — |
Thickness | 20–40 nm | — |
— | 0–0.4 eV | — |
— | 0–0.2 eV | — |
Voltage | 10–20 V | — |
Thickness | ≤ 5 nm | — |