Patent
US 8,242,485A SOURCE/DRAIN TECHNOLOGY FOR THE CARBON NANO-TUBE/GRAPHENE CMOS WITH A SINGLE SELF-ALIGNED METAL SILICIDE PROCESS
Josephine B. Chang
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,242,485Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram illustrating a carbon-based material 102, e.g., a carbon nano-tube or graphene material, having been placed over a …
FIG. 2 is a cross-sectional diagram illustrating a semiconductor material 202 having been selectively grown around carbon-based material 102. According to an …
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
FIG. 4 is a diagram illustrating one or more impurities being implanted into region 302. Since the impurity/impurities will be used to passivate the silicide, …
FIG. 5 is a diagram illustrating a segregation region having been formed between the carbon-based material and the silicide, germanide or germanosilicide …
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 7 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano- tube or graphene, having been placed over the STI regions so as to …
FIG. 8 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 9 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 902 and 904 which will serve as source and …
FIG. 10 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1002 and 1004 (depending on whether the …
FIG. 11 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1002, 1004 and 1006. Since the impurity/impurities will …
FIG. 12 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
FIG. 14 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano-tube or graphene, having been placed over oxidized substrate 1302 …
FIG. 15 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 16 is a cross-sectional diagram illustrating silicon (Si), germanium (Ge) or silicon germanium (SiGe) portions of the oxidized substrate having been …
FIG. 17 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 1702 and 1704 which will serve as source …
FIG. 18 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1802 and 1804 (depending on whether the …
FIG. 19 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1802, 1804 and 1806. Since the impurity/impurities will …
FIG. 20 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a carbon-based material; and at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide and at least one segregation region, comprising an impurity, separating the carbon- based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, g ermanide or germanosilicide.
The device of claim 1, wherein the carbon-based material contains at least 90 percent carbon.
The device of claim 1, wherein the carbon-based material contains at least 50 percent carbon.
The device of claim 1, wherein the carbon-based material comprises graphene or carbon nanotubes.
The device of claim 1, comprising: a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical me t a l contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
canceled
A method for fabricating a device, comprising the steps o f: providing a carbon-based material; a nd forming at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide; and forming at least one segregation region, comprising an impurity, separating the carbon-based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the metal silicide, germanide or germanosilicide is formed using a self-aligning process, and wherein the step of forming the at least one electrical contact further comprises the steps of: forming an epitaxial region over the carbon-based material; depositing a metal over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the step of forming the at least one electrical contact further comprises the s te ps s t ep of: forming an epitaxial region over the carbon-based material; depositing a metal over the device; patterning the metal through a mask to remove the metal from all but an area over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, further comprising the steps step of: providing an oxidized substrate comprising a silicon dioxide layer over a silicon wafer; and forming the carbon-based material over the oxidized substrate.
The method of claim 15, further comprising the steps of: providing a bulk silicon wafer; patterning trenches into the wafer; filling the trenches with a dielectric material; and forming the carbon-based material over one of the trenches.
The method of claim 15, further comprising the step of: forming a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
The method of claim 15 22, wherein the step of forming the segregation region further comprises the steps of: implanting the impurity into the metal silicide, germanide or germanosilicide; and diffusing the impurity to an interface between the metal silicide, germanide or germanosilicide and the carbon-based material to form the segregation region.
canceled
Layer stacks claimed or described, ordered top of device to substrate.
electronic device with carbon-based material and metal silicide/germanide/germanosilicide contact with segregation region
n-channel field-effect transistor (NFET) with carbon-based channel and metal silicide contacts
Materials described outside the worked examples.
carbon-based material
metal silicide, germanide or germanosilicide
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,242,485Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram illustrating a carbon-based material 102, e.g., a carbon nano-tube or graphene material, having been placed over a …
FIG. 2 is a cross-sectional diagram illustrating a semiconductor material 202 having been selectively grown around carbon-based material 102. According to an …
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
FIG. 4 is a diagram illustrating one or more impurities being implanted into region 302. Since the impurity/impurities will be used to passivate the silicide, …
FIG. 5 is a diagram illustrating a segregation region having been formed between the carbon-based material and the silicide, germanide or germanosilicide …
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 7 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano- tube or graphene, having been placed over the STI regions so as to …
FIG. 8 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 9 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 902 and 904 which will serve as source and …
FIG. 10 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1002 and 1004 (depending on whether the …
FIG. 11 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1002, 1004 and 1006. Since the impurity/impurities will …
FIG. 12 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
FIG. 14 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano-tube or graphene, having been placed over oxidized substrate 1302 …
FIG. 15 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 16 is a cross-sectional diagram illustrating silicon (Si), germanium (Ge) or silicon germanium (SiGe) portions of the oxidized substrate having been …
FIG. 17 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 1702 and 1704 which will serve as source …
FIG. 18 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1802 and 1804 (depending on whether the …
FIG. 19 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1802, 1804 and 1806. Since the impurity/impurities will …
FIG. 20 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a carbon-based material; and at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide and at least one segregation region, comprising an impurity, separating the carbon- based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, g ermanide or germanosilicide.
The device of claim 1, wherein the carbon-based material contains at least 90 percent carbon.
The device of claim 1, wherein the carbon-based material contains at least 50 percent carbon.
The device of claim 1, wherein the carbon-based material comprises graphene or carbon nanotubes.
The device of claim 1, comprising: a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical me t a l contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
canceled
A method for fabricating a device, comprising the steps o f: providing a carbon-based material; a nd forming at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide; and forming at least one segregation region, comprising an impurity, separating the carbon-based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the metal silicide, germanide or germanosilicide is formed using a self-aligning process, and wherein the step of forming the at least one electrical contact further comprises the steps of: forming an epitaxial region over the carbon-based material; depositing a metal over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the step of forming the at least one electrical contact further comprises the s te ps s t ep of: forming an epitaxial region over the carbon-based material; depositing a metal over the device; patterning the metal through a mask to remove the metal from all but an area over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, further comprising the steps step of: providing an oxidized substrate comprising a silicon dioxide layer over a silicon wafer; and forming the carbon-based material over the oxidized substrate.
The method of claim 15, further comprising the steps of: providing a bulk silicon wafer; patterning trenches into the wafer; filling the trenches with a dielectric material; and forming the carbon-based material over one of the trenches.
The method of claim 15, further comprising the step of: forming a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
The method of claim 15 22, wherein the step of forming the segregation region further comprises the steps of: implanting the impurity into the metal silicide, germanide or germanosilicide; and diffusing the impurity to an interface between the metal silicide, germanide or germanosilicide and the carbon-based material to form the segregation region.
canceled
Layer stacks claimed or described, ordered top of device to substrate.
electronic device with carbon-based material and metal silicide/germanide/germanosilicide contact with segregation region
n-channel field-effect transistor (NFET) with carbon-based channel and metal silicide contacts
Materials described outside the worked examples.
carbon-based material
metal silicide, germanide or germanosilicide
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,242,485Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram illustrating a carbon-based material 102, e.g., a carbon nano-tube or graphene material, having been placed over a …
FIG. 2 is a cross-sectional diagram illustrating a semiconductor material 202 having been selectively grown around carbon-based material 102. According to an …
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
FIG. 4 is a diagram illustrating one or more impurities being implanted into region 302. Since the impurity/impurities will be used to passivate the silicide, …
FIG. 5 is a diagram illustrating a segregation region having been formed between the carbon-based material and the silicide, germanide or germanosilicide …
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 7 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano- tube or graphene, having been placed over the STI regions so as to …
FIG. 8 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 9 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 902 and 904 which will serve as source and …
FIG. 10 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1002 and 1004 (depending on whether the …
FIG. 11 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1002, 1004 and 1006. Since the impurity/impurities will …
FIG. 12 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
FIG. 14 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano-tube or graphene, having been placed over oxidized substrate 1302 …
FIG. 15 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 16 is a cross-sectional diagram illustrating silicon (Si), germanium (Ge) or silicon germanium (SiGe) portions of the oxidized substrate having been …
FIG. 17 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 1702 and 1704 which will serve as source …
FIG. 18 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1802 and 1804 (depending on whether the …
FIG. 19 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1802, 1804 and 1806. Since the impurity/impurities will …
FIG. 20 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a carbon-based material; and at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide and at least one segregation region, comprising an impurity, separating the carbon- based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, g ermanide or germanosilicide.
The device of claim 1, wherein the carbon-based material contains at least 90 percent carbon.
The device of claim 1, wherein the carbon-based material contains at least 50 percent carbon.
The device of claim 1, wherein the carbon-based material comprises graphene or carbon nanotubes.
The device of claim 1, comprising: a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical me t a l contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
canceled
A method for fabricating a device, comprising the steps o f: providing a carbon-based material; a nd forming at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide; and forming at least one segregation region, comprising an impurity, separating the carbon-based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the metal silicide, germanide or germanosilicide is formed using a self-aligning process, and wherein the step of forming the at least one electrical contact further comprises the steps of: forming an epitaxial region over the carbon-based material; depositing a metal over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the step of forming the at least one electrical contact further comprises the s te ps s t ep of: forming an epitaxial region over the carbon-based material; depositing a metal over the device; patterning the metal through a mask to remove the metal from all but an area over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, further comprising the steps step of: providing an oxidized substrate comprising a silicon dioxide layer over a silicon wafer; and forming the carbon-based material over the oxidized substrate.
The method of claim 15, further comprising the steps of: providing a bulk silicon wafer; patterning trenches into the wafer; filling the trenches with a dielectric material; and forming the carbon-based material over one of the trenches.
The method of claim 15, further comprising the step of: forming a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
The method of claim 15 22, wherein the step of forming the segregation region further comprises the steps of: implanting the impurity into the metal silicide, germanide or germanosilicide; and diffusing the impurity to an interface between the metal silicide, germanide or germanosilicide and the carbon-based material to form the segregation region.
canceled
Layer stacks claimed or described, ordered top of device to substrate.
electronic device with carbon-based material and metal silicide/germanide/germanosilicide contact with segregation region
n-channel field-effect transistor (NFET) with carbon-based channel and metal silicide contacts
Materials described outside the worked examples.
carbon-based material
metal silicide, germanide or germanosilicide
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,242,485Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram illustrating a carbon-based material 102, e.g., a carbon nano-tube or graphene material, having been placed over a …
FIG. 2 is a cross-sectional diagram illustrating a semiconductor material 202 having been selectively grown around carbon-based material 102. According to an …
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
FIG. 4 is a diagram illustrating one or more impurities being implanted into region 302. Since the impurity/impurities will be used to passivate the silicide, …
FIG. 5 is a diagram illustrating a segregation region having been formed between the carbon-based material and the silicide, germanide or germanosilicide …
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 7 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano- tube or graphene, having been placed over the STI regions so as to …
FIG. 8 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 9 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 902 and 904 which will serve as source and …
FIG. 10 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1002 and 1004 (depending on whether the …
FIG. 11 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1002, 1004 and 1006. Since the impurity/impurities will …
FIG. 12 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
FIG. 14 is a cross-sectional diagram illustrating a carbon-based material, e.g., carbon nano-tube or graphene, having been placed over oxidized substrate 1302 …
FIG. 15 is a cross-sectional diagram illustrating a gate stack having been formed over the channel and spacers having been formed adjacent to opposite sides of …
FIG. 16 is a cross-sectional diagram illustrating silicon (Si), germanium (Ge) or silicon germanium (SiGe) portions of the oxidized substrate having been …
FIG. 17 is a cross-sectional diagram illustrating a semiconductor material having been selectively grown in regions 1702 and 1704 which will serve as source …
FIG. 18 is a cross-sectional diagram illustrating self-aligned metal silicide, germanide or germanosilicide regions 1802 and 1804 (depending on whether the …
FIG. 19 is a cross-sectional diagram illustrating one or more impurities being implanted into regions 1802, 1804 and 1806. Since the impurity/impurities will …
FIG. 20 is a cross-sectional diagram illustrating a segregation region having been formed between the channel and the (silicide, germanide or germanosilicide) …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A device, comprising: a carbon-based material; and at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide and at least one segregation region, comprising an impurity, separating the carbon- based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, g ermanide or germanosilicide.
The device of claim 1, wherein the carbon-based material contains at least 90 percent carbon.
The device of claim 1, wherein the carbon-based material contains at least 50 percent carbon.
The device of claim 1, wherein the carbon-based material comprises graphene or carbon nanotubes.
The device of claim 1, comprising: a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical me t a l contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
canceled
A method for fabricating a device, comprising the steps o f: providing a carbon-based material; a nd forming at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide; and forming at least one segregation region, comprising an impurity, separating the carbon-based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the metal silicide, germanide or germanosilicide is formed using a self-aligning process, and wherein the step of forming the at least one electrical contact further comprises the steps of: forming an epitaxial region over the carbon-based material; depositing a metal over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, wherein the step of forming the at least one electrical contact further comprises the s te ps s t ep of: forming an epitaxial region over the carbon-based material; depositing a metal over the device; patterning the metal through a mask to remove the metal from all but an area over the epitaxial region; and annealing the device to intersperse the metal within the epitaxial region to form the metal silicide, germanide or germanosilicide.
The method of claim 15, further comprising the steps step of: providing an oxidized substrate comprising a silicon dioxide layer over a silicon wafer; and forming the carbon-based material over the oxidized substrate.
The method of claim 15, further comprising the steps of: providing a bulk silicon wafer; patterning trenches into the wafer; filling the trenches with a dielectric material; and forming the carbon-based material over one of the trenches.
The method of claim 15, further comprising the step of: forming a first electrical contact to the carbon-based material comprising a first metal silicide, germanide or germanosilicide and a second electrical contact to the carbon-based material comprising a second metal silicide, germanide or germanosilicide.
The method of claim 15 22, wherein the step of forming the segregation region further comprises the steps of: implanting the impurity into the metal silicide, germanide or germanosilicide; and diffusing the impurity to an interface between the metal silicide, germanide or germanosilicide and the carbon-based material to form the segregation region.
canceled
Layer stacks claimed or described, ordered top of device to substrate.
electronic device with carbon-based material and metal silicide/germanide/germanosilicide contact with segregation region
n-channel field-effect transistor (NFET) with carbon-based channel and metal silicide contacts
Materials described outside the worked examples.
carbon-based material
metal silicide, germanide or germanosilicide
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3 is a cross-sectional diagram illustrating metal silicide, germanide or germanosilicide region 302 (depending on whether semiconductor material 202 is …
Related documents with shared materials, methods, properties, or citations.
p-channel field-effect transistor (PFET) with carbon-based channel and metal silicide contacts
impurity (segregation region)
graphene
carbon nanotubes
nickel silicide
NiSi
palladium
Pd
magnesium
Mg
silicon dioxide
SiO₂
silicon wafer
Si
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
p-channel field-effect transistor (PFET) with carbon-based channel and metal silicide contacts
impurity (segregation region)
graphene
carbon nanotubes
nickel silicide
NiSi
palladium
Pd
magnesium
Mg
silicon dioxide
SiO₂
silicon wafer
Si
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
p-channel field-effect transistor (PFET) with carbon-based channel and metal silicide contacts
impurity (segregation region)
graphene
carbon nanotubes
nickel silicide
NiSi
palladium
Pd
magnesium
Mg
silicon dioxide
SiO₂
silicon wafer
Si
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …
p-channel field-effect transistor (PFET) with carbon-based channel and metal silicide contacts
impurity (segregation region)
graphene
carbon nanotubes
nickel silicide
NiSi
palladium
Pd
magnesium
Mg
silicon dioxide
SiO₂
silicon wafer
Si
FIG. 6 is a cross-sectional diagram illustrating shallow trench isolation (STI) having been performed on a Si, Ge or SiGe wafer 602. STI techniques are known …
FIG. 13 is a cross-sectional diagram illustrating an oxidized Si, Ge or SiGe substrate 1302, which is a starting structure for the process. By way of example …