Abstract

Long-range moiré patterns in twisted WSe₂ enable a built-in, moiré-length-scale ferroelectric polarisation that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable ultralow-voltage and non-volatile electronic functionality in two-dimensional materials; however, achieving stable polarization control without charge trapping has remained a persistent challenge. Here, we demonstrate a moiré-engineered ferroelectric field-effect transistor (FeFET) utilizing twisted WSe₂ bilayers that leverages atomically clean van der Waals interfaces to achieve efficient polarization–channel coupling and trap-suppressed, ultralow-voltage operation (subthreshold swing of 64 mV dec−1). The device exhibits a stable non-volatile memory window of 0.10 V and high mobility, exceeding the performance of previously reported two-dimensional FeFET and matching that of advanced silicon-based devices. In addition, capacitance–voltage spectroscopy, corroborated by self-consistent Landau–Ginzburg–Devonshire modelling, indicates ultrafast ferroelectric switching (∼0.5 µs). These results establish moiré-engineered ferroelectricity as a practical and scalable route toward ultraclean, low-power, and non-volatile 2D electronics, bridging atomistic lattice engineering with functional device architectures for next-generation memory and logic technologies.

Abstract

Long-range moiré patterns in twisted WSe₂ enable a built-in, moiré-length-scale ferroelectric polarisation that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable ultralow-voltage and non-volatile electronic functionality in two-dimensional materials; however, achieving stable polarization control without charge trapping has remained a persistent challenge. Here, we demonstrate a moiré-engineered ferroelectric field-effect transistor (FeFET) utilizing twisted WSe₂ bilayers that leverages atomically clean van der Waals interfaces to achieve efficient polarization–channel coupling and trap-suppressed, ultralow-voltage operation (subthreshold swing of 64 mV dec−1). The device exhibits a stable non-volatile memory window of 0.10 V and high mobility, exceeding the performance of previously reported two-dimensional FeFET and matching that of advanced silicon-based devices. In addition, capacitance–voltage spectroscopy, corroborated by self-consistent Landau–Ginzburg–Devonshire modelling, indicates ultrafast ferroelectric switching (∼0.5 µs). These results establish moiré-engineered ferroelectricity as a practical and scalable route toward ultraclean, low-power, and non-volatile 2D electronics, bridging atomistic lattice engineering with functional device architectures for next-generation memory and logic technologies.

Abstract

Long-range moiré patterns in twisted WSe₂ enable a built-in, moiré-length-scale ferroelectric polarisation that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable ultralow-voltage and non-volatile electronic functionality in two-dimensional materials; however, achieving stable polarization control without charge trapping has remained a persistent challenge. Here, we demonstrate a moiré-engineered ferroelectric field-effect transistor (FeFET) utilizing twisted WSe₂ bilayers that leverages atomically clean van der Waals interfaces to achieve efficient polarization–channel coupling and trap-suppressed, ultralow-voltage operation (subthreshold swing of 64 mV dec−1). The device exhibits a stable non-volatile memory window of 0.10 V and high mobility, exceeding the performance of previously reported two-dimensional FeFET and matching that of advanced silicon-based devices. In addition, capacitance–voltage spectroscopy, corroborated by self-consistent Landau–Ginzburg–Devonshire modelling, indicates ultrafast ferroelectric switching (∼0.5 µs). These results establish moiré-engineered ferroelectricity as a practical and scalable route toward ultraclean, low-power, and non-volatile 2D electronics, bridging atomistic lattice engineering with functional device architectures for next-generation memory and logic technologies.

Abstract

Long-range moiré patterns in twisted WSe₂ enable a built-in, moiré-length-scale ferroelectric polarisation that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable ultralow-voltage and non-volatile electronic functionality in two-dimensional materials; however, achieving stable polarization control without charge trapping has remained a persistent challenge. Here, we demonstrate a moiré-engineered ferroelectric field-effect transistor (FeFET) utilizing twisted WSe₂ bilayers that leverages atomically clean van der Waals interfaces to achieve efficient polarization–channel coupling and trap-suppressed, ultralow-voltage operation (subthreshold swing of 64 mV dec−1). The device exhibits a stable non-volatile memory window of 0.10 V and high mobility, exceeding the performance of previously reported two-dimensional FeFET and matching that of advanced silicon-based devices. In addition, capacitance–voltage spectroscopy, corroborated by self-consistent Landau–Ginzburg–Devonshire modelling, indicates ultrafast ferroelectric switching (∼0.5 µs). These results establish moiré-engineered ferroelectricity as a practical and scalable route toward ultraclean, low-power, and non-volatile 2D electronics, bridging atomistic lattice engineering with functional device architectures for next-generation memory and logic technologies.