MOCVD METHOD FOR GROWING INALGAN/GAN HETEROSTRUCTURE | Matter42 Literature
Patent
Atlas literature
Patent
US 12,347,678 B2
MOCVD METHOD FOR GROWING INALGAN/GAN HETEROSTRUCTURE
Edward Yi Chang, You-Chen Weng, Xia-Xi Zheng
NATIONAL YANG MING CHIAO TUNG UNIVERSITY, Hsinchu (TW)·Jul. 1, 2025·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 shows a flowchart of a MOCVD method for growing an InAlGaN/GaN heterostructure according to one embodiment of the present invention.
FIG. 2
FIG. 2B schematically show sectional views corresponding to the steps of a MOCVD method for grow- ing an InAlGaN/GaN heterostructure according to one …
FIG. 3
FIG. 3 shows a sectional view of an HEMT element containing an in-situ grown SiNx/InAlGaN/GaN hetero- structure fabricated according to one embodiment of the 5 …
FIG. 4
FIG. 4 shows the surface micro-topographies of the InAlGaN/GaN heterostructures (taken by the atomic force microscope AFM D₃₁₀₀), wherein the image (a) is free …
FIG. 5
FIG. 5 shows the surface micro-topographies of the interfaces of the in-situ grown SiNx protective layers and the InAlGaN barrier layers (taken by a …
FIG. 6
FIG. 6 shows the XPS spectra of the inner cores of the SiNx protective layers respectively in-situ grown at different 20 temperatures, wherein the images (a), …
FIG. 7
FIG. 7 shows a C-V curve obtained in a double-sweep 25 scan of the SiNx protective layer in-situ grown at a fre- quency of 100 kHz, wherein the scan is …
FIG. 8
FIG. 8A shows C-V curves obtained in double-sweep scans of the in-situ grown SiNx protective layer wherein the 30 scans are performed at frequencies ranging …
FIG. 9
FIG. 9D show the relationships of the shifts of the threshold voltage (Vth) and 40 the stress time ranging from 0 seconds and 1001 seconds while the gate …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 8 dependent
1
Independentnitride nucleation layerGaNInAlGaNSiNxInAlGaN/GaN HEMT with in-situ SiNx
A method for fabricating an indium aluminum gallium nitride (InAlGaN)/gallium nitride (GaN) heterostructure, which is realized by a metal-organic chemical vapor depo-sition (MOCVD) process and comprises Step (1): providing a substrate, and sequentially growing a nitride nucleation layer, a GaN buffer layer, an InAlGaN barrier layer on the substrate; and Step (2): using a precursor gas containing silane to in-situ grow a SiNx protective layer on the InAlGaN barrier layer at a temperature of 950-1000° C., B₂ wherein Step (1) and Step (2) are undertaken in an identical reaction chamber.
2
Dependent← claim 1SiH₄Si₂H₆Si₃H₈Si₄H₁₀TEOS
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the precursor gas contains silane (SiH₄), disilane (Si₂H₆), trisilane (Si₃H₈), tetrasilane (Si₄H₁₀), tetraethoxysilane (TEOS), or a combi-nation thereof.
3
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (2) is performed for 2-5 seconds at a gas flow rate of 5-8 sccm and a chamber pressure of less than 50 Torr.
4
Dependent← claim 1AlN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the nitride nucle-ation layer is an aluminum nitride (AlN) layer.
5
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further includes providing a transitional layer, and wherein the transitional layer is grown between the nitride nucleation layer and the GaN buffer layer.
6
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further include providing a barrier intermediate layer, and wherein the barrier intermediate layer is grown between the GaN buffer layer and the InAlGaN barrier layer.
8
Dependent← claim 1TMInTMAlTMGaNH₃
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) uses trim-ethyl indium (TMIn), trimethyl aluminum (TMAl), trim-ethyl gallium (TMGa), and ammonia gas (NH₃) as precursor materials to grow the InAlGaN barrier layer.
9
Dependent← claim 1InAlGaN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the InAlGaN barrier layer has a thickness of 3-5 nm. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
MOCVD process in a single reaction chamber: substrate (sapphire, SiC, or Si) is loaded; AlN nucleation layer, transitional layer, GaN buffer layer, AlN barrier intermediate layer, and InAlGaN barrier layer (3-5 nm, using TMIn, TMAl, TMGa, NH₃) are grown sequentially (Step S₁₀); then disilane (Si₂H₆) and NH₃ are filled into the chamber for 2-5 s at 950-1000°C, 5-8 sccm, <50 Torr to in-situ grow a SiNx protective layer on the InAlGaN barrier layer (Step S₂₀), yielding the in-situ SiNx/InAlGaN/GaN heterostructure.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
InAlGaN/GaN HEMT with in-situ SiNx
SiNxprotective layer and gate dielectric
InAlGaNbarrier layer
AlNbarrier intermediate layer
GaNbuffer layer
transitional layertransitional layer
AlNnucleation layer
Materials
Materials described outside the worked examples.
silane
SiH₄
Precursor Gas
trisilane
Si₃H₈
Precursor Gas
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
AFM
AFM
InAlGaNSiNx
TEM
TEM
Reported properties
Performance values and ranges asserted in the specification or claims.
Property
Value
Material
Duration
0–1001 seconds
—
Thickness
Cited prior art
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 4
US 9,853,138 B29,853,138 B2 12/2017 Yamada
US 12,191,626 B112,191,626 B1 * 1/2025 McLaurin.............. H10D 8/043examiner
US 2021/0111192 A12021/0111192 A1 4/2021 Lee et al.
TW 201919238 ATW 201919238 A 5/2019
Cited non-patent literature · 3
Jiang et al., “Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs”, IEEE Transactions on Electron Devices, vol. 64, No. 3, pp. 832-839, Mar. 2017.
Why these are connected
Related documents with shared materials, methods, properties, or citations.
MOCVD METHOD FOR GROWING INALGAN/GAN HETEROSTRUCTURE
Edward Yi Chang, You-Chen Weng, Xia-Xi Zheng
NATIONAL YANG MING CHIAO TUNG UNIVERSITY, Hsinchu (TW)·Jul. 1, 2025·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 shows a flowchart of a MOCVD method for growing an InAlGaN/GaN heterostructure according to one embodiment of the present invention.
FIG. 2
FIG. 2B schematically show sectional views corresponding to the steps of a MOCVD method for grow- ing an InAlGaN/GaN heterostructure according to one …
FIG. 3
FIG. 3 shows a sectional view of an HEMT element containing an in-situ grown SiNx/InAlGaN/GaN hetero- structure fabricated according to one embodiment of the 5 …
FIG. 4
FIG. 4 shows the surface micro-topographies of the InAlGaN/GaN heterostructures (taken by the atomic force microscope AFM D₃₁₀₀), wherein the image (a) is free …
FIG. 5
FIG. 5 shows the surface micro-topographies of the interfaces of the in-situ grown SiNx protective layers and the InAlGaN barrier layers (taken by a …
FIG. 6
FIG. 6 shows the XPS spectra of the inner cores of the SiNx protective layers respectively in-situ grown at different 20 temperatures, wherein the images (a), …
FIG. 7
FIG. 7 shows a C-V curve obtained in a double-sweep 25 scan of the SiNx protective layer in-situ grown at a fre- quency of 100 kHz, wherein the scan is …
FIG. 8
FIG. 8A shows C-V curves obtained in double-sweep scans of the in-situ grown SiNx protective layer wherein the 30 scans are performed at frequencies ranging …
FIG. 9
FIG. 9D show the relationships of the shifts of the threshold voltage (Vth) and 40 the stress time ranging from 0 seconds and 1001 seconds while the gate …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 8 dependent
1
Independentnitride nucleation layerGaNInAlGaNSiNxInAlGaN/GaN HEMT with in-situ SiNx
A method for fabricating an indium aluminum gallium nitride (InAlGaN)/gallium nitride (GaN) heterostructure, which is realized by a metal-organic chemical vapor depo-sition (MOCVD) process and comprises Step (1): providing a substrate, and sequentially growing a nitride nucleation layer, a GaN buffer layer, an InAlGaN barrier layer on the substrate; and Step (2): using a precursor gas containing silane to in-situ grow a SiNx protective layer on the InAlGaN barrier layer at a temperature of 950-1000° C., B₂ wherein Step (1) and Step (2) are undertaken in an identical reaction chamber.
2
Dependent← claim 1SiH₄Si₂H₆Si₃H₈Si₄H₁₀TEOS
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the precursor gas contains silane (SiH₄), disilane (Si₂H₆), trisilane (Si₃H₈), tetrasilane (Si₄H₁₀), tetraethoxysilane (TEOS), or a combi-nation thereof.
3
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (2) is performed for 2-5 seconds at a gas flow rate of 5-8 sccm and a chamber pressure of less than 50 Torr.
4
Dependent← claim 1AlN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the nitride nucle-ation layer is an aluminum nitride (AlN) layer.
5
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further includes providing a transitional layer, and wherein the transitional layer is grown between the nitride nucleation layer and the GaN buffer layer.
6
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further include providing a barrier intermediate layer, and wherein the barrier intermediate layer is grown between the GaN buffer layer and the InAlGaN barrier layer.
8
Dependent← claim 1TMInTMAlTMGaNH₃
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) uses trim-ethyl indium (TMIn), trimethyl aluminum (TMAl), trim-ethyl gallium (TMGa), and ammonia gas (NH₃) as precursor materials to grow the InAlGaN barrier layer.
9
Dependent← claim 1InAlGaN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the InAlGaN barrier layer has a thickness of 3-5 nm. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
MOCVD process in a single reaction chamber: substrate (sapphire, SiC, or Si) is loaded; AlN nucleation layer, transitional layer, GaN buffer layer, AlN barrier intermediate layer, and InAlGaN barrier layer (3-5 nm, using TMIn, TMAl, TMGa, NH₃) are grown sequentially (Step S₁₀); then disilane (Si₂H₆) and NH₃ are filled into the chamber for 2-5 s at 950-1000°C, 5-8 sccm, <50 Torr to in-situ grow a SiNx protective layer on the InAlGaN barrier layer (Step S₂₀), yielding the in-situ SiNx/InAlGaN/GaN heterostructure.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
InAlGaN/GaN HEMT with in-situ SiNx
SiNxprotective layer and gate dielectric
InAlGaNbarrier layer
AlNbarrier intermediate layer
GaNbuffer layer
transitional layertransitional layer
AlNnucleation layer
Materials
Materials described outside the worked examples.
silane
SiH₄
Precursor Gas
trisilane
Si₃H₈
Precursor Gas
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
AFM
AFM
InAlGaNSiNx
TEM
TEM
Reported properties
Performance values and ranges asserted in the specification or claims.
Property
Value
Material
Duration
0–1001 seconds
—
Thickness
Cited prior art
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 4
US 9,853,138 B29,853,138 B2 12/2017 Yamada
US 12,191,626 B112,191,626 B1 * 1/2025 McLaurin.............. H10D 8/043examiner
US 2021/0111192 A12021/0111192 A1 4/2021 Lee et al.
TW 201919238 ATW 201919238 A 5/2019
Cited non-patent literature · 3
Jiang et al., “Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs”, IEEE Transactions on Electron Devices, vol. 64, No. 3, pp. 832-839, Mar. 2017.
Why these are connected
Related documents with shared materials, methods, properties, or citations.
MOCVD METHOD FOR GROWING INALGAN/GAN HETEROSTRUCTURE
Edward Yi Chang, You-Chen Weng, Xia-Xi Zheng
NATIONAL YANG MING CHIAO TUNG UNIVERSITY, Hsinchu (TW)·Jul. 1, 2025·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 shows a flowchart of a MOCVD method for growing an InAlGaN/GaN heterostructure according to one embodiment of the present invention.
FIG. 2
FIG. 2B schematically show sectional views corresponding to the steps of a MOCVD method for grow- ing an InAlGaN/GaN heterostructure according to one …
FIG. 3
FIG. 3 shows a sectional view of an HEMT element containing an in-situ grown SiNx/InAlGaN/GaN hetero- structure fabricated according to one embodiment of the 5 …
FIG. 4
FIG. 4 shows the surface micro-topographies of the InAlGaN/GaN heterostructures (taken by the atomic force microscope AFM D₃₁₀₀), wherein the image (a) is free …
FIG. 5
FIG. 5 shows the surface micro-topographies of the interfaces of the in-situ grown SiNx protective layers and the InAlGaN barrier layers (taken by a …
FIG. 6
FIG. 6 shows the XPS spectra of the inner cores of the SiNx protective layers respectively in-situ grown at different 20 temperatures, wherein the images (a), …
FIG. 7
FIG. 7 shows a C-V curve obtained in a double-sweep 25 scan of the SiNx protective layer in-situ grown at a fre- quency of 100 kHz, wherein the scan is …
FIG. 8
FIG. 8A shows C-V curves obtained in double-sweep scans of the in-situ grown SiNx protective layer wherein the 30 scans are performed at frequencies ranging …
FIG. 9
FIG. 9D show the relationships of the shifts of the threshold voltage (Vth) and 40 the stress time ranging from 0 seconds and 1001 seconds while the gate …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 8 dependent
1
Independentnitride nucleation layerGaNInAlGaNSiNxInAlGaN/GaN HEMT with in-situ SiNx
A method for fabricating an indium aluminum gallium nitride (InAlGaN)/gallium nitride (GaN) heterostructure, which is realized by a metal-organic chemical vapor depo-sition (MOCVD) process and comprises Step (1): providing a substrate, and sequentially growing a nitride nucleation layer, a GaN buffer layer, an InAlGaN barrier layer on the substrate; and Step (2): using a precursor gas containing silane to in-situ grow a SiNx protective layer on the InAlGaN barrier layer at a temperature of 950-1000° C., B₂ wherein Step (1) and Step (2) are undertaken in an identical reaction chamber.
2
Dependent← claim 1SiH₄Si₂H₆Si₃H₈Si₄H₁₀TEOS
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the precursor gas contains silane (SiH₄), disilane (Si₂H₆), trisilane (Si₃H₈), tetrasilane (Si₄H₁₀), tetraethoxysilane (TEOS), or a combi-nation thereof.
3
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (2) is performed for 2-5 seconds at a gas flow rate of 5-8 sccm and a chamber pressure of less than 50 Torr.
4
Dependent← claim 1AlN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the nitride nucle-ation layer is an aluminum nitride (AlN) layer.
5
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further includes providing a transitional layer, and wherein the transitional layer is grown between the nitride nucleation layer and the GaN buffer layer.
6
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further include providing a barrier intermediate layer, and wherein the barrier intermediate layer is grown between the GaN buffer layer and the InAlGaN barrier layer.
8
Dependent← claim 1TMInTMAlTMGaNH₃
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) uses trim-ethyl indium (TMIn), trimethyl aluminum (TMAl), trim-ethyl gallium (TMGa), and ammonia gas (NH₃) as precursor materials to grow the InAlGaN barrier layer.
9
Dependent← claim 1InAlGaN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the InAlGaN barrier layer has a thickness of 3-5 nm. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
MOCVD process in a single reaction chamber: substrate (sapphire, SiC, or Si) is loaded; AlN nucleation layer, transitional layer, GaN buffer layer, AlN barrier intermediate layer, and InAlGaN barrier layer (3-5 nm, using TMIn, TMAl, TMGa, NH₃) are grown sequentially (Step S₁₀); then disilane (Si₂H₆) and NH₃ are filled into the chamber for 2-5 s at 950-1000°C, 5-8 sccm, <50 Torr to in-situ grow a SiNx protective layer on the InAlGaN barrier layer (Step S₂₀), yielding the in-situ SiNx/InAlGaN/GaN heterostructure.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
InAlGaN/GaN HEMT with in-situ SiNx
SiNxprotective layer and gate dielectric
InAlGaNbarrier layer
AlNbarrier intermediate layer
GaNbuffer layer
transitional layertransitional layer
AlNnucleation layer
Materials
Materials described outside the worked examples.
silane
SiH₄
Precursor Gas
trisilane
Si₃H₈
Precursor Gas
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
AFM
AFM
InAlGaNSiNx
TEM
TEM
Reported properties
Performance values and ranges asserted in the specification or claims.
Property
Value
Material
Duration
0–1001 seconds
—
Thickness
Cited prior art
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 4
US 9,853,138 B29,853,138 B2 12/2017 Yamada
US 12,191,626 B112,191,626 B1 * 1/2025 McLaurin.............. H10D 8/043examiner
US 2021/0111192 A12021/0111192 A1 4/2021 Lee et al.
TW 201919238 ATW 201919238 A 5/2019
Cited non-patent literature · 3
Jiang et al., “Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs”, IEEE Transactions on Electron Devices, vol. 64, No. 3, pp. 832-839, Mar. 2017.
Why these are connected
Related documents with shared materials, methods, properties, or citations.
MOCVD METHOD FOR GROWING INALGAN/GAN HETEROSTRUCTURE
Edward Yi Chang, You-Chen Weng, Xia-Xi Zheng
NATIONAL YANG MING CHIAO TUNG UNIVERSITY, Hsinchu (TW)·Jul. 1, 2025·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 shows a flowchart of a MOCVD method for growing an InAlGaN/GaN heterostructure according to one embodiment of the present invention.
FIG. 2
FIG. 2B schematically show sectional views corresponding to the steps of a MOCVD method for grow- ing an InAlGaN/GaN heterostructure according to one …
FIG. 3
FIG. 3 shows a sectional view of an HEMT element containing an in-situ grown SiNx/InAlGaN/GaN hetero- structure fabricated according to one embodiment of the 5 …
FIG. 4
FIG. 4 shows the surface micro-topographies of the InAlGaN/GaN heterostructures (taken by the atomic force microscope AFM D₃₁₀₀), wherein the image (a) is free …
FIG. 5
FIG. 5 shows the surface micro-topographies of the interfaces of the in-situ grown SiNx protective layers and the InAlGaN barrier layers (taken by a …
FIG. 6
FIG. 6 shows the XPS spectra of the inner cores of the SiNx protective layers respectively in-situ grown at different 20 temperatures, wherein the images (a), …
FIG. 7
FIG. 7 shows a C-V curve obtained in a double-sweep 25 scan of the SiNx protective layer in-situ grown at a fre- quency of 100 kHz, wherein the scan is …
FIG. 8
FIG. 8A shows C-V curves obtained in double-sweep scans of the in-situ grown SiNx protective layer wherein the 30 scans are performed at frequencies ranging …
FIG. 9
FIG. 9D show the relationships of the shifts of the threshold voltage (Vth) and 40 the stress time ranging from 0 seconds and 1001 seconds while the gate …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 8 dependent
1
Independentnitride nucleation layerGaNInAlGaNSiNxInAlGaN/GaN HEMT with in-situ SiNx
A method for fabricating an indium aluminum gallium nitride (InAlGaN)/gallium nitride (GaN) heterostructure, which is realized by a metal-organic chemical vapor depo-sition (MOCVD) process and comprises Step (1): providing a substrate, and sequentially growing a nitride nucleation layer, a GaN buffer layer, an InAlGaN barrier layer on the substrate; and Step (2): using a precursor gas containing silane to in-situ grow a SiNx protective layer on the InAlGaN barrier layer at a temperature of 950-1000° C., B₂ wherein Step (1) and Step (2) are undertaken in an identical reaction chamber.
2
Dependent← claim 1SiH₄Si₂H₆Si₃H₈Si₄H₁₀TEOS
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the precursor gas contains silane (SiH₄), disilane (Si₂H₆), trisilane (Si₃H₈), tetrasilane (Si₄H₁₀), tetraethoxysilane (TEOS), or a combi-nation thereof.
3
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (2) is performed for 2-5 seconds at a gas flow rate of 5-8 sccm and a chamber pressure of less than 50 Torr.
4
Dependent← claim 1AlN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the nitride nucle-ation layer is an aluminum nitride (AlN) layer.
5
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further includes providing a transitional layer, and wherein the transitional layer is grown between the nitride nucleation layer and the GaN buffer layer.
6
Dependent← claim 1
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) further include providing a barrier intermediate layer, and wherein the barrier intermediate layer is grown between the GaN buffer layer and the InAlGaN barrier layer.
8
Dependent← claim 1TMInTMAlTMGaNH₃
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein Step (1) uses trim-ethyl indium (TMIn), trimethyl aluminum (TMAl), trim-ethyl gallium (TMGa), and ammonia gas (NH₃) as precursor materials to grow the InAlGaN barrier layer.
9
Dependent← claim 1InAlGaN
The method for fabricating an InAlGaN/GaN heterostructure according to claim 1, wherein the InAlGaN barrier layer has a thickness of 3-5 nm. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
MOCVD process in a single reaction chamber: substrate (sapphire, SiC, or Si) is loaded; AlN nucleation layer, transitional layer, GaN buffer layer, AlN barrier intermediate layer, and InAlGaN barrier layer (3-5 nm, using TMIn, TMAl, TMGa, NH₃) are grown sequentially (Step S₁₀); then disilane (Si₂H₆) and NH₃ are filled into the chamber for 2-5 s at 950-1000°C, 5-8 sccm, <50 Torr to in-situ grow a SiNx protective layer on the InAlGaN barrier layer (Step S₂₀), yielding the in-situ SiNx/InAlGaN/GaN heterostructure.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
InAlGaN/GaN HEMT with in-situ SiNx
SiNxprotective layer and gate dielectric
InAlGaNbarrier layer
AlNbarrier intermediate layer
GaNbuffer layer
transitional layertransitional layer
AlNnucleation layer
Materials
Materials described outside the worked examples.
silane
SiH₄
Precursor Gas
trisilane
Si₃H₈
Precursor Gas
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
AFM
AFM
InAlGaNSiNx
TEM
TEM
Reported properties
Performance values and ranges asserted in the specification or claims.
Property
Value
Material
Duration
0–1001 seconds
—
Thickness
Cited prior art
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 4
US 9,853,138 B29,853,138 B2 12/2017 Yamada
US 12,191,626 B112,191,626 B1 * 1/2025 McLaurin.............. H10D 8/043examiner
US 2021/0111192 A12021/0111192 A1 4/2021 Lee et al.
TW 201919238 ATW 201919238 A 5/2019
Cited non-patent literature · 3
Jiang et al., “Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs”, IEEE Transactions on Electron Devices, vol. 64, No. 3, pp. 832-839, Mar. 2017.
Why these are connected
Related documents with shared materials, methods, properties, or citations.
Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs.
Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition. Lu et al., “Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition”, Applied Physics Letters, vol. 105, No. 10, p. 102911, total of 5 pages, Sep. 2014. Xia-Xi Zheng, “Growth and Characterization of Al(Ga,In)N/GaN Heterostructures by MOCVD for High Electron Mobility Transistor Applications”, total of 3 pages, Aug. 11, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition. Zheng et al., “Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition”, Applied Physics Express 15, 021001 (2022), total of 7 pages, published online Jan. 10, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs.
Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition. Lu et al., “Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition”, Applied Physics Letters, vol. 105, No. 10, p. 102911, total of 5 pages, Sep. 2014. Xia-Xi Zheng, “Growth and Characterization of Al(Ga,In)N/GaN Heterostructures by MOCVD for High Electron Mobility Transistor Applications”, total of 3 pages, Aug. 11, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition. Zheng et al., “Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition”, Applied Physics Express 15, 021001 (2022), total of 7 pages, published online Jan. 10, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs.
Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition. Lu et al., “Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition”, Applied Physics Letters, vol. 105, No. 10, p. 102911, total of 5 pages, Sep. 2014. Xia-Xi Zheng, “Growth and Characterization of Al(Ga,In)N/GaN Heterostructures by MOCVD for High Electron Mobility Transistor Applications”, total of 3 pages, Aug. 11, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition. Zheng et al., “Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition”, Applied Physics Express 15, 021001 (2022), total of 7 pages, published online Jan. 10, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Investigation of In Situ SiN as Gate Dielectric and surface Passivation for GaN MISHEMTs.
Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition. Lu et al., “Low trap states in in situ SiNx/AlN/GaN metal-insulator- semiconductor structures grown by metal-organic chemical vapor deposition”, Applied Physics Letters, vol. 105, No. 10, p. 102911, total of 5 pages, Sep. 2014. Xia-Xi Zheng, “Growth and Characterization of Al(Ga,In)N/GaN Heterostructures by MOCVD for High Electron Mobility Transistor Applications”, total of 3 pages, Aug. 11, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.
Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition. Zheng et al., “Optimization for the growth condition of in situ SiNx cap layer on ultrathin barrier InAIGaN/GaN heterostructures by metal-organic chemical vapor deposition”, Applied Physics Express 15, 021001 (2022), total of 7 pages, published online Jan. 10, 2022. A Declaration (total of 3 pages) corresponding to this reference is also attached.