Patent
US 9,842,920GALLIUM NITRIDE SEMICONDUCTOR DEVICE WITH ISOLATED FINGERS
Woochul JEON
US
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US 9,842,920Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a top view of a conventional non-bond-over-active area (BOA) semiconductor device; [0021]
FIG. 2 is a top view of a conventional BOA semiconductor device; [0022]
FIG. 3 is a top view of an implementation of an isolated source finger semiconductor device with a guard ring; [0023]
FIGS. 4A-4C are top views of implementations of isolated drain finger semiconductor devices; [0024]
FIGS. 5A-5C are top views of implementations of gate buses coupled to the gate rings of semiconductor devices; [0025]
FIGS. 6A-6C are top views of implementations of semiconductor devices having isolated drain fingers. 4 Docket No. ONS 0
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: an a single isolated drain finger, a gate ring and a source ring; wherein the gate ring completely surrounds a perimeter of the isolated drain finger, forming a closed shape around the drain fin g er; wherein the source ring completely surrounds an outer perimeter of the gate ring and the isolated drain finger, forming a second closed shape around the g ate rin g and isolated drain finger; wherein a gate bus is coupled to the gate ring; wherein a first electrically insulative portion is located between the isolated drain finger and the gate ring; and wherein a second electrically insulative portion is located between the gate ring and the source ring. Currently amended
2 The semiconductor device of claim 1, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 1, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring through a contact in the middle of the gate ring. Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring at an edge of the ring through a contact crossing the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device is inside the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device includes the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device ends at an edge of the isolated drain finger. 9. A semiconductor device comprising: an isolated source finger, a gate ring surrounding the isolated source finger, a drain ring surrounding the gate ring, a guard ring surrounding the drain ring; a gate bus coupled to the gate ring; a first electrically insulative portion between the gate ring and the source ring; and a second electrically insulative portion between the drain finger and the gate ring. Original
The semiconductor device of claim 9, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 9, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 9, wherein an active area of the device is inside the drain ring. 13. The semiconductor device of claim 9, wherein an active area of the device includes the drain ring. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN semiconductor device with isolated drain finger
Materials described outside the worked examples.
gallium nitride
GaN
Additional fabrication and treatment steps described in the patent.
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,842,920Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a top view of a conventional non-bond-over-active area (BOA) semiconductor device; [0021]
FIG. 2 is a top view of a conventional BOA semiconductor device; [0022]
FIG. 3 is a top view of an implementation of an isolated source finger semiconductor device with a guard ring; [0023]
FIGS. 4A-4C are top views of implementations of isolated drain finger semiconductor devices; [0024]
FIGS. 5A-5C are top views of implementations of gate buses coupled to the gate rings of semiconductor devices; [0025]
FIGS. 6A-6C are top views of implementations of semiconductor devices having isolated drain fingers. 4 Docket No. ONS 0
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: an a single isolated drain finger, a gate ring and a source ring; wherein the gate ring completely surrounds a perimeter of the isolated drain finger, forming a closed shape around the drain fin g er; wherein the source ring completely surrounds an outer perimeter of the gate ring and the isolated drain finger, forming a second closed shape around the g ate rin g and isolated drain finger; wherein a gate bus is coupled to the gate ring; wherein a first electrically insulative portion is located between the isolated drain finger and the gate ring; and wherein a second electrically insulative portion is located between the gate ring and the source ring. Currently amended
2 The semiconductor device of claim 1, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 1, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring through a contact in the middle of the gate ring. Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring at an edge of the ring through a contact crossing the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device is inside the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device includes the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device ends at an edge of the isolated drain finger. 9. A semiconductor device comprising: an isolated source finger, a gate ring surrounding the isolated source finger, a drain ring surrounding the gate ring, a guard ring surrounding the drain ring; a gate bus coupled to the gate ring; a first electrically insulative portion between the gate ring and the source ring; and a second electrically insulative portion between the drain finger and the gate ring. Original
The semiconductor device of claim 9, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 9, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 9, wherein an active area of the device is inside the drain ring. 13. The semiconductor device of claim 9, wherein an active area of the device includes the drain ring. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN semiconductor device with isolated drain finger
Materials described outside the worked examples.
gallium nitride
GaN
Additional fabrication and treatment steps described in the patent.
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,842,920Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a top view of a conventional non-bond-over-active area (BOA) semiconductor device; [0021]
FIG. 2 is a top view of a conventional BOA semiconductor device; [0022]
FIG. 3 is a top view of an implementation of an isolated source finger semiconductor device with a guard ring; [0023]
FIGS. 4A-4C are top views of implementations of isolated drain finger semiconductor devices; [0024]
FIGS. 5A-5C are top views of implementations of gate buses coupled to the gate rings of semiconductor devices; [0025]
FIGS. 6A-6C are top views of implementations of semiconductor devices having isolated drain fingers. 4 Docket No. ONS 0
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: an a single isolated drain finger, a gate ring and a source ring; wherein the gate ring completely surrounds a perimeter of the isolated drain finger, forming a closed shape around the drain fin g er; wherein the source ring completely surrounds an outer perimeter of the gate ring and the isolated drain finger, forming a second closed shape around the g ate rin g and isolated drain finger; wherein a gate bus is coupled to the gate ring; wherein a first electrically insulative portion is located between the isolated drain finger and the gate ring; and wherein a second electrically insulative portion is located between the gate ring and the source ring. Currently amended
2 The semiconductor device of claim 1, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 1, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring through a contact in the middle of the gate ring. Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring at an edge of the ring through a contact crossing the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device is inside the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device includes the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device ends at an edge of the isolated drain finger. 9. A semiconductor device comprising: an isolated source finger, a gate ring surrounding the isolated source finger, a drain ring surrounding the gate ring, a guard ring surrounding the drain ring; a gate bus coupled to the gate ring; a first electrically insulative portion between the gate ring and the source ring; and a second electrically insulative portion between the drain finger and the gate ring. Original
The semiconductor device of claim 9, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 9, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 9, wherein an active area of the device is inside the drain ring. 13. The semiconductor device of claim 9, wherein an active area of the device includes the drain ring. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN semiconductor device with isolated drain finger
Materials described outside the worked examples.
gallium nitride
GaN
Additional fabrication and treatment steps described in the patent.
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,842,920Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a top view of a conventional non-bond-over-active area (BOA) semiconductor device; [0021]
FIG. 2 is a top view of a conventional BOA semiconductor device; [0022]
FIG. 3 is a top view of an implementation of an isolated source finger semiconductor device with a guard ring; [0023]
FIGS. 4A-4C are top views of implementations of isolated drain finger semiconductor devices; [0024]
FIGS. 5A-5C are top views of implementations of gate buses coupled to the gate rings of semiconductor devices; [0025]
FIGS. 6A-6C are top views of implementations of semiconductor devices having isolated drain fingers. 4 Docket No. ONS 0
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: an a single isolated drain finger, a gate ring and a source ring; wherein the gate ring completely surrounds a perimeter of the isolated drain finger, forming a closed shape around the drain fin g er; wherein the source ring completely surrounds an outer perimeter of the gate ring and the isolated drain finger, forming a second closed shape around the g ate rin g and isolated drain finger; wherein a gate bus is coupled to the gate ring; wherein a first electrically insulative portion is located between the isolated drain finger and the gate ring; and wherein a second electrically insulative portion is located between the gate ring and the source ring. Currently amended
2 The semiconductor device of claim 1, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 1, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring through a contact in the middle of the gate ring. Original
The semiconductor device of claim 1, wherein the gate bus is coupled to the gate ring at an edge of the ring through a contact crossing the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device is inside the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device includes the source ring. Original
The semiconductor device of claim 1, wherein an active area of the device ends at an edge of the isolated drain finger. 9. A semiconductor device comprising: an isolated source finger, a gate ring surrounding the isolated source finger, a drain ring surrounding the gate ring, a guard ring surrounding the drain ring; a gate bus coupled to the gate ring; a first electrically insulative portion between the gate ring and the source ring; and a second electrically insulative portion between the drain finger and the gate ring. Original
The semiconductor device of claim 9, wherein the device is a high electron mobility transistor (HEMT). Original
The semiconductor device of claim 9, further comprising a contact in each of the isolated drain finger, the gate ring and the source ring. Original
The semiconductor device of claim 9, wherein an active area of the device is inside the drain ring. 13. The semiconductor device of claim 9, wherein an active area of the device includes the drain ring. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN semiconductor device with isolated drain finger
Materials described outside the worked examples.
gallium nitride
GaN
Additional fabrication and treatment steps described in the patent.
Related documents with shared materials, methods, properties, or citations.
GaN semiconductor device with isolated source finger
METHOD OF FABRICATING NONPOLAR GALLIUM NITRIDE-BASED SEMICONDUCTOR LAYER, NONPOLAR SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME
GaN semiconductor device with isolated source finger
METHOD OF FABRICATING NONPOLAR GALLIUM NITRIDE-BASED SEMICONDUCTOR LAYER, NONPOLAR SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME
GaN semiconductor device with isolated source finger
METHOD OF FABRICATING NONPOLAR GALLIUM NITRIDE-BASED SEMICONDUCTOR LAYER, NONPOLAR SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME
GaN semiconductor device with isolated source finger
METHOD OF FABRICATING NONPOLAR GALLIUM NITRIDE-BASED SEMICONDUCTOR LAYER, NONPOLAR SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME