Patent
US 9,093,365GaN-containing semiconductor structure
Yi CHANG
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,093,365Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates the block flow diagram for form in g the GaN-conta inin g semiconductor structure accord in g to the technology disclosed by the present in vention. 3
Figure 2 illustrates the cross-sectional view of GaN-containing semiconductor structure accord in g to the technology disclosed by the present invention.
Figure 3 illustrates the transmission electron microscope (TEM) 5 diagram of GaN-containing semiconductor structure according to the technology disclosed by the present invention.
Figure 4(a) and
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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(C urrently Amended). A GaN-containing semiconductor structure formed by using metal-organic chemical vapor deposition (MO C VD), comprising: a substrate; a nucleation layer on the substrate, wherein the nucleation layer is AIN layer; a diffusion blocking layer on the nucleation layer, wherein the diffusion blocking -2- SVG 14190382.04-27-2015.I₉₀₄JDW₀PXXIFW3.CLM15477101.2.391.346.1091.443.svg 0.323 2.333 Chemistry Black and white layer is selected from the group consisting of a single AIN layer, the single AIN layer with a single AIGaN layer, the single AIN layer with multiple AIGaN layers, wherein the formin g temperature of the diffusion blockin g la y er is from 95 0 C to 1200 C; a strain relief layer on the diffusion blocking layer, wherein the strain relief la y er is GaN, and a thickness of the strain relief layer is from 30 nm to 100 nm, the formin g temperature of the strain relief la y er is from 450 0C to 600 C; and a semiconductor layer on the strain relief layer, wherein the formin g temperature of the semiconductor layer is from 95 0 C to 1200 C. 8-1 2(C ancelled).
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Layer stacks claimed or described, ordered top of device to substrate.
GaN-containing semiconductor structure
Materials described outside the worked examples.
AlN nucleation layer
AlN
AlGaN diffusion blocking layer
AlGaN
GaN strain relief layer
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
TEM diagram showing strain relief layer has a structure with multiple defects; diffusion blocking layer and strain relief layer visible in buffer layer stack.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–800 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,093,365Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates the block flow diagram for form in g the GaN-conta inin g semiconductor structure accord in g to the technology disclosed by the present in vention. 3
Figure 2 illustrates the cross-sectional view of GaN-containing semiconductor structure accord in g to the technology disclosed by the present invention.
Figure 3 illustrates the transmission electron microscope (TEM) 5 diagram of GaN-containing semiconductor structure according to the technology disclosed by the present invention.
Figure 4(a) and
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
canceled
canceled
canceled
canceled
(C urrently Amended). A GaN-containing semiconductor structure formed by using metal-organic chemical vapor deposition (MO C VD), comprising: a substrate; a nucleation layer on the substrate, wherein the nucleation layer is AIN layer; a diffusion blocking layer on the nucleation layer, wherein the diffusion blocking -2- SVG 14190382.04-27-2015.I₉₀₄JDW₀PXXIFW3.CLM15477101.2.391.346.1091.443.svg 0.323 2.333 Chemistry Black and white layer is selected from the group consisting of a single AIN layer, the single AIN layer with a single AIGaN layer, the single AIN layer with multiple AIGaN layers, wherein the formin g temperature of the diffusion blockin g la y er is from 95 0 C to 1200 C; a strain relief layer on the diffusion blocking layer, wherein the strain relief la y er is GaN, and a thickness of the strain relief layer is from 30 nm to 100 nm, the formin g temperature of the strain relief la y er is from 450 0C to 600 C; and a semiconductor layer on the strain relief layer, wherein the formin g temperature of the semiconductor layer is from 95 0 C to 1200 C. 8-1 2(C ancelled).
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-containing semiconductor structure
Materials described outside the worked examples.
AlN nucleation layer
AlN
AlGaN diffusion blocking layer
AlGaN
GaN strain relief layer
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
TEM diagram showing strain relief layer has a structure with multiple defects; diffusion blocking layer and strain relief layer visible in buffer layer stack.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–800 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,093,365Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates the block flow diagram for form in g the GaN-conta inin g semiconductor structure accord in g to the technology disclosed by the present in vention. 3
Figure 2 illustrates the cross-sectional view of GaN-containing semiconductor structure accord in g to the technology disclosed by the present invention.
Figure 3 illustrates the transmission electron microscope (TEM) 5 diagram of GaN-containing semiconductor structure according to the technology disclosed by the present invention.
Figure 4(a) and
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
canceled
canceled
canceled
canceled
(C urrently Amended). A GaN-containing semiconductor structure formed by using metal-organic chemical vapor deposition (MO C VD), comprising: a substrate; a nucleation layer on the substrate, wherein the nucleation layer is AIN layer; a diffusion blocking layer on the nucleation layer, wherein the diffusion blocking -2- SVG 14190382.04-27-2015.I₉₀₄JDW₀PXXIFW3.CLM15477101.2.391.346.1091.443.svg 0.323 2.333 Chemistry Black and white layer is selected from the group consisting of a single AIN layer, the single AIN layer with a single AIGaN layer, the single AIN layer with multiple AIGaN layers, wherein the formin g temperature of the diffusion blockin g la y er is from 95 0 C to 1200 C; a strain relief layer on the diffusion blocking layer, wherein the strain relief la y er is GaN, and a thickness of the strain relief layer is from 30 nm to 100 nm, the formin g temperature of the strain relief la y er is from 450 0C to 600 C; and a semiconductor layer on the strain relief layer, wherein the formin g temperature of the semiconductor layer is from 95 0 C to 1200 C. 8-1 2(C ancelled).
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-containing semiconductor structure
Materials described outside the worked examples.
AlN nucleation layer
AlN
AlGaN diffusion blocking layer
AlGaN
GaN strain relief layer
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
TEM diagram showing strain relief layer has a structure with multiple defects; diffusion blocking layer and strain relief layer visible in buffer layer stack.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–800 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,093,365Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates the block flow diagram for form in g the GaN-conta inin g semiconductor structure accord in g to the technology disclosed by the present in vention. 3
Figure 2 illustrates the cross-sectional view of GaN-containing semiconductor structure accord in g to the technology disclosed by the present invention.
Figure 3 illustrates the transmission electron microscope (TEM) 5 diagram of GaN-containing semiconductor structure according to the technology disclosed by the present invention.
Figure 4(a) and
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
canceled
canceled
canceled
canceled
(C urrently Amended). A GaN-containing semiconductor structure formed by using metal-organic chemical vapor deposition (MO C VD), comprising: a substrate; a nucleation layer on the substrate, wherein the nucleation layer is AIN layer; a diffusion blocking layer on the nucleation layer, wherein the diffusion blocking -2- SVG 14190382.04-27-2015.I₉₀₄JDW₀PXXIFW3.CLM15477101.2.391.346.1091.443.svg 0.323 2.333 Chemistry Black and white layer is selected from the group consisting of a single AIN layer, the single AIN layer with a single AIGaN layer, the single AIN layer with multiple AIGaN layers, wherein the formin g temperature of the diffusion blockin g la y er is from 95 0 C to 1200 C; a strain relief layer on the diffusion blocking layer, wherein the strain relief la y er is GaN, and a thickness of the strain relief layer is from 30 nm to 100 nm, the formin g temperature of the strain relief la y er is from 450 0C to 600 C; and a semiconductor layer on the strain relief layer, wherein the formin g temperature of the semiconductor layer is from 95 0 C to 1200 C. 8-1 2(C ancelled).
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-containing semiconductor structure
Materials described outside the worked examples.
AlN nucleation layer
AlN
AlGaN diffusion blocking layer
AlGaN
GaN strain relief layer
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
TEM diagram showing strain relief layer has a structure with multiple defects; diffusion blocking layer and strain relief layer visible in buffer layer stack.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 500–800 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
AlN or AlGaN nucleation layer
substrate
Optical image comparing GaN growth structure with diffusion blocking layer and strain relief layer (smooth surface) versus GaN growth structure with single AlN buffer layer (rough surface).
| — |
Temperature | 450–600 °C | — |
Thickness | 30–100 nm | — |
Thickness | 1–5 um | — |
AlN or AlGaN nucleation layer
substrate
Optical image comparing GaN growth structure with diffusion blocking layer and strain relief layer (smooth surface) versus GaN growth structure with single AlN buffer layer (rough surface).
| — |
Temperature | 450–600 °C | — |
Thickness | 30–100 nm | — |
Thickness | 1–5 um | — |
AlN or AlGaN nucleation layer
substrate
Optical image comparing GaN growth structure with diffusion blocking layer and strain relief layer (smooth surface) versus GaN growth structure with single AlN buffer layer (rough surface).
| — |
Temperature | 450–600 °C | — |
Thickness | 30–100 nm | — |
Thickness | 1–5 um | — |
AlN or AlGaN nucleation layer
substrate
Optical image comparing GaN growth structure with diffusion blocking layer and strain relief layer (smooth surface) versus GaN growth structure with single AlN buffer layer (rough surface).
| — |
Temperature | 450–600 °C | — |
Thickness | 30–100 nm | — |
Thickness | 1–5 um | — |