The graphene base transistor of claim 1, wherein the top surface of the emitter pillar is formed by an emitter-barrier layer that is made of a dielectric material while the rest of the emitter pillar is made of a semiconductor.

The graphene base transistor of claim 1 or 2, wherein the emitter pillar has the shape of a rectangular parallelepiped or of a truncated cone.

The graphene base transistor of at least one of the preceding clai SVG 14894090.11-25-2015.IHNRIPICPXXIFW1.CLM.2.18.620.2118.692.2152.svg 0.113 0.24 Chemistry Black and white claim 1, comprising two emitter-contact pillars arranged on opposite lateral sides of the emitter pillar.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the base-contact structure is made of either Ti, TiN, Ta, Ni, A l or Cu or a combination of at least two of these materials.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the graphene base layer covers only a part of a lateral extension of the at least one base-contact arm, wherein the lateral extension meant here is to be measured in a direction perpendicular to the longitudinal direction of the base-contact arm.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the at least one base contact arm includes at least one opening that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface, and wherein the graphene base layer covers the at least one opening.

1 0. An electronic component, comprising at least one graphene base transistor according to at least one of the preceding claims claim 1 and at least one MOS-transistor, a passive electronic device, an optoelectronic device, a photonic device, or a MEMS device on the same silicon or silicon-on-insulator substrate. 6 PATENT Attorney Docket No. 536-009.066

1 2. The method of claim 11, wherein fabricating the electrically conductive pillar foundation, the at least one emitter pillar and at least one emitter-contact pillar comprises-structuring the emitter layer by masked anisotropic etching to form the emitter pillar and the emitter-contact pillar, and stopping the etching before reaching the foundation mesa in order to obtain the pillar foundation.

The method of claim 11-r 12, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

The method of at least one of the claims 11 to 13claim 13, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface.

A method for fabricating an electronic component, comprising a) covering a first lateral region of a silicon substrate or silicon-on-insulator substrate of with a first masking layer; b) fabricating a graphene transistor according to a method of at least one of the claims 11 to 14 claim 11 in a second lateral region on the silicon surface of the substrate; c) removing the first masking layer from the first lateral region; d) covering the second lateral region with a second masking layer 8 PATENT Attorney Docket No. 536-009.066 e) fabricating at least one other active or passive device in the first lateral region on the silicon surface of the substrate; f) removing any remaining masking layer wherein the sequence of steps d) to f) is performed either before or after the sequence of steps a) to c).

1 6. The method of claim 11, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

1 7. The method of claim 11, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface. 9

The graphene base transistor of claim 1, wherein the top surface of the emitter pillar is formed by an emitter-barrier layer that is made of a dielectric material while the rest of the emitter pillar is made of a semiconductor.

The graphene base transistor of claim 1 or 2, wherein the emitter pillar has the shape of a rectangular parallelepiped or of a truncated cone.

The graphene base transistor of at least one of the preceding clai SVG 14894090.11-25-2015.IHNRIPICPXXIFW1.CLM.2.18.620.2118.692.2152.svg 0.113 0.24 Chemistry Black and white claim 1, comprising two emitter-contact pillars arranged on opposite lateral sides of the emitter pillar.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the base-contact structure is made of either Ti, TiN, Ta, Ni, A l or Cu or a combination of at least two of these materials.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the graphene base layer covers only a part of a lateral extension of the at least one base-contact arm, wherein the lateral extension meant here is to be measured in a direction perpendicular to the longitudinal direction of the base-contact arm.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the at least one base contact arm includes at least one opening that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface, and wherein the graphene base layer covers the at least one opening.

1 0. An electronic component, comprising at least one graphene base transistor according to at least one of the preceding claims claim 1 and at least one MOS-transistor, a passive electronic device, an optoelectronic device, a photonic device, or a MEMS device on the same silicon or silicon-on-insulator substrate. 6 PATENT Attorney Docket No. 536-009.066

1 2. The method of claim 11, wherein fabricating the electrically conductive pillar foundation, the at least one emitter pillar and at least one emitter-contact pillar comprises-structuring the emitter layer by masked anisotropic etching to form the emitter pillar and the emitter-contact pillar, and stopping the etching before reaching the foundation mesa in order to obtain the pillar foundation.

The method of claim 11-r 12, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

The method of at least one of the claims 11 to 13claim 13, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface.

A method for fabricating an electronic component, comprising a) covering a first lateral region of a silicon substrate or silicon-on-insulator substrate of with a first masking layer; b) fabricating a graphene transistor according to a method of at least one of the claims 11 to 14 claim 11 in a second lateral region on the silicon surface of the substrate; c) removing the first masking layer from the first lateral region; d) covering the second lateral region with a second masking layer 8 PATENT Attorney Docket No. 536-009.066 e) fabricating at least one other active or passive device in the first lateral region on the silicon surface of the substrate; f) removing any remaining masking layer wherein the sequence of steps d) to f) is performed either before or after the sequence of steps a) to c).

1 6. The method of claim 11, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

1 7. The method of claim 11, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface. 9

The graphene base transistor of claim 1, wherein the top surface of the emitter pillar is formed by an emitter-barrier layer that is made of a dielectric material while the rest of the emitter pillar is made of a semiconductor.

The graphene base transistor of claim 1 or 2, wherein the emitter pillar has the shape of a rectangular parallelepiped or of a truncated cone.

The graphene base transistor of at least one of the preceding clai SVG 14894090.11-25-2015.IHNRIPICPXXIFW1.CLM.2.18.620.2118.692.2152.svg 0.113 0.24 Chemistry Black and white claim 1, comprising two emitter-contact pillars arranged on opposite lateral sides of the emitter pillar.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the base-contact structure is made of either Ti, TiN, Ta, Ni, A l or Cu or a combination of at least two of these materials.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the graphene base layer covers only a part of a lateral extension of the at least one base-contact arm, wherein the lateral extension meant here is to be measured in a direction perpendicular to the longitudinal direction of the base-contact arm.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the at least one base contact arm includes at least one opening that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface, and wherein the graphene base layer covers the at least one opening.

1 0. An electronic component, comprising at least one graphene base transistor according to at least one of the preceding claims claim 1 and at least one MOS-transistor, a passive electronic device, an optoelectronic device, a photonic device, or a MEMS device on the same silicon or silicon-on-insulator substrate. 6 PATENT Attorney Docket No. 536-009.066

1 2. The method of claim 11, wherein fabricating the electrically conductive pillar foundation, the at least one emitter pillar and at least one emitter-contact pillar comprises-structuring the emitter layer by masked anisotropic etching to form the emitter pillar and the emitter-contact pillar, and stopping the etching before reaching the foundation mesa in order to obtain the pillar foundation.

The method of claim 11-r 12, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

The method of at least one of the claims 11 to 13claim 13, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface.

A method for fabricating an electronic component, comprising a) covering a first lateral region of a silicon substrate or silicon-on-insulator substrate of with a first masking layer; b) fabricating a graphene transistor according to a method of at least one of the claims 11 to 14 claim 11 in a second lateral region on the silicon surface of the substrate; c) removing the first masking layer from the first lateral region; d) covering the second lateral region with a second masking layer 8 PATENT Attorney Docket No. 536-009.066 e) fabricating at least one other active or passive device in the first lateral region on the silicon surface of the substrate; f) removing any remaining masking layer wherein the sequence of steps d) to f) is performed either before or after the sequence of steps a) to c).

1 6. The method of claim 11, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

1 7. The method of claim 11, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface. 9

The graphene base transistor of claim 1, wherein the top surface of the emitter pillar is formed by an emitter-barrier layer that is made of a dielectric material while the rest of the emitter pillar is made of a semiconductor.

The graphene base transistor of claim 1 or 2, wherein the emitter pillar has the shape of a rectangular parallelepiped or of a truncated cone.

The graphene base transistor of at least one of the preceding clai SVG 14894090.11-25-2015.IHNRIPICPXXIFW1.CLM.2.18.620.2118.692.2152.svg 0.113 0.24 Chemistry Black and white claim 1, comprising two emitter-contact pillars arranged on opposite lateral sides of the emitter pillar.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the base-contact structure is made of either Ti, TiN, Ta, Ni, A l or Cu or a combination of at least two of these materials.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the graphene base layer covers only a part of a lateral extension of the at least one base-contact arm, wherein the lateral extension meant here is to be measured in a direction perpendicular to the longitudinal direction of the base-contact arm.

The graphene base transistor of at least one of the preceding claims claim 1, wherein the at least one base contact arm includes at least one opening that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface, and wherein the graphene base layer covers the at least one opening.

1 0. An electronic component, comprising at least one graphene base transistor according to at least one of the preceding claims claim 1 and at least one MOS-transistor, a passive electronic device, an optoelectronic device, a photonic device, or a MEMS device on the same silicon or silicon-on-insulator substrate. 6 PATENT Attorney Docket No. 536-009.066

1 2. The method of claim 11, wherein fabricating the electrically conductive pillar foundation, the at least one emitter pillar and at least one emitter-contact pillar comprises-structuring the emitter layer by masked anisotropic etching to form the emitter pillar and the emitter-contact pillar, and stopping the etching before reaching the foundation mesa in order to obtain the pillar foundation.

The method of claim 11-r 12, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

The method of at least one of the claims 11 to 13claim 13, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface.

A method for fabricating an electronic component, comprising a) covering a first lateral region of a silicon substrate or silicon-on-insulator substrate of with a first masking layer; b) fabricating a graphene transistor according to a method of at least one of the claims 11 to 14 claim 11 in a second lateral region on the silicon surface of the substrate; c) removing the first masking layer from the first lateral region; d) covering the second lateral region with a second masking layer 8 PATENT Attorney Docket No. 536-009.066 e) fabricating at least one other active or passive device in the first lateral region on the silicon surface of the substrate; f) removing any remaining masking layer wherein the sequence of steps d) to f) is performed either before or after the sequence of steps a) to c).

1 6. The method of claim 11, wherein fabricating the emitter contact pillar comprises, before fabricating the collector stack, fabricating a metallically conductive emitter-contact face on the exposed top surface of emitter layer at the position of the emitter-contact pillar.

1 7. The method of claim 11, wherein fabricating the base-contact structure comprises fabricating at least one opening in the at least one base-contact arm that is laterally positioned on the at least one base-contact arm and that extends through the base-contact arm in a vertical direction, which points perpendicular to the substrate surface. 9