Patent
Atlas literature
Patent
US 9,590,088Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic illustration of a CAVET 100, including higher/heavily n- type doped Gallium Nitride (n + -GaN) 102, lower or lightly n-type doped GaN (n- …
FIG. 2(i), the CBL 212 and 10 the source 222 are electrically connected 236 such that there is no bias across any part of the source 222 and the CBL 212. The …
FIG. 3 shows a band diagram of a structure wherein a conduction band E, offset and valence band EF o ffset between the CBL and the energy of the electrons and …
FIG. 4(b) plots the current density as a function of Vd s through a p-GaN CBL of a zero aperture CAVET. 5 In addition, the blocking capacity of the p-layer can …
FIG. 5(d) is a graph of the I -V characteristics of the n/p/n structure on the GaN substrate, 20 with the back p/n diode 512 (comprising layers 504 and 502) …
FIG. 6 is a graph of the direct current (DC) I -V characteristics of the CAVET, plotting drain-source current (Ids) as a functi on o f Vds f or a d evice with …
FIG. 7. Pulsed ID S -VD S characteristics, measured with gate pulsed at 80 g s pulse width, showed no current collapse, as shown in
FIG. 8. With decreasing Lgo (the gate-aperture overlap), the leakage current increased due 10 to unmodulated electrons flowing from source through the aperture …
FIG. 9. Process Ste ps
FIG. 10 is a flowchart illustrating a method of fabricating a CAVET according to one or more embodiments of the present invention. DETAILED DESCRIPTION OF THE …
FIG. 30 6.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An active buried Mg-doped GaN layer can be grown in situ without any need of an activation process.
The CAVET of claim 1, wherein the source contact is deposited in a trench through the semiconductor layer and the source contact in the trench contacts the current blocking layer.
The CAVET of claim 1, wherein: the CAVET has a drain-source current of less than 0.5 kA/cm 2 for all drain source voltages in a range of 0-10 Volts, at pinch off, for DC operation, and for the gate pulsed with a 80 microsecond pulse width, and the CAVET's pulsed current voltage characteristic, with the gate pulsed with the 80 microsecond pulse width, is identical to within % of the CAVET's direct current (DC) current voltage characteristic, for a drain-source voltage of 2 volts. -7- G&C 30794.417-US-C₁
The CBL is a homoepitaxial blocking layer.
The CAVET does not need implanted GaN as the CBL. 30 4. The CAVET provides an ability to collect any holes that are generated during the operation of the device, so as to increase device reliability. 14 5. The method/device provides an effective manner to connect the source to the CBL, so that there is no bias across any part of the source and the CBL, preventing electron injection from the source to the drain.
The method/device enables smooth high frequency switching because of 5 the predictable response of the p-type CBL, as compared to CBLs created using implantation to create damage. Another benefit to the present invention is the simplicity in processing of the device. The biggest challenge in a device like the CAVET is the CBL. The most cost- effective CBL is a p-GaN layer grown on top of the n-drift region. When the p-n junction 10 gets reverse biased during device operation, it can hold a very large voltage, which is desirable for the working of the device. The biggest challenge is to get an active buried p-layer as subsequent AlGaN/GaN layers are grown on top to form the 2DEG. However, un der hydrogen ambient at high regrowth temperatures (~ 1 160 0 C), a p-layer is not active. The present invention, on the other hand, ensures a buried active p-GaN layer in 15 the structure, which makes it functional and more effective from a device performance point of view. Nomenclature The terms "(A l InGaN)" "(In,A l)GaN", or "GaN" as used herein (as well as the terms "I II -nitride," "Group-I II nitride", or "nitride," used generally) refer to any alloy composition of the (Ga,Al, I n,B)N semiconductors having the formula Ga AlxInyBzN where 0 w < 1, 0 <x < 1, 0 <y 1,0 <z < 1 and w + x + y + z = 1. These terms are intended to be broadly construed to include respective nitrides of the single species, Ga, Al, In and B, as well as binary, ternary and quaternary compositions 25 of such Group III metal species. Accordingly, it will be appreciated that the discussion of the invention hereinafter in reference to GaN and AlGaN materials is applicable to the formation of various other (Ga,Al, I n,B)N material species. Further, (Ga,Al, I n,B)N materials within the scope of the invention may further include minor quantities of dopants and/or other impurity or inclusional materials. 30 15 References The following references are incorporated by reference herein: [1] S. Chowdhury et al., Presented at EMC 2008, Santa Barbara. [2] Srabanti Chowdhury, Brian L. Swenson and Umesh K. Mishra, 5 "Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN as Current Blocking Layer," IEEE Electron Device Letters, Vol. 29, No. 6, pp. 543-545, June 2008. [3] Srabanti Chowdhury, "AlGaN/GaN CAVETs for high power switching application," Ph.D. thesis, University of California Santa Barbara, December 2010, 10 including the following pages: cover, iii, viii-xiv, and 154-155. [4] "p-n junctions on Ga-face GaN by NH₃ molecular beam epitaxy with low ideality factors and low reverse currents," C. A. Hu rn i. et al, Applied Physics Letters Vol. 97, 222113, Nov 2010. [5] S. Chowdhury et al, IEEE EDL, Vol. 29, 2008. 15 [6] S. Chowdhury et al, DRC, South Bend, July 2010. Conclusion This concludes the description of the preferred embodiments of the present invention. The foregoing description of one or more embodiments of the invention has 20 been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto. 25 16 Claims What is claimed is:
Please amend claims 7, 10, 14, 17 and 22 and cancel claim 23 as follows. canceled
canceled
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
Current Aperture Vertical Electron Transistor (CAVET)
Materials described outside the worked examples.
p-type Mg-doped GaN (p-GaN)
GaN:Mg
n-type GaN
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Mg concentration vs. estimated depth through the CAVET structure (FIG. 4(a))
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
CBL leakage current at reverse bias 400V | 140 µA | GaN:Mg |
CBL blocking capacity-current density through CBL at off-state 400V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,590,088Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic illustration of a CAVET 100, including higher/heavily n- type doped Gallium Nitride (n + -GaN) 102, lower or lightly n-type doped GaN (n- …
FIG. 2(i), the CBL 212 and 10 the source 222 are electrically connected 236 such that there is no bias across any part of the source 222 and the CBL 212. The …
FIG. 3 shows a band diagram of a structure wherein a conduction band E, offset and valence band EF o ffset between the CBL and the energy of the electrons and …
FIG. 4(b) plots the current density as a function of Vd s through a p-GaN CBL of a zero aperture CAVET. 5 In addition, the blocking capacity of the p-layer can …
FIG. 5(d) is a graph of the I -V characteristics of the n/p/n structure on the GaN substrate, 20 with the back p/n diode 512 (comprising layers 504 and 502) …
FIG. 6 is a graph of the direct current (DC) I -V characteristics of the CAVET, plotting drain-source current (Ids) as a functi on o f Vds f or a d evice with …
FIG. 7. Pulsed ID S -VD S characteristics, measured with gate pulsed at 80 g s pulse width, showed no current collapse, as shown in
FIG. 8. With decreasing Lgo (the gate-aperture overlap), the leakage current increased due 10 to unmodulated electrons flowing from source through the aperture …
FIG. 9. Process Ste ps
FIG. 10 is a flowchart illustrating a method of fabricating a CAVET according to one or more embodiments of the present invention. DETAILED DESCRIPTION OF THE …
FIG. 30 6.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An active buried Mg-doped GaN layer can be grown in situ without any need of an activation process.
The CAVET of claim 1, wherein the source contact is deposited in a trench through the semiconductor layer and the source contact in the trench contacts the current blocking layer.
The CAVET of claim 1, wherein: the CAVET has a drain-source current of less than 0.5 kA/cm 2 for all drain source voltages in a range of 0-10 Volts, at pinch off, for DC operation, and for the gate pulsed with a 80 microsecond pulse width, and the CAVET's pulsed current voltage characteristic, with the gate pulsed with the 80 microsecond pulse width, is identical to within % of the CAVET's direct current (DC) current voltage characteristic, for a drain-source voltage of 2 volts. -7- G&C 30794.417-US-C₁
The CBL is a homoepitaxial blocking layer.
The CAVET does not need implanted GaN as the CBL. 30 4. The CAVET provides an ability to collect any holes that are generated during the operation of the device, so as to increase device reliability. 14 5. The method/device provides an effective manner to connect the source to the CBL, so that there is no bias across any part of the source and the CBL, preventing electron injection from the source to the drain.
The method/device enables smooth high frequency switching because of 5 the predictable response of the p-type CBL, as compared to CBLs created using implantation to create damage. Another benefit to the present invention is the simplicity in processing of the device. The biggest challenge in a device like the CAVET is the CBL. The most cost- effective CBL is a p-GaN layer grown on top of the n-drift region. When the p-n junction 10 gets reverse biased during device operation, it can hold a very large voltage, which is desirable for the working of the device. The biggest challenge is to get an active buried p-layer as subsequent AlGaN/GaN layers are grown on top to form the 2DEG. However, un der hydrogen ambient at high regrowth temperatures (~ 1 160 0 C), a p-layer is not active. The present invention, on the other hand, ensures a buried active p-GaN layer in 15 the structure, which makes it functional and more effective from a device performance point of view. Nomenclature The terms "(A l InGaN)" "(In,A l)GaN", or "GaN" as used herein (as well as the terms "I II -nitride," "Group-I II nitride", or "nitride," used generally) refer to any alloy composition of the (Ga,Al, I n,B)N semiconductors having the formula Ga AlxInyBzN where 0 w < 1, 0 <x < 1, 0 <y 1,0 <z < 1 and w + x + y + z = 1. These terms are intended to be broadly construed to include respective nitrides of the single species, Ga, Al, In and B, as well as binary, ternary and quaternary compositions 25 of such Group III metal species. Accordingly, it will be appreciated that the discussion of the invention hereinafter in reference to GaN and AlGaN materials is applicable to the formation of various other (Ga,Al, I n,B)N material species. Further, (Ga,Al, I n,B)N materials within the scope of the invention may further include minor quantities of dopants and/or other impurity or inclusional materials. 30 15 References The following references are incorporated by reference herein: [1] S. Chowdhury et al., Presented at EMC 2008, Santa Barbara. [2] Srabanti Chowdhury, Brian L. Swenson and Umesh K. Mishra, 5 "Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN as Current Blocking Layer," IEEE Electron Device Letters, Vol. 29, No. 6, pp. 543-545, June 2008. [3] Srabanti Chowdhury, "AlGaN/GaN CAVETs for high power switching application," Ph.D. thesis, University of California Santa Barbara, December 2010, 10 including the following pages: cover, iii, viii-xiv, and 154-155. [4] "p-n junctions on Ga-face GaN by NH₃ molecular beam epitaxy with low ideality factors and low reverse currents," C. A. Hu rn i. et al, Applied Physics Letters Vol. 97, 222113, Nov 2010. [5] S. Chowdhury et al, IEEE EDL, Vol. 29, 2008. 15 [6] S. Chowdhury et al, DRC, South Bend, July 2010. Conclusion This concludes the description of the preferred embodiments of the present invention. The foregoing description of one or more embodiments of the invention has 20 been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto. 25 16 Claims What is claimed is:
Please amend claims 7, 10, 14, 17 and 22 and cancel claim 23 as follows. canceled
canceled
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
Current Aperture Vertical Electron Transistor (CAVET)
Materials described outside the worked examples.
p-type Mg-doped GaN (p-GaN)
GaN:Mg
n-type GaN
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Mg concentration vs. estimated depth through the CAVET structure (FIG. 4(a))
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
CBL leakage current at reverse bias 400V | 140 µA | GaN:Mg |
CBL blocking capacity-current density through CBL at off-state 400V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,590,088Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic illustration of a CAVET 100, including higher/heavily n- type doped Gallium Nitride (n + -GaN) 102, lower or lightly n-type doped GaN (n- …
FIG. 2(i), the CBL 212 and 10 the source 222 are electrically connected 236 such that there is no bias across any part of the source 222 and the CBL 212. The …
FIG. 3 shows a band diagram of a structure wherein a conduction band E, offset and valence band EF o ffset between the CBL and the energy of the electrons and …
FIG. 4(b) plots the current density as a function of Vd s through a p-GaN CBL of a zero aperture CAVET. 5 In addition, the blocking capacity of the p-layer can …
FIG. 5(d) is a graph of the I -V characteristics of the n/p/n structure on the GaN substrate, 20 with the back p/n diode 512 (comprising layers 504 and 502) …
FIG. 6 is a graph of the direct current (DC) I -V characteristics of the CAVET, plotting drain-source current (Ids) as a functi on o f Vds f or a d evice with …
FIG. 7. Pulsed ID S -VD S characteristics, measured with gate pulsed at 80 g s pulse width, showed no current collapse, as shown in
FIG. 8. With decreasing Lgo (the gate-aperture overlap), the leakage current increased due 10 to unmodulated electrons flowing from source through the aperture …
FIG. 9. Process Ste ps
FIG. 10 is a flowchart illustrating a method of fabricating a CAVET according to one or more embodiments of the present invention. DETAILED DESCRIPTION OF THE …
FIG. 30 6.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An active buried Mg-doped GaN layer can be grown in situ without any need of an activation process.
The CAVET of claim 1, wherein the source contact is deposited in a trench through the semiconductor layer and the source contact in the trench contacts the current blocking layer.
The CAVET of claim 1, wherein: the CAVET has a drain-source current of less than 0.5 kA/cm 2 for all drain source voltages in a range of 0-10 Volts, at pinch off, for DC operation, and for the gate pulsed with a 80 microsecond pulse width, and the CAVET's pulsed current voltage characteristic, with the gate pulsed with the 80 microsecond pulse width, is identical to within % of the CAVET's direct current (DC) current voltage characteristic, for a drain-source voltage of 2 volts. -7- G&C 30794.417-US-C₁
The CBL is a homoepitaxial blocking layer.
The CAVET does not need implanted GaN as the CBL. 30 4. The CAVET provides an ability to collect any holes that are generated during the operation of the device, so as to increase device reliability. 14 5. The method/device provides an effective manner to connect the source to the CBL, so that there is no bias across any part of the source and the CBL, preventing electron injection from the source to the drain.
The method/device enables smooth high frequency switching because of 5 the predictable response of the p-type CBL, as compared to CBLs created using implantation to create damage. Another benefit to the present invention is the simplicity in processing of the device. The biggest challenge in a device like the CAVET is the CBL. The most cost- effective CBL is a p-GaN layer grown on top of the n-drift region. When the p-n junction 10 gets reverse biased during device operation, it can hold a very large voltage, which is desirable for the working of the device. The biggest challenge is to get an active buried p-layer as subsequent AlGaN/GaN layers are grown on top to form the 2DEG. However, un der hydrogen ambient at high regrowth temperatures (~ 1 160 0 C), a p-layer is not active. The present invention, on the other hand, ensures a buried active p-GaN layer in 15 the structure, which makes it functional and more effective from a device performance point of view. Nomenclature The terms "(A l InGaN)" "(In,A l)GaN", or "GaN" as used herein (as well as the terms "I II -nitride," "Group-I II nitride", or "nitride," used generally) refer to any alloy composition of the (Ga,Al, I n,B)N semiconductors having the formula Ga AlxInyBzN where 0 w < 1, 0 <x < 1, 0 <y 1,0 <z < 1 and w + x + y + z = 1. These terms are intended to be broadly construed to include respective nitrides of the single species, Ga, Al, In and B, as well as binary, ternary and quaternary compositions 25 of such Group III metal species. Accordingly, it will be appreciated that the discussion of the invention hereinafter in reference to GaN and AlGaN materials is applicable to the formation of various other (Ga,Al, I n,B)N material species. Further, (Ga,Al, I n,B)N materials within the scope of the invention may further include minor quantities of dopants and/or other impurity or inclusional materials. 30 15 References The following references are incorporated by reference herein: [1] S. Chowdhury et al., Presented at EMC 2008, Santa Barbara. [2] Srabanti Chowdhury, Brian L. Swenson and Umesh K. Mishra, 5 "Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN as Current Blocking Layer," IEEE Electron Device Letters, Vol. 29, No. 6, pp. 543-545, June 2008. [3] Srabanti Chowdhury, "AlGaN/GaN CAVETs for high power switching application," Ph.D. thesis, University of California Santa Barbara, December 2010, 10 including the following pages: cover, iii, viii-xiv, and 154-155. [4] "p-n junctions on Ga-face GaN by NH₃ molecular beam epitaxy with low ideality factors and low reverse currents," C. A. Hu rn i. et al, Applied Physics Letters Vol. 97, 222113, Nov 2010. [5] S. Chowdhury et al, IEEE EDL, Vol. 29, 2008. 15 [6] S. Chowdhury et al, DRC, South Bend, July 2010. Conclusion This concludes the description of the preferred embodiments of the present invention. The foregoing description of one or more embodiments of the invention has 20 been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto. 25 16 Claims What is claimed is:
Please amend claims 7, 10, 14, 17 and 22 and cancel claim 23 as follows. canceled
canceled
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
Current Aperture Vertical Electron Transistor (CAVET)
Materials described outside the worked examples.
p-type Mg-doped GaN (p-GaN)
GaN:Mg
n-type GaN
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Mg concentration vs. estimated depth through the CAVET structure (FIG. 4(a))
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
CBL leakage current at reverse bias 400V | 140 µA | GaN:Mg |
CBL blocking capacity-current density through CBL at off-state 400V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,590,088Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic illustration of a CAVET 100, including higher/heavily n- type doped Gallium Nitride (n + -GaN) 102, lower or lightly n-type doped GaN (n- …
FIG. 2(i), the CBL 212 and 10 the source 222 are electrically connected 236 such that there is no bias across any part of the source 222 and the CBL 212. The …
FIG. 3 shows a band diagram of a structure wherein a conduction band E, offset and valence band EF o ffset between the CBL and the energy of the electrons and …
FIG. 4(b) plots the current density as a function of Vd s through a p-GaN CBL of a zero aperture CAVET. 5 In addition, the blocking capacity of the p-layer can …
FIG. 5(d) is a graph of the I -V characteristics of the n/p/n structure on the GaN substrate, 20 with the back p/n diode 512 (comprising layers 504 and 502) …
FIG. 6 is a graph of the direct current (DC) I -V characteristics of the CAVET, plotting drain-source current (Ids) as a functi on o f Vds f or a d evice with …
FIG. 7. Pulsed ID S -VD S characteristics, measured with gate pulsed at 80 g s pulse width, showed no current collapse, as shown in
FIG. 8. With decreasing Lgo (the gate-aperture overlap), the leakage current increased due 10 to unmodulated electrons flowing from source through the aperture …
FIG. 9. Process Ste ps
FIG. 10 is a flowchart illustrating a method of fabricating a CAVET according to one or more embodiments of the present invention. DETAILED DESCRIPTION OF THE …
FIG. 30 6.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An active buried Mg-doped GaN layer can be grown in situ without any need of an activation process.
The CAVET of claim 1, wherein the source contact is deposited in a trench through the semiconductor layer and the source contact in the trench contacts the current blocking layer.
The CAVET of claim 1, wherein: the CAVET has a drain-source current of less than 0.5 kA/cm 2 for all drain source voltages in a range of 0-10 Volts, at pinch off, for DC operation, and for the gate pulsed with a 80 microsecond pulse width, and the CAVET's pulsed current voltage characteristic, with the gate pulsed with the 80 microsecond pulse width, is identical to within % of the CAVET's direct current (DC) current voltage characteristic, for a drain-source voltage of 2 volts. -7- G&C 30794.417-US-C₁
The CBL is a homoepitaxial blocking layer.
The CAVET does not need implanted GaN as the CBL. 30 4. The CAVET provides an ability to collect any holes that are generated during the operation of the device, so as to increase device reliability. 14 5. The method/device provides an effective manner to connect the source to the CBL, so that there is no bias across any part of the source and the CBL, preventing electron injection from the source to the drain.
The method/device enables smooth high frequency switching because of 5 the predictable response of the p-type CBL, as compared to CBLs created using implantation to create damage. Another benefit to the present invention is the simplicity in processing of the device. The biggest challenge in a device like the CAVET is the CBL. The most cost- effective CBL is a p-GaN layer grown on top of the n-drift region. When the p-n junction 10 gets reverse biased during device operation, it can hold a very large voltage, which is desirable for the working of the device. The biggest challenge is to get an active buried p-layer as subsequent AlGaN/GaN layers are grown on top to form the 2DEG. However, un der hydrogen ambient at high regrowth temperatures (~ 1 160 0 C), a p-layer is not active. The present invention, on the other hand, ensures a buried active p-GaN layer in 15 the structure, which makes it functional and more effective from a device performance point of view. Nomenclature The terms "(A l InGaN)" "(In,A l)GaN", or "GaN" as used herein (as well as the terms "I II -nitride," "Group-I II nitride", or "nitride," used generally) refer to any alloy composition of the (Ga,Al, I n,B)N semiconductors having the formula Ga AlxInyBzN where 0 w < 1, 0 <x < 1, 0 <y 1,0 <z < 1 and w + x + y + z = 1. These terms are intended to be broadly construed to include respective nitrides of the single species, Ga, Al, In and B, as well as binary, ternary and quaternary compositions 25 of such Group III metal species. Accordingly, it will be appreciated that the discussion of the invention hereinafter in reference to GaN and AlGaN materials is applicable to the formation of various other (Ga,Al, I n,B)N material species. Further, (Ga,Al, I n,B)N materials within the scope of the invention may further include minor quantities of dopants and/or other impurity or inclusional materials. 30 15 References The following references are incorporated by reference herein: [1] S. Chowdhury et al., Presented at EMC 2008, Santa Barbara. [2] Srabanti Chowdhury, Brian L. Swenson and Umesh K. Mishra, 5 "Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN as Current Blocking Layer," IEEE Electron Device Letters, Vol. 29, No. 6, pp. 543-545, June 2008. [3] Srabanti Chowdhury, "AlGaN/GaN CAVETs for high power switching application," Ph.D. thesis, University of California Santa Barbara, December 2010, 10 including the following pages: cover, iii, viii-xiv, and 154-155. [4] "p-n junctions on Ga-face GaN by NH₃ molecular beam epitaxy with low ideality factors and low reverse currents," C. A. Hu rn i. et al, Applied Physics Letters Vol. 97, 222113, Nov 2010. [5] S. Chowdhury et al, IEEE EDL, Vol. 29, 2008. 15 [6] S. Chowdhury et al, DRC, South Bend, July 2010. Conclusion This concludes the description of the preferred embodiments of the present invention. The foregoing description of one or more embodiments of the invention has 20 been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto. 25 16 Claims What is claimed is:
Please amend claims 7, 10, 14, 17 and 22 and cancel claim 23 as follows. canceled
canceled
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
Current Aperture Vertical Electron Transistor (CAVET)
Materials described outside the worked examples.
p-type Mg-doped GaN (p-GaN)
GaN:Mg
n-type GaN
GaN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Mg concentration vs. estimated depth through the CAVET structure (FIG. 4(a))
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
CBL leakage current at reverse bias 400V | 140 µA | GaN:Mg |
CBL blocking capacity-current density through CBL at off-state 400V |
Related documents with shared materials, methods, properties, or citations.
AlGaN/GaN
(Ga,Al,In,B)N III-nitride alloys
GawAlxInyBzN
| 0.4 A/cm2 |
GaN:Mg |
CAVET pinch-off gate voltage range | — | — |
Thickness | 10–5000 nm | — |
Thickness | 100–500 nm | — |
— | ≤ 1 eV | — |
Voltage | ≤ 1 V | — |
— | ≥ 1 eV | — |
— | ≥ 2 eV | — |
— | ≥ 3 eV | — |
Voltage | ≥ 300 V | — |
Voltage | ≥ 600 V | — |
Thickness | ≥ 10 nm | — |
AlGaN/GaN
(Ga,Al,In,B)N III-nitride alloys
GawAlxInyBzN
| 0.4 A/cm2 |
GaN:Mg |
CAVET pinch-off gate voltage range | — | — |
Thickness | 10–5000 nm | — |
Thickness | 100–500 nm | — |
— | ≤ 1 eV | — |
Voltage | ≤ 1 V | — |
— | ≥ 1 eV | — |
— | ≥ 2 eV | — |
— | ≥ 3 eV | — |
Voltage | ≥ 300 V | — |
Voltage | ≥ 600 V | — |
Thickness | ≥ 10 nm | — |
AlGaN/GaN
(Ga,Al,In,B)N III-nitride alloys
GawAlxInyBzN
| 0.4 A/cm2 |
GaN:Mg |
CAVET pinch-off gate voltage range | — | — |
Thickness | 10–5000 nm | — |
Thickness | 100–500 nm | — |
— | ≤ 1 eV | — |
Voltage | ≤ 1 V | — |
— | ≥ 1 eV | — |
— | ≥ 2 eV | — |
— | ≥ 3 eV | — |
Voltage | ≥ 300 V | — |
Voltage | ≥ 600 V | — |
Thickness | ≥ 10 nm | — |
AlGaN/GaN
(Ga,Al,In,B)N III-nitride alloys
GawAlxInyBzN
| 0.4 A/cm2 |
GaN:Mg |
CAVET pinch-off gate voltage range | — | — |
Thickness | 10–5000 nm | — |
Thickness | 100–500 nm | — |
— | ≤ 1 eV | — |
Voltage | ≤ 1 V | — |
— | ≥ 1 eV | — |
— | ≥ 2 eV | — |
— | ≥ 3 eV | — |
Voltage | ≥ 300 V | — |
Voltage | ≥ 600 V | — |
Thickness | ≥ 10 nm | — |
