Patent
US 11,309,412SHIFTING THE PINCH-OFF VOLTAGE OF AN InP HIGH ELECTRON MOBILITY TRANSISTOR WITH A METAL RING
Xiaobing MEI
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 11,309,412Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top view of a HEMT device including a metal ring;
Figure 2 is a profile view of the HEMT device shown in figure 1; and
Figure 3 is a profile view of the metal ring in the HEMT device.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal rin g includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Currently amended
The semiconductor device according to claim 1 wherein the metal ring is a closed metal ring. Original
The semiconductor device according to claim 1 wherein the metal ring is a rectangular shaped ring. Original
The semiconductor device according to claim 1 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the at least one contact layer is formed, said metal ring being formed around the mesa. Previously presented
The semiconductor device according to claim 1 wherein the substrate is an InP substrate and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
The semiconductor device according to claim 1 wherein the at least one gate terminal is four gate terminals. Original
Canceled
The semiconductor device according to claim [[4]] 1 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Currently amended
Canceled
Canceled
A high electron mobility transistor (HEMT) device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 13 wherein the metal ring is a closed metal ring. Original
The HEMT device according to claim 13 wherein the electrode portion is fabricated at the same time as the at least one gate terminal and the ohmic portion is fabricated at the same time as the source and drain terminals. Original
The HEMT device according to claim 13 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Previously presented
The HEMT device according to claim 13 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the source, drain and gate terminals are formed, said metal ring being formed around the mesa. Previously presented
The HEMT device according to claim 13 wherein the HEMT device is an InP device. Original
The HEMT device according to claim 13 wherein the substrate is an InP substrate, and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the first InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
A high electron mobility transistor (HEMT) device comprising: an InP substrate; a plurality of semiconductor layers provided on the substrate including an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the spacer layer, the barrier layer and the contact layers define a mesa; a source terminal, a drain terminal and at least one gate terminal formed on the mesa; and a closed metal ring formed on the buffer layer and around the mesa, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 20 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. New
The HEMT device according to claim 20 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. New
The HEMT device according to claim 20 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with metal ring
Materials described outside the worked examples.
metal ring
titanium
Ti
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,309,412Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top view of a HEMT device including a metal ring;
Figure 2 is a profile view of the HEMT device shown in figure 1; and
Figure 3 is a profile view of the metal ring in the HEMT device.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal rin g includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Currently amended
The semiconductor device according to claim 1 wherein the metal ring is a closed metal ring. Original
The semiconductor device according to claim 1 wherein the metal ring is a rectangular shaped ring. Original
The semiconductor device according to claim 1 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the at least one contact layer is formed, said metal ring being formed around the mesa. Previously presented
The semiconductor device according to claim 1 wherein the substrate is an InP substrate and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
The semiconductor device according to claim 1 wherein the at least one gate terminal is four gate terminals. Original
Canceled
The semiconductor device according to claim [[4]] 1 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Currently amended
Canceled
Canceled
A high electron mobility transistor (HEMT) device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 13 wherein the metal ring is a closed metal ring. Original
The HEMT device according to claim 13 wherein the electrode portion is fabricated at the same time as the at least one gate terminal and the ohmic portion is fabricated at the same time as the source and drain terminals. Original
The HEMT device according to claim 13 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Previously presented
The HEMT device according to claim 13 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the source, drain and gate terminals are formed, said metal ring being formed around the mesa. Previously presented
The HEMT device according to claim 13 wherein the HEMT device is an InP device. Original
The HEMT device according to claim 13 wherein the substrate is an InP substrate, and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the first InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
A high electron mobility transistor (HEMT) device comprising: an InP substrate; a plurality of semiconductor layers provided on the substrate including an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the spacer layer, the barrier layer and the contact layers define a mesa; a source terminal, a drain terminal and at least one gate terminal formed on the mesa; and a closed metal ring formed on the buffer layer and around the mesa, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 20 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. New
The HEMT device according to claim 20 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. New
The HEMT device according to claim 20 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with metal ring
Materials described outside the worked examples.
metal ring
titanium
Ti
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,309,412Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top view of a HEMT device including a metal ring;
Figure 2 is a profile view of the HEMT device shown in figure 1; and
Figure 3 is a profile view of the metal ring in the HEMT device.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal rin g includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Currently amended
The semiconductor device according to claim 1 wherein the metal ring is a closed metal ring. Original
The semiconductor device according to claim 1 wherein the metal ring is a rectangular shaped ring. Original
The semiconductor device according to claim 1 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the at least one contact layer is formed, said metal ring being formed around the mesa. Previously presented
The semiconductor device according to claim 1 wherein the substrate is an InP substrate and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
The semiconductor device according to claim 1 wherein the at least one gate terminal is four gate terminals. Original
Canceled
The semiconductor device according to claim [[4]] 1 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Currently amended
Canceled
Canceled
A high electron mobility transistor (HEMT) device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 13 wherein the metal ring is a closed metal ring. Original
The HEMT device according to claim 13 wherein the electrode portion is fabricated at the same time as the at least one gate terminal and the ohmic portion is fabricated at the same time as the source and drain terminals. Original
The HEMT device according to claim 13 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Previously presented
The HEMT device according to claim 13 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the source, drain and gate terminals are formed, said metal ring being formed around the mesa. Previously presented
The HEMT device according to claim 13 wherein the HEMT device is an InP device. Original
The HEMT device according to claim 13 wherein the substrate is an InP substrate, and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the first InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
A high electron mobility transistor (HEMT) device comprising: an InP substrate; a plurality of semiconductor layers provided on the substrate including an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the spacer layer, the barrier layer and the contact layers define a mesa; a source terminal, a drain terminal and at least one gate terminal formed on the mesa; and a closed metal ring formed on the buffer layer and around the mesa, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 20 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. New
The HEMT device according to claim 20 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. New
The HEMT device according to claim 20 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with metal ring
Materials described outside the worked examples.
metal ring
titanium
Ti
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,309,412Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top view of a HEMT device including a metal ring;
Figure 2 is a profile view of the HEMT device shown in figure 1; and
Figure 3 is a profile view of the metal ring in the HEMT device.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal rin g includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Currently amended
The semiconductor device according to claim 1 wherein the metal ring is a closed metal ring. Original
The semiconductor device according to claim 1 wherein the metal ring is a rectangular shaped ring. Original
The semiconductor device according to claim 1 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the at least one contact layer is formed, said metal ring being formed around the mesa. Previously presented
The semiconductor device according to claim 1 wherein the substrate is an InP substrate and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
The semiconductor device according to claim 1 wherein the at least one gate terminal is four gate terminals. Original
Canceled
The semiconductor device according to claim [[4]] 1 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. Currently amended
The semiconductor device according to claim [[4]] 1 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Currently amended
Canceled
Canceled
A high electron mobility transistor (HEMT) device comprising: a substrate; a plurality of semiconductor layers provided on the substrate, said plurality of semiconductor layers including a buffer layer; at least one contact layer provided on the semiconductor layers; a source terminal and a drain terminal formed on the at least one contact layer; at least one gate terminal formed on one of the plurality of semiconductor layers other than the buffer layer; and a metal ring formed on the buffer layer at a location so that the source terminal, the drain terminal and the at least one gate terminal are within an outer circumference defined by the metal ring, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 13 wherein the metal ring is a closed metal ring. Original
The HEMT device according to claim 13 wherein the electrode portion is fabricated at the same time as the at least one gate terminal and the ohmic portion is fabricated at the same time as the source and drain terminals. Original
The HEMT device according to claim 13 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. Previously presented
The HEMT device according to claim 13 wherein some of the plurality of semiconductor layers define a mesa provided on the buffer layer on which the source, drain and gate terminals are formed, said metal ring being formed around the mesa. Previously presented
The HEMT device according to claim 13 wherein the HEMT device is an InP device. Original
The HEMT device according to claim 13 wherein the substrate is an InP substrate, and the plurality of semiconductor layers include an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the first InA I As contact layer, wherein the source terminal and the drain terminal are formed on the InGaAs contact layer and the at least one gate terminal is formed in a recess through the InA I As and InGaAs contact layers to be in contact with the barrier layer. Previously presented
A high electron mobility transistor (HEMT) device comprising: an InP substrate; a plurality of semiconductor layers provided on the substrate including an InA I As buffer layer formed on the substrate, an InGaAs channel layer formed on the buffer layer, an InA I As spacer layer formed on the channel layer, an InA I As barrier layer formed on the spacer layer, an InA I As contact layer formed on the barrier layer, and an InGaAs contact layer formed on the InA I As contact layer, wherein the spacer layer, the barrier layer and the contact layers define a mesa; a source terminal, a drain terminal and at least one gate terminal formed on the mesa; and a closed metal ring formed on the buffer layer and around the mesa, wherein the metal ring includes an ohmic portion and an electrode portion, said metal ring operating to shift a pinch-off voltage of the device. Previously presented
The HEMT device according to claim 20 wherein the electrode portion is fabricated at the same time as the at least one gate terminal. New
The HEMT device according to claim 20 wherein the ohmic portion is fabricated at the same time as the source and drain terminals. New
The HEMT device according to claim 20 wherein the ohmic portion includes a lower titanium layer, a middle platinum layer and an upper gold layer, and the electrode portion includes a titanium layer formed on the upper gold layer of the ohmic portion, a platinum layer formed on the titanium layer of the electrode portion and a gold layer formed on the platinum layer of the electrode portion. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with metal ring
Materials described outside the worked examples.
metal ring
titanium
Ti
Related documents with shared materials, methods, properties, or citations.
HEMT device with metal ring
InP HEMT device with closed metal ring around mesa
HEMT device 10 (described embodiment)
platinum
Pt
gold
Au
InP
InAlAs
InGaAs
silicon-doped InAlAs contact layer
HEMT device with metal ring
InP HEMT device with closed metal ring around mesa
HEMT device 10 (described embodiment)
platinum
Pt
gold
Au
InP
InAlAs
InGaAs
silicon-doped InAlAs contact layer
HEMT device with metal ring
InP HEMT device with closed metal ring around mesa
HEMT device 10 (described embodiment)
platinum
Pt
gold
Au
InP
InAlAs
InGaAs
silicon-doped InAlAs contact layer
HEMT device with metal ring
InP HEMT device with closed metal ring around mesa
HEMT device 10 (described embodiment)
platinum
Pt
gold
Au
InP
InAlAs
InGaAs
silicon-doped InAlAs contact layer