Patent
US 9,012,939N-TYPE GALLIUM-NITRIDE LAYER HAVING MULTIPLE CONDUCTIVE INTERVENING LAYERS
Zhen Chen, Yi Fu
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,012,939Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram of a white LED assembly in accordance with one novel aspect. [0021]
FIG. 2 is a top-down diagram of the white LED assembly of
FIG. 3 is simplified and expanded cross-sectional diagram of the white LED assembly of
FIG. 4 is a top-down diagram of the blue LED device of the white LED assembly of
FIG. 5 is a cross-sectional diagram of a portion of the blue LED device of the white LED assembly of
FIGS. 6-18, except that all LRL 4 is removed and some of the n-type layer 5 is removed in the removal step illustrated in
FIG. 7 is a diagram that illustrates a step in a method of manufacturing where current blocking structures are added to the structure of
FIG. 8 is a diagram that illustrates a step in the method of manufacturing where a highly reflective layer is added to the structure of
FIG. 9 is a diagram that illustrates a step in the method of manufacturing where an encapsulation layer is formed over the structure of
FIG. 10 is a diagram that illustrates a step in the method of manufacturing where bond metal is added to the structure of
FIG. 11 is a diagram that illustrates a step in the method of manufacturing where a carrier wafer structure is wafer bonded to the structure of
FIG. 12 is a graph that shows the temperature cycle of the thermal compressing wafer bonding process used. [0032]
FIG. 13 is a diagram that illustrates a step in the method of manufacturing where the wafer bonded structure is flipped. [0033]
FIG. 14 is a diagram that illustrates a step in the method of manufacturing where the silicon substrate, the buffer layer, and the template layer are removed …
FIG. 15 is a top-down diagram of the wafer bonded structure after the removal step of
FIG. 16 is a cross-sectional diagram of
FIG. 17 is a diagram that illustrates a step in the method of manufacturing where the surface of the LRL is roughened. [0037]
FIG. 18 is a diagram that illustrates a step in the method of manufacturing where electrodes are added to the structure of
FIGS. 19A and 19B together are a table that sets forth details about each of the steps in the method of manufacturing of
FIG. 20 is a cross-sectional diagram of a blue LED device 100 that is formed by the method of manufacture set forth above in connection with
FIG. 21 is a cross-sectional diagram of a blue LED device 200 that is formed by the method of manufacture set forth above in connection with
FIG. 22 is a flowchart of a method in accordance with a first novel aspect. [0042]
FIG. 23 is a flowchart of a method in accordance with a second novel aspect. [0043]
FIG. 24 is a flowchart of a method in accordance with a third novel aspect. [0044]
FIG. 25 is a flowchart of a method in accordance with a fourth novel aspect.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A Light Emitting Diode (LED) device for emitting non- monochromatic light, the LED device comprising: an n-type layer that comprises a plurality of periods including a plurality of gallium-nitride (GaN) subla y ers and a plurality of aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening subla y ers, each of the A l GaN:Si intervening subla y ers sandwiched b y the gallium-nitride (GaN) sublayers, the gallium-nitride (GaN) sublayers located at top and bottom of the period, respectivel y, SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.2.svg 0.44 5.86 Black and white a p-type layer; an active layer disposed between the n-type layer and the p-type layer, wherein the active layer includes an amount of indium; a conductive carrier; a first electrode; and a second electrode adapted to conduct a current, wherein the cu rr ent flows from the SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.3.svg 0.15 6.18 Black and white layer, through the n-type layer, and to the first electrode thereby causing the non-monochromatic light to be emitted.
The LED device of claim 9, wherein the n-type layer has a thickness of at least two thousand nanometers.
The LED device of claim 9, wherein each GaN sublayer has a thickness of less than one thousand nanometers, and wherein each A l GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers.
The LED device of claim 9, wherein the A l GaN:Si intervening sublayers are conductive, and wherein the A l GaN:Si intervening sublayers have a silicon concentration greater than 1x10ig atoms/cm 3.
The LED device of claim 9, wherein the n-type layer has a roughened surface.
The LED device of claim 9, further comprising: a eutectic bond metal layer disposed between the conductive carrier and the p-type layer.
The LED device of claim 9, wherein each of the GaN sublayers has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers.
The LED device of claim 9, wherein the cu rr conductive carrier, through the p-type layer, through and to the first electrode thereby causing the 081912/000028-6098627 v 1 ent flows from the second electrode, through the active layer, through the n-type layer, non-monochromatic light to be emitted. 5 \\DC -
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes a gallium-nitride (GaN) sublayer and an aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers, wherein each Al GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers, wherein each A l GaN:Si intervening sublayer has a silicon concentration greater than 1x10 atoms/cm 3, and wherein the n-type layer has a thickness of at least two thousand nanometers; a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer causes the LED device to emit light.
The LED device of claim 15, further comprising: a carrier; and a layer of bond metal disposed between the p-type layer and the carrier.
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes: a gallium-nitride (GaN) sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers; and SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.4.svg 0.44 5.94 Black and white a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer passes through the means compressive strain lay er of each period of the n-type layer and causes the LED device to emit light.
The LED device of claim 18, wherein the me-ans-is for SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.5.svg 0.15 4.79 Black and white
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based blue LED
Materials described outside the worked examples.
gallium nitride (n-type sublayer)
GaN
aluminum-gallium-nitride doped with silicon
AlGaN:Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
n-type layer minimum thickness | 2000 nm | GaN |
GaN sublayer thickness upper bound |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,012,939Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram of a white LED assembly in accordance with one novel aspect. [0021]
FIG. 2 is a top-down diagram of the white LED assembly of
FIG. 3 is simplified and expanded cross-sectional diagram of the white LED assembly of
FIG. 4 is a top-down diagram of the blue LED device of the white LED assembly of
FIG. 5 is a cross-sectional diagram of a portion of the blue LED device of the white LED assembly of
FIGS. 6-18, except that all LRL 4 is removed and some of the n-type layer 5 is removed in the removal step illustrated in
FIG. 7 is a diagram that illustrates a step in a method of manufacturing where current blocking structures are added to the structure of
FIG. 8 is a diagram that illustrates a step in the method of manufacturing where a highly reflective layer is added to the structure of
FIG. 9 is a diagram that illustrates a step in the method of manufacturing where an encapsulation layer is formed over the structure of
FIG. 10 is a diagram that illustrates a step in the method of manufacturing where bond metal is added to the structure of
FIG. 11 is a diagram that illustrates a step in the method of manufacturing where a carrier wafer structure is wafer bonded to the structure of
FIG. 12 is a graph that shows the temperature cycle of the thermal compressing wafer bonding process used. [0032]
FIG. 13 is a diagram that illustrates a step in the method of manufacturing where the wafer bonded structure is flipped. [0033]
FIG. 14 is a diagram that illustrates a step in the method of manufacturing where the silicon substrate, the buffer layer, and the template layer are removed …
FIG. 15 is a top-down diagram of the wafer bonded structure after the removal step of
FIG. 16 is a cross-sectional diagram of
FIG. 17 is a diagram that illustrates a step in the method of manufacturing where the surface of the LRL is roughened. [0037]
FIG. 18 is a diagram that illustrates a step in the method of manufacturing where electrodes are added to the structure of
FIGS. 19A and 19B together are a table that sets forth details about each of the steps in the method of manufacturing of
FIG. 20 is a cross-sectional diagram of a blue LED device 100 that is formed by the method of manufacture set forth above in connection with
FIG. 21 is a cross-sectional diagram of a blue LED device 200 that is formed by the method of manufacture set forth above in connection with
FIG. 22 is a flowchart of a method in accordance with a first novel aspect. [0042]
FIG. 23 is a flowchart of a method in accordance with a second novel aspect. [0043]
FIG. 24 is a flowchart of a method in accordance with a third novel aspect. [0044]
FIG. 25 is a flowchart of a method in accordance with a fourth novel aspect.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A Light Emitting Diode (LED) device for emitting non- monochromatic light, the LED device comprising: an n-type layer that comprises a plurality of periods including a plurality of gallium-nitride (GaN) subla y ers and a plurality of aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening subla y ers, each of the A l GaN:Si intervening subla y ers sandwiched b y the gallium-nitride (GaN) sublayers, the gallium-nitride (GaN) sublayers located at top and bottom of the period, respectivel y, SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.2.svg 0.44 5.86 Black and white a p-type layer; an active layer disposed between the n-type layer and the p-type layer, wherein the active layer includes an amount of indium; a conductive carrier; a first electrode; and a second electrode adapted to conduct a current, wherein the cu rr ent flows from the SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.3.svg 0.15 6.18 Black and white layer, through the n-type layer, and to the first electrode thereby causing the non-monochromatic light to be emitted.
The LED device of claim 9, wherein the n-type layer has a thickness of at least two thousand nanometers.
The LED device of claim 9, wherein each GaN sublayer has a thickness of less than one thousand nanometers, and wherein each A l GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers.
The LED device of claim 9, wherein the A l GaN:Si intervening sublayers are conductive, and wherein the A l GaN:Si intervening sublayers have a silicon concentration greater than 1x10ig atoms/cm 3.
The LED device of claim 9, wherein the n-type layer has a roughened surface.
The LED device of claim 9, further comprising: a eutectic bond metal layer disposed between the conductive carrier and the p-type layer.
The LED device of claim 9, wherein each of the GaN sublayers has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers.
The LED device of claim 9, wherein the cu rr conductive carrier, through the p-type layer, through and to the first electrode thereby causing the 081912/000028-6098627 v 1 ent flows from the second electrode, through the active layer, through the n-type layer, non-monochromatic light to be emitted. 5 \\DC -
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes a gallium-nitride (GaN) sublayer and an aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers, wherein each Al GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers, wherein each A l GaN:Si intervening sublayer has a silicon concentration greater than 1x10 atoms/cm 3, and wherein the n-type layer has a thickness of at least two thousand nanometers; a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer causes the LED device to emit light.
The LED device of claim 15, further comprising: a carrier; and a layer of bond metal disposed between the p-type layer and the carrier.
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes: a gallium-nitride (GaN) sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers; and SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.4.svg 0.44 5.94 Black and white a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer passes through the means compressive strain lay er of each period of the n-type layer and causes the LED device to emit light.
The LED device of claim 18, wherein the me-ans-is for SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.5.svg 0.15 4.79 Black and white
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based blue LED
Materials described outside the worked examples.
gallium nitride (n-type sublayer)
GaN
aluminum-gallium-nitride doped with silicon
AlGaN:Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
n-type layer minimum thickness | 2000 nm | GaN |
GaN sublayer thickness upper bound |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,012,939Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram of a white LED assembly in accordance with one novel aspect. [0021]
FIG. 2 is a top-down diagram of the white LED assembly of
FIG. 3 is simplified and expanded cross-sectional diagram of the white LED assembly of
FIG. 4 is a top-down diagram of the blue LED device of the white LED assembly of
FIG. 5 is a cross-sectional diagram of a portion of the blue LED device of the white LED assembly of
FIGS. 6-18, except that all LRL 4 is removed and some of the n-type layer 5 is removed in the removal step illustrated in
FIG. 7 is a diagram that illustrates a step in a method of manufacturing where current blocking structures are added to the structure of
FIG. 8 is a diagram that illustrates a step in the method of manufacturing where a highly reflective layer is added to the structure of
FIG. 9 is a diagram that illustrates a step in the method of manufacturing where an encapsulation layer is formed over the structure of
FIG. 10 is a diagram that illustrates a step in the method of manufacturing where bond metal is added to the structure of
FIG. 11 is a diagram that illustrates a step in the method of manufacturing where a carrier wafer structure is wafer bonded to the structure of
FIG. 12 is a graph that shows the temperature cycle of the thermal compressing wafer bonding process used. [0032]
FIG. 13 is a diagram that illustrates a step in the method of manufacturing where the wafer bonded structure is flipped. [0033]
FIG. 14 is a diagram that illustrates a step in the method of manufacturing where the silicon substrate, the buffer layer, and the template layer are removed …
FIG. 15 is a top-down diagram of the wafer bonded structure after the removal step of
FIG. 16 is a cross-sectional diagram of
FIG. 17 is a diagram that illustrates a step in the method of manufacturing where the surface of the LRL is roughened. [0037]
FIG. 18 is a diagram that illustrates a step in the method of manufacturing where electrodes are added to the structure of
FIGS. 19A and 19B together are a table that sets forth details about each of the steps in the method of manufacturing of
FIG. 20 is a cross-sectional diagram of a blue LED device 100 that is formed by the method of manufacture set forth above in connection with
FIG. 21 is a cross-sectional diagram of a blue LED device 200 that is formed by the method of manufacture set forth above in connection with
FIG. 22 is a flowchart of a method in accordance with a first novel aspect. [0042]
FIG. 23 is a flowchart of a method in accordance with a second novel aspect. [0043]
FIG. 24 is a flowchart of a method in accordance with a third novel aspect. [0044]
FIG. 25 is a flowchart of a method in accordance with a fourth novel aspect.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A Light Emitting Diode (LED) device for emitting non- monochromatic light, the LED device comprising: an n-type layer that comprises a plurality of periods including a plurality of gallium-nitride (GaN) subla y ers and a plurality of aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening subla y ers, each of the A l GaN:Si intervening subla y ers sandwiched b y the gallium-nitride (GaN) sublayers, the gallium-nitride (GaN) sublayers located at top and bottom of the period, respectivel y, SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.2.svg 0.44 5.86 Black and white a p-type layer; an active layer disposed between the n-type layer and the p-type layer, wherein the active layer includes an amount of indium; a conductive carrier; a first electrode; and a second electrode adapted to conduct a current, wherein the cu rr ent flows from the SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.3.svg 0.15 6.18 Black and white layer, through the n-type layer, and to the first electrode thereby causing the non-monochromatic light to be emitted.
The LED device of claim 9, wherein the n-type layer has a thickness of at least two thousand nanometers.
The LED device of claim 9, wherein each GaN sublayer has a thickness of less than one thousand nanometers, and wherein each A l GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers.
The LED device of claim 9, wherein the A l GaN:Si intervening sublayers are conductive, and wherein the A l GaN:Si intervening sublayers have a silicon concentration greater than 1x10ig atoms/cm 3.
The LED device of claim 9, wherein the n-type layer has a roughened surface.
The LED device of claim 9, further comprising: a eutectic bond metal layer disposed between the conductive carrier and the p-type layer.
The LED device of claim 9, wherein each of the GaN sublayers has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers.
The LED device of claim 9, wherein the cu rr conductive carrier, through the p-type layer, through and to the first electrode thereby causing the 081912/000028-6098627 v 1 ent flows from the second electrode, through the active layer, through the n-type layer, non-monochromatic light to be emitted. 5 \\DC -
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes a gallium-nitride (GaN) sublayer and an aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers, wherein each Al GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers, wherein each A l GaN:Si intervening sublayer has a silicon concentration greater than 1x10 atoms/cm 3, and wherein the n-type layer has a thickness of at least two thousand nanometers; a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer causes the LED device to emit light.
The LED device of claim 15, further comprising: a carrier; and a layer of bond metal disposed between the p-type layer and the carrier.
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes: a gallium-nitride (GaN) sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers; and SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.4.svg 0.44 5.94 Black and white a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer passes through the means compressive strain lay er of each period of the n-type layer and causes the LED device to emit light.
The LED device of claim 18, wherein the me-ans-is for SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.5.svg 0.15 4.79 Black and white
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based blue LED
Materials described outside the worked examples.
gallium nitride (n-type sublayer)
GaN
aluminum-gallium-nitride doped with silicon
AlGaN:Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
n-type layer minimum thickness | 2000 nm | GaN |
GaN sublayer thickness upper bound |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,012,939Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional diagram of a white LED assembly in accordance with one novel aspect. [0021]
FIG. 2 is a top-down diagram of the white LED assembly of
FIG. 3 is simplified and expanded cross-sectional diagram of the white LED assembly of
FIG. 4 is a top-down diagram of the blue LED device of the white LED assembly of
FIG. 5 is a cross-sectional diagram of a portion of the blue LED device of the white LED assembly of
FIGS. 6-18, except that all LRL 4 is removed and some of the n-type layer 5 is removed in the removal step illustrated in
FIG. 7 is a diagram that illustrates a step in a method of manufacturing where current blocking structures are added to the structure of
FIG. 8 is a diagram that illustrates a step in the method of manufacturing where a highly reflective layer is added to the structure of
FIG. 9 is a diagram that illustrates a step in the method of manufacturing where an encapsulation layer is formed over the structure of
FIG. 10 is a diagram that illustrates a step in the method of manufacturing where bond metal is added to the structure of
FIG. 11 is a diagram that illustrates a step in the method of manufacturing where a carrier wafer structure is wafer bonded to the structure of
FIG. 12 is a graph that shows the temperature cycle of the thermal compressing wafer bonding process used. [0032]
FIG. 13 is a diagram that illustrates a step in the method of manufacturing where the wafer bonded structure is flipped. [0033]
FIG. 14 is a diagram that illustrates a step in the method of manufacturing where the silicon substrate, the buffer layer, and the template layer are removed …
FIG. 15 is a top-down diagram of the wafer bonded structure after the removal step of
FIG. 16 is a cross-sectional diagram of
FIG. 17 is a diagram that illustrates a step in the method of manufacturing where the surface of the LRL is roughened. [0037]
FIG. 18 is a diagram that illustrates a step in the method of manufacturing where electrodes are added to the structure of
FIGS. 19A and 19B together are a table that sets forth details about each of the steps in the method of manufacturing of
FIG. 20 is a cross-sectional diagram of a blue LED device 100 that is formed by the method of manufacture set forth above in connection with
FIG. 21 is a cross-sectional diagram of a blue LED device 200 that is formed by the method of manufacture set forth above in connection with
FIG. 22 is a flowchart of a method in accordance with a first novel aspect. [0042]
FIG. 23 is a flowchart of a method in accordance with a second novel aspect. [0043]
FIG. 24 is a flowchart of a method in accordance with a third novel aspect. [0044]
FIG. 25 is a flowchart of a method in accordance with a fourth novel aspect.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A Light Emitting Diode (LED) device for emitting non- monochromatic light, the LED device comprising: an n-type layer that comprises a plurality of periods including a plurality of gallium-nitride (GaN) subla y ers and a plurality of aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening subla y ers, each of the A l GaN:Si intervening subla y ers sandwiched b y the gallium-nitride (GaN) sublayers, the gallium-nitride (GaN) sublayers located at top and bottom of the period, respectivel y, SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.2.svg 0.44 5.86 Black and white a p-type layer; an active layer disposed between the n-type layer and the p-type layer, wherein the active layer includes an amount of indium; a conductive carrier; a first electrode; and a second electrode adapted to conduct a current, wherein the cu rr ent flows from the SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.3.svg 0.15 6.18 Black and white layer, through the n-type layer, and to the first electrode thereby causing the non-monochromatic light to be emitted.
The LED device of claim 9, wherein the n-type layer has a thickness of at least two thousand nanometers.
The LED device of claim 9, wherein each GaN sublayer has a thickness of less than one thousand nanometers, and wherein each A l GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers.
The LED device of claim 9, wherein the A l GaN:Si intervening sublayers are conductive, and wherein the A l GaN:Si intervening sublayers have a silicon concentration greater than 1x10ig atoms/cm 3.
The LED device of claim 9, wherein the n-type layer has a roughened surface.
The LED device of claim 9, further comprising: a eutectic bond metal layer disposed between the conductive carrier and the p-type layer.
The LED device of claim 9, wherein each of the GaN sublayers has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers.
The LED device of claim 9, wherein the cu rr conductive carrier, through the p-type layer, through and to the first electrode thereby causing the 081912/000028-6098627 v 1 ent flows from the second electrode, through the active layer, through the n-type layer, non-monochromatic light to be emitted. 5 \\DC -
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes a gallium-nitride (GaN) sublayer and an aluminum-gallium-nitride doped with silicon (Al GaN:Si) intervening sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers, wherein each Al GaN:Si intervening sublayer has a thickness of less than twenty-five nanometers, wherein each A l GaN:Si intervening sublayer has a silicon concentration greater than 1x10 atoms/cm 3, and wherein the n-type layer has a thickness of at least two thousand nanometers; a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer causes the LED device to emit light.
The LED device of claim 15, further comprising: a carrier; and a layer of bond metal disposed between the p-type layer and the carrier.
A Light Emitting Diode (LED) device comprising: an n-type layer comprising a plurality of periods, wherein each period of the n-type layer includes: a gallium-nitride (GaN) sublayer, wherein each GaN sublayer has a thickness that is substantially greater than one hundred nanometers and is less than one thousand nanometers; and SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.4.svg 0.44 5.94 Black and white a p-type layer; and an active layer disposed between the n-type layer and the p-type layer, wherein cu rr ent flow between the p-type layer and the n-type layer passes through the means compressive strain lay er of each period of the n-type layer and causes the LED device to emit light.
The LED device of claim 18, wherein the me-ans-is for SVG 13196828.10-10-2014.I₁₄₀WFT₄PXXIFW3.CLM.5.svg 0.15 4.79 Black and white
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based blue LED
Materials described outside the worked examples.
gallium nitride (n-type sublayer)
GaN
aluminum-gallium-nitride doped with silicon
AlGaN:Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
n-type layer minimum thickness | 2000 nm | GaN |
GaN sublayer thickness upper bound |
Related documents with shared materials, methods, properties, or citations.
indium-containing active layer
eutectic bond metal layer
undoped aluminum-gallium-nitride (LRL sublayer)
AlGaN
silicon substrate
Si
| 1000 nm |
GaN |
GaN sublayer thickness lower bound | 100 nm | GaN |
AlGaN:Si intervening sublayer thickness upper bound | 25 nm | AlGaN:Si |
AlGaN:Si intervening sublayer silicon concentration lower bound | 1e19 atoms/cm3 | AlGaN:Si |
Blue LED emission wavelength range | — | indium-containing active layer |
n-type layer sheet resistance lower bound | 15 ohm/sq | GaN |
Thickness | 35–250 um | — |
Thickness | 440–490 nm | — |
— | 3.4–6.2 eV | — |
Thickness | 0.2–1.5 mm | — |
Thickness | 0.5–3 mm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 300 nm | — |
Thickness | ≤ 2000 nm | — |
Thickness | ≤ 25 nm | — |
Thickness | ≤ 200 nm | — |
Thickness | ≥ 50 nm | — |
Temperature | ≥ 280 °C | — |
Thickness | ≥ 2000 nm | — |
indium-containing active layer
eutectic bond metal layer
undoped aluminum-gallium-nitride (LRL sublayer)
AlGaN
silicon substrate
Si
| 1000 nm |
GaN |
GaN sublayer thickness lower bound | 100 nm | GaN |
AlGaN:Si intervening sublayer thickness upper bound | 25 nm | AlGaN:Si |
AlGaN:Si intervening sublayer silicon concentration lower bound | 1e19 atoms/cm3 | AlGaN:Si |
Blue LED emission wavelength range | — | indium-containing active layer |
n-type layer sheet resistance lower bound | 15 ohm/sq | GaN |
Thickness | 35–250 um | — |
Thickness | 440–490 nm | — |
— | 3.4–6.2 eV | — |
Thickness | 0.2–1.5 mm | — |
Thickness | 0.5–3 mm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 300 nm | — |
Thickness | ≤ 2000 nm | — |
Thickness | ≤ 25 nm | — |
Thickness | ≤ 200 nm | — |
Thickness | ≥ 50 nm | — |
Temperature | ≥ 280 °C | — |
Thickness | ≥ 2000 nm | — |
indium-containing active layer
eutectic bond metal layer
undoped aluminum-gallium-nitride (LRL sublayer)
AlGaN
silicon substrate
Si
| 1000 nm |
GaN |
GaN sublayer thickness lower bound | 100 nm | GaN |
AlGaN:Si intervening sublayer thickness upper bound | 25 nm | AlGaN:Si |
AlGaN:Si intervening sublayer silicon concentration lower bound | 1e19 atoms/cm3 | AlGaN:Si |
Blue LED emission wavelength range | — | indium-containing active layer |
n-type layer sheet resistance lower bound | 15 ohm/sq | GaN |
Thickness | 35–250 um | — |
Thickness | 440–490 nm | — |
— | 3.4–6.2 eV | — |
Thickness | 0.2–1.5 mm | — |
Thickness | 0.5–3 mm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 300 nm | — |
Thickness | ≤ 2000 nm | — |
Thickness | ≤ 25 nm | — |
Thickness | ≤ 200 nm | — |
Thickness | ≥ 50 nm | — |
Temperature | ≥ 280 °C | — |
Thickness | ≥ 2000 nm | — |
indium-containing active layer
eutectic bond metal layer
undoped aluminum-gallium-nitride (LRL sublayer)
AlGaN
silicon substrate
Si
| 1000 nm |
GaN |
GaN sublayer thickness lower bound | 100 nm | GaN |
AlGaN:Si intervening sublayer thickness upper bound | 25 nm | AlGaN:Si |
AlGaN:Si intervening sublayer silicon concentration lower bound | 1e19 atoms/cm3 | AlGaN:Si |
Blue LED emission wavelength range | — | indium-containing active layer |
n-type layer sheet resistance lower bound | 15 ohm/sq | GaN |
Thickness | 35–250 um | — |
Thickness | 440–490 nm | — |
— | 3.4–6.2 eV | — |
Thickness | 0.2–1.5 mm | — |
Thickness | 0.5–3 mm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 300 nm | — |
Thickness | ≤ 2000 nm | — |
Thickness | ≤ 25 nm | — |
Thickness | ≤ 200 nm | — |
Thickness | ≥ 50 nm | — |
Temperature | ≥ 280 °C | — |
Thickness | ≥ 2000 nm | — |