HIGH-QUALITY GAN HIGH-VOLTAGE HFETS ON SILICON

Jamal Ramdani

Patent

Atlas literature

Patent

US 9,437,688

HIGH-QUALITY GAN HIGH-VOLTAGE HFETS ON SILICON

Jamal Ramdani, John P. Edwards, Linlin Liu

Drawings

Patent drawings and their descriptions. Click a drawing to enlarge it.

FIG. 1

FIG. 1 illustrates an example silicon wafer with exposed surfaces along the < 1 11 > crystal orientation for use in fabricating a GaN substrate in accordance …

FIG. 2

FIG. 2, which illustrates a substrate 200 after a stage during the fabrication of a GaN substrate, an aluminum oxide (A 1 203) ﬁlm 202 interfaces with top …

FIG. 3

FIG. 3, which illustrates a substrate 300 after a stage during the fabrication of a GaN substrate, an amorphous ﬁlm 302 is formed between wafer 100 and A 1 203 …

FIG. 4

FIG. 4 illustrates a substrate at yet another stage of fabrication of a GaN substrate after a GaN ﬁlm has been grown on top of an A l N ﬁlm in accordance with …

FIG. 5

FIG. 5 illustrates a substrate at still another stage of fabrication of a GaN substrate after several more interleaved layers of GaN and A l N ﬁlms have been …

FIG. 6

FIG. 6 is a ﬂowchart for an example process of fabricating a GaN substrate that may be suitable for forming transistors and other devices in accordance with an …

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

2 independent · 5 dependent

1
IndependentSiAl₂O₃GaNAlNGaN HFET (heterostructure field effect transistor)
A GaN HFET, comprising: a silicon substrate; an A 1 203 layer above the silicon substrate, the A 1 203 layer having voids formed therein; and a plurality of alternating GaN and A l N layers above the A 1 203 layer, wherein the GaN and Al N layers are under continuous compressive stress.
1. 2
  Dependent← claim 1AlSiOGaN HFET (heterostructure field effect transistor)
  The GaN HFET of claim 1, further comprising an amorphous layer located between the silicon substrate and the A 120 3 layer.
2. 3
  Dependent← claim 1GaNGaN HFET (heterostructure field effect transistor)
  The GaN HFET of claim 1, wherein the GaN layers in the plurality of alternating GaN and A l N layers have a minimum thickness of 500 nm.
3. 4
  Dependent← claim 1GaNGaN HFET (heterostructure field effect transistor)
  The GaN HFET of claim 1, wherein the GaN layers in the plurality of alternating GaN and A l N layers have a maximum thickness of 50,000 nm.
5
IndependentSiAl₂O₃GaNAlNAlSiOGaN HFET (heterostructure field effect transistor)
A method of making a GaN HFET comprising: Attorney Docket No.: 5510P₃₂₈DC₂ -2-Examiner: HOANG Application No.: 14/834,192 Art Unit: 2892 forming an amorphous ﬁlm of AlSi O between a silicon wafer and an A 1 203 ﬁlm on a surface of the silicon wafer; and depositing a plurality of alternating GaN and A l N layers above the A 1 203 layer.
1. 6
  Dependent← claim 5SiAl₂O₃GaNAlNGaN HFET (heterostructure field effect transistor)
  The method of claim 5, further comprising forming voids in the A 1 203 ﬁlm on a top surface of a silicon wafer, wherein the top surface of the silicon wafer is along a <111> silicon crystal orientation, and wherein the voids are ﬁlled with A l N and GaN.

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

GaN HFET (heterostructure field effect transistor)

AlNalternating epitaxial layers GaN AlN

GaNalternating epitaxial layers GaN AlN

Al₂O₃buffer seed layer with voids

AlSiOinterfacial amorphous layer

Sisubstrate

Materials

Materials described outside the worked examples.

silicon

Substrate

aluminum oxide

Al₂O₃

Buffer Layer

Process steps

Additional fabrication and treatment steps described in the patent.

Mbe Growth

Step 1

Process details

notes:MBE allows deposition at lower temperatures to prevent silicon oxidation; higher vacuum levels used

method:molecular beam epitaxy (MBE)

temperature c max:50

Characterization

Measurements and analyses referenced in the patent, with their drawing references.

fet electrical

Fet Electrical

FIG. 6 is a ﬂowchart for an example process of fabricating a GaN substrate that may be suitable for forming transistors and other devices in accordance with an …

Figure references

FIG. 6

GaNGaN

Reported properties

Performance values and ranges asserted in the specification or claims.

Property	Value	Material
Al2O3 crystalline film thickness	5–50 nm	Al₂O₃
GaN layer minimum thickness (claimed)	≥ 500 nm

Why these are connected

Related documents with shared materials, methods, properties, or citations.

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