Patent
US 11,012,063GAN SWITCH WITH INTEGRATED FAILSAFE PULLDOWN CIRCUIT
Kennith Kin Leong
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 11,012,063Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit.
Figures 2A, 2 B, and 2 C illustrate examples and alternative circuits for the voltage clamp of the failsafe pulldown circuit.
Figure 3 illustrates an example of voltage waveforms corresponding to the power switch device of
Figure 4 illustrates a layout for the power switch device of
Figures 5 A, 5B, and 5 C illustrate schematic diagrams of circuits for driving the power switch device of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-23. Canceled
Canceled
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control terminal and the reference terminal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The power device of claim 24, wherein the pulldown control circuit comprises: a resistor coupled between the pulldown gate and the pulldown source. Previously presented
The power device of claim 24, wherein the pulldown control circuit comp ri ses: a voltage clamp coupled between the pulldown source and the pulldown gate. Previously presented
The power device of claim 24, wherein the normally-off power transistor is an enhancement-mode Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT). Previously presented
The power device of claim 24, wherein the turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor, wherein the no rm ally-on pulldown transistor is arranged to short the first gate to the first source when a voltage applied across the control te rm inal and the reference terminal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor, and wherein the pulldown control circuit is configured to autonomously discharge the negative voltage when a voltage applied across the control te rm inal and the reference te rm inal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor. Previously presented
An electronic switch device, comprising: a normally-off power transistor integrated in a semiconductor die and comprising a first gate and a first source; a control terminal that is electrically connected to the first gate; a load te rm inal that is electrically connected to the first source; a reference te rm inal; and a failsafe pulldown circuit integrated in the same semiconductor die as the no rm ally-off power transistor and comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control te rm inal and the reference te rm inal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pul l down gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The electronic switch device of claim 32, wherein the semiconductor die comprises a group I II -V material. Previously presented
The electronic switch device of claim 32, wherein the turn-on voltage is a voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally- off power transistor and a magnitude of a turn-on threshold voltage of the normally-on pulldown transistor. Previously presented
The electronic switch device of claim 32, wherein a channel of the norm ally-on pulldown transistor is interposed between a metallization of the first gate of the norm ally-off power transistor and a metallization of the first source of the normally-off power transistor. Previously presented
The electronic switch device of claim 32, wherein the no rm ally- off power transistor further comprises: multiple fingers, each comprising a channel region; a gate rail metallization connected to gates for each of the multiple fingers; and a source rail metallization connected to each of the multiple fingers, wherein the no rm ally-on pulldown transistor comprises multiple pulldown channels, each of which is interposed between the gate rail metallization and the source rail metallization, wherein the multiple pulldown channels are distributed along a length of the gate rail metallization and the source rail metallization. Previously presented
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor comprising a pulldown source and a pulldown gate, and coupled between the first gate and the first source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and comprising a resistor and a voltage clamp coupled in parallel between the pulldown gate and the pulldown source. Previously presented
The power device of claim 46, wherein the normally-off power transistor and the normally-on pulldown transistor are monolithically integrated Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs). New
The power device of claim 46, wherein the normally-off power transistor is a Gate Injection Transistor (GIT). New
Layer stacks claimed or described, ordered top of device to substrate.
power device with failsafe pulldown circuit
electronic switch device with monolithically integrated failsafe pulldown circuit
Materials described outside the worked examples.
Gallium Nitride
GaN
group III-V material
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Voltage | 7.2–12 V | — |
Voltage |
Patent
Atlas literature
Patent
US 11,012,063Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit.
Figures 2A, 2 B, and 2 C illustrate examples and alternative circuits for the voltage clamp of the failsafe pulldown circuit.
Figure 3 illustrates an example of voltage waveforms corresponding to the power switch device of
Figure 4 illustrates a layout for the power switch device of
Figures 5 A, 5B, and 5 C illustrate schematic diagrams of circuits for driving the power switch device of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-23. Canceled
Canceled
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control terminal and the reference terminal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The power device of claim 24, wherein the pulldown control circuit comprises: a resistor coupled between the pulldown gate and the pulldown source. Previously presented
The power device of claim 24, wherein the pulldown control circuit comp ri ses: a voltage clamp coupled between the pulldown source and the pulldown gate. Previously presented
The power device of claim 24, wherein the normally-off power transistor is an enhancement-mode Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT). Previously presented
The power device of claim 24, wherein the turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor, wherein the no rm ally-on pulldown transistor is arranged to short the first gate to the first source when a voltage applied across the control te rm inal and the reference terminal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor, and wherein the pulldown control circuit is configured to autonomously discharge the negative voltage when a voltage applied across the control te rm inal and the reference te rm inal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor. Previously presented
An electronic switch device, comprising: a normally-off power transistor integrated in a semiconductor die and comprising a first gate and a first source; a control terminal that is electrically connected to the first gate; a load te rm inal that is electrically connected to the first source; a reference te rm inal; and a failsafe pulldown circuit integrated in the same semiconductor die as the no rm ally-off power transistor and comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control te rm inal and the reference te rm inal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pul l down gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The electronic switch device of claim 32, wherein the semiconductor die comprises a group I II -V material. Previously presented
The electronic switch device of claim 32, wherein the turn-on voltage is a voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally- off power transistor and a magnitude of a turn-on threshold voltage of the normally-on pulldown transistor. Previously presented
The electronic switch device of claim 32, wherein a channel of the norm ally-on pulldown transistor is interposed between a metallization of the first gate of the norm ally-off power transistor and a metallization of the first source of the normally-off power transistor. Previously presented
The electronic switch device of claim 32, wherein the no rm ally- off power transistor further comprises: multiple fingers, each comprising a channel region; a gate rail metallization connected to gates for each of the multiple fingers; and a source rail metallization connected to each of the multiple fingers, wherein the no rm ally-on pulldown transistor comprises multiple pulldown channels, each of which is interposed between the gate rail metallization and the source rail metallization, wherein the multiple pulldown channels are distributed along a length of the gate rail metallization and the source rail metallization. Previously presented
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor comprising a pulldown source and a pulldown gate, and coupled between the first gate and the first source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and comprising a resistor and a voltage clamp coupled in parallel between the pulldown gate and the pulldown source. Previously presented
The power device of claim 46, wherein the normally-off power transistor and the normally-on pulldown transistor are monolithically integrated Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs). New
The power device of claim 46, wherein the normally-off power transistor is a Gate Injection Transistor (GIT). New
Layer stacks claimed or described, ordered top of device to substrate.
power device with failsafe pulldown circuit
electronic switch device with monolithically integrated failsafe pulldown circuit
Materials described outside the worked examples.
Gallium Nitride
GaN
group III-V material
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Voltage | 7.2–12 V | — |
Voltage |
Patent
Atlas literature
Patent
US 11,012,063Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit.
Figures 2A, 2 B, and 2 C illustrate examples and alternative circuits for the voltage clamp of the failsafe pulldown circuit.
Figure 3 illustrates an example of voltage waveforms corresponding to the power switch device of
Figure 4 illustrates a layout for the power switch device of
Figures 5 A, 5B, and 5 C illustrate schematic diagrams of circuits for driving the power switch device of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-23. Canceled
Canceled
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control terminal and the reference terminal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The power device of claim 24, wherein the pulldown control circuit comprises: a resistor coupled between the pulldown gate and the pulldown source. Previously presented
The power device of claim 24, wherein the pulldown control circuit comp ri ses: a voltage clamp coupled between the pulldown source and the pulldown gate. Previously presented
The power device of claim 24, wherein the normally-off power transistor is an enhancement-mode Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT). Previously presented
The power device of claim 24, wherein the turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor, wherein the no rm ally-on pulldown transistor is arranged to short the first gate to the first source when a voltage applied across the control te rm inal and the reference terminal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor, and wherein the pulldown control circuit is configured to autonomously discharge the negative voltage when a voltage applied across the control te rm inal and the reference te rm inal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor. Previously presented
An electronic switch device, comprising: a normally-off power transistor integrated in a semiconductor die and comprising a first gate and a first source; a control terminal that is electrically connected to the first gate; a load te rm inal that is electrically connected to the first source; a reference te rm inal; and a failsafe pulldown circuit integrated in the same semiconductor die as the no rm ally-off power transistor and comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control te rm inal and the reference te rm inal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pul l down gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The electronic switch device of claim 32, wherein the semiconductor die comprises a group I II -V material. Previously presented
The electronic switch device of claim 32, wherein the turn-on voltage is a voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally- off power transistor and a magnitude of a turn-on threshold voltage of the normally-on pulldown transistor. Previously presented
The electronic switch device of claim 32, wherein a channel of the norm ally-on pulldown transistor is interposed between a metallization of the first gate of the norm ally-off power transistor and a metallization of the first source of the normally-off power transistor. Previously presented
The electronic switch device of claim 32, wherein the no rm ally- off power transistor further comprises: multiple fingers, each comprising a channel region; a gate rail metallization connected to gates for each of the multiple fingers; and a source rail metallization connected to each of the multiple fingers, wherein the no rm ally-on pulldown transistor comprises multiple pulldown channels, each of which is interposed between the gate rail metallization and the source rail metallization, wherein the multiple pulldown channels are distributed along a length of the gate rail metallization and the source rail metallization. Previously presented
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor comprising a pulldown source and a pulldown gate, and coupled between the first gate and the first source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and comprising a resistor and a voltage clamp coupled in parallel between the pulldown gate and the pulldown source. Previously presented
The power device of claim 46, wherein the normally-off power transistor and the normally-on pulldown transistor are monolithically integrated Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs). New
The power device of claim 46, wherein the normally-off power transistor is a Gate Injection Transistor (GIT). New
Layer stacks claimed or described, ordered top of device to substrate.
power device with failsafe pulldown circuit
electronic switch device with monolithically integrated failsafe pulldown circuit
Materials described outside the worked examples.
Gallium Nitride
GaN
group III-V material
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Voltage | 7.2–12 V | — |
Voltage |
Patent
Atlas literature
Patent
US 11,012,063Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit.
Figures 2A, 2 B, and 2 C illustrate examples and alternative circuits for the voltage clamp of the failsafe pulldown circuit.
Figure 3 illustrates an example of voltage waveforms corresponding to the power switch device of
Figure 4 illustrates a layout for the power switch device of
Figures 5 A, 5B, and 5 C illustrate schematic diagrams of circuits for driving the power switch device of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-23. Canceled
Canceled
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control terminal and the reference terminal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The power device of claim 24, wherein the pulldown control circuit comprises: a resistor coupled between the pulldown gate and the pulldown source. Previously presented
The power device of claim 24, wherein the pulldown control circuit comp ri ses: a voltage clamp coupled between the pulldown source and the pulldown gate. Previously presented
The power device of claim 24, wherein the normally-off power transistor is an enhancement-mode Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT). Previously presented
The power device of claim 24, wherein the turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor, wherein the no rm ally-on pulldown transistor is arranged to short the first gate to the first source when a voltage applied across the control te rm inal and the reference terminal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor, and wherein the pulldown control circuit is configured to autonomously discharge the negative voltage when a voltage applied across the control te rm inal and the reference te rm inal is smaller than the magnitude of the turn-off threshold voltage of the normally-on pulldown transistor. Previously presented
An electronic switch device, comprising: a normally-off power transistor integrated in a semiconductor die and comprising a first gate and a first source; a control terminal that is electrically connected to the first gate; a load te rm inal that is electrically connected to the first source; a reference te rm inal; and a failsafe pulldown circuit integrated in the same semiconductor die as the no rm ally-off power transistor and comprising: a normally-on pulldown transistor configured to short the first gate to the first source when no voltage is applied across the control te rm inal and the reference te rm inal, and comprising a pulldown gate and a pulldown source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and configured to autonomously apply a negative voltage to the pul l down gate, relative to the pulldown source, when a turn-on voltage is applied between the control terminal and the reference terminal, and to autonomously discharge the negative voltage when the turn-on voltage is not applied between the control terminal and the reference terminal. Previously presented
The electronic switch device of claim 32, wherein the semiconductor die comprises a group I II -V material. Previously presented
The electronic switch device of claim 32, wherein the turn-on voltage is a voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally- off power transistor and a magnitude of a turn-on threshold voltage of the normally-on pulldown transistor. Previously presented
The electronic switch device of claim 32, wherein a channel of the norm ally-on pulldown transistor is interposed between a metallization of the first gate of the norm ally-off power transistor and a metallization of the first source of the normally-off power transistor. Previously presented
The electronic switch device of claim 32, wherein the no rm ally- off power transistor further comprises: multiple fingers, each comprising a channel region; a gate rail metallization connected to gates for each of the multiple fingers; and a source rail metallization connected to each of the multiple fingers, wherein the no rm ally-on pulldown transistor comprises multiple pulldown channels, each of which is interposed between the gate rail metallization and the source rail metallization, wherein the multiple pulldown channels are distributed along a length of the gate rail metallization and the source rail metallization. Previously presented
A power device, comprising: a normally-off power transistor comprising a first gate and a first source; a control terminal electrically connected to the first gate; a load terminal electrically connected to the first source; a reference terminal; and a failsafe pulldown circuit comprising: a normally-on pulldown transistor comprising a pulldown source and a pulldown gate, and coupled between the first gate and the first source; and a pulldown control circuit connected between the pulldown gate and the pulldown source, and comprising a resistor and a voltage clamp coupled in parallel between the pulldown gate and the pulldown source. Previously presented
The power device of claim 46, wherein the normally-off power transistor and the normally-on pulldown transistor are monolithically integrated Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs). New
The power device of claim 46, wherein the normally-off power transistor is a Gate Injection Transistor (GIT). New
Layer stacks claimed or described, ordered top of device to substrate.
power device with failsafe pulldown circuit
electronic switch device with monolithically integrated failsafe pulldown circuit
Materials described outside the worked examples.
Gallium Nitride
GaN
group III-V material
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Voltage | 7.2–12 V | — |
Voltage |
| — |
Voltage | 1.2–3.5 V | — |
Voltage | ≥ 1 V | — |
Voltage | ≥ 7 V | — |
| — |
Voltage | 1.2–3.5 V | — |
Voltage | ≥ 1 V | — |
Voltage | ≥ 7 V | — |
| — |
Voltage | 1.2–3.5 V | — |
Voltage | ≥ 1 V | — |
Voltage | ≥ 7 V | — |
| — |
Voltage | 1.2–3.5 V | — |
Voltage | ≥ 1 V | — |
Voltage | ≥ 7 V | — |