Patent
US 10,103,696Patent
Atlas literature
Patent
US 10,103,696Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a simplified schematic of a known multi-band power amplifier circuit. [00
FIG. 2 is a simplified schematic of a multi-band power amplifier circuit in accordance with one embodiment of the invention. [0018]
FIG. 3 is a simplified schematic of a multi-band power amplifier circuit in accordance with another embodiment of the invention. [0019]
FIG. 4 is a simplified diagram of a first integrated circuit package that includes, within the package. a power amplifier on a first die, a switch on a second die …
FIG. 5 is a simplified diagram of a second integrated circuit packa g e that includes, within the package, a power amplifier on a first die, a switch on a second …
FIG. 6 is a top view of a die that includes a power amplifier, a capacitor and a switch. [0022]
FIG. 7 is a side view of the capacitor shown the top view of
FIG. 8 is a simplified diagram of a third integrated circuit package that includes, within the package, the die of
FIG. 9 is a top view of a die that includes a power amplifier, an interconnect portion and a switch with two capacitors. [0025]
FIG. 10 is a side view of one the two capacitors shown in
FIG. 11 is a top view of a die that includes a power amplifier, an interconnect portion, a switch with two capacitors. [0027]
FIG. 12 is a side view of one the two capacitors shown in
FIG. 13 is a top view of a die that includes a power amplifier, an interconnect portion, and a switch with two ground terminals. [0029]
FIG. 14 is a side view of one of the two ground terminals shown
FIG. 15 is a simplified diagram of a fourth integrated circuit package that includes, within the package, the die of
FIG. 16 is a simplified diagram of a fifth inte g rated circuit package that includes, within the package, the die of
FIG. 17 is a simpl i fied diagram of a sixth integrated circuit package that includes, within the package, the die of
FIG. 18 is a simplified schematic of a SP₂T switch coupled to a controller. [0034]
FIG. 19 is simplified schematic of another SP₂T switch coupled to a controller in accordance with one embodiment of the invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A circuit, comprising: a radio frequency (hereinafter "RF") power amplifier fabricated using gallium nitride (hereinafter "GaN") technology, the RF power amplifier having an output impedance at its output port; an interconnection portion connected directly to the output port of the RF power amplifier; a multi-band RF switch fabricated using GaN technology, the multi-band RF switch having a common RF port connected directly to the interconnect portion and having a plurality of RF output ports; a plurality of narrowband impedance matching networks, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the RF power amplifier with the input impedance of the input port of the RF filter that is coupled to the narrowband impedance matching network. Original
The circuit of claim 1, wherein the interconnection portion consists solely of an electrical conductor with one end of the electrical conductor connected to the output port of the RF power amplifier and another end of the electrical conductor connected to the common RF port of the multi-band RF switch. Original
The circuit of claim 1, wherein the interconnection portion consists solely of a capacitor with one end of the capacitor connected to the output port of the RF power amplifier and another end of the capacitor connected to the common RF port of the multi- band RF switch. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a first silicon substrate (hereinafter "PA-FET") housed within the IC package, the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA-FET having an output impedance at the drain terminal; and a multi-band RF switch disposed on a GaN layer over a second silicon substrate housed within the IC package, the multi-band RF switch including a plurality of Unit HEMT cells, the multi-band RF switch having a common RF port connected directly to the drain te rm inal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein a connection between the PA-FET and the multi-band RF switch is totally within the IC package. Original
The IC package of claim 11, wherein each Unit HEMT cell of the plurality of Unit HEMT cells includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to another contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 11 including a plurality of narrowband impedance matching networks housed within the IC package, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters housed within the IC package, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the drain terminal of the PA-FET with the input impedance of the input port of the RF filter coupled to the narrowband impedance matching network. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a silicon substrate (hereinafter "PA-FET"), the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA- FET having an output impedance at the drain terminal; and a multiband RF switch including a plurality of Unit HEMT cells, the multi-band RF switch disposed on a GaN layer over the silicon substrate, the multi-band RF switch having a common RF port connected directly to the drain terminal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein the silicon substrate is housed within the IC package. Original
The IC package of claim 16, wherein each Unit HEMT cell of the plurality of Unit HEMT cells, includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected to another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to the other contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 16, including at least one metal-insulator-metal (hereinafter "MIM") capacitor disposed on the silicon substrate, the at least one MIM capacitor coupling the multiband RF switch to ground potential. Original
The IC package of claim 16, including a controller, fabricated using CMOS technology and disposed on the silicon substrate, wherein the controller is separately coupled to the HEMT cell gate of each Unit HEMT cell of the multi-band RF switch for separately controlling each Unit HEMT cell. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier (PA-FET)
multi-band RF switch (GaN)
Unit HEMT cell
Materials described outside the worked examples.
gallium nitride
GaN
two-dimensional electron gas layer
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Atlas literature
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US 10,103,696Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a simplified schematic of a known multi-band power amplifier circuit. [00
FIG. 2 is a simplified schematic of a multi-band power amplifier circuit in accordance with one embodiment of the invention. [0018]
FIG. 3 is a simplified schematic of a multi-band power amplifier circuit in accordance with another embodiment of the invention. [0019]
FIG. 4 is a simplified diagram of a first integrated circuit package that includes, within the package. a power amplifier on a first die, a switch on a second die …
FIG. 5 is a simplified diagram of a second integrated circuit packa g e that includes, within the package, a power amplifier on a first die, a switch on a second …
FIG. 6 is a top view of a die that includes a power amplifier, a capacitor and a switch. [0022]
FIG. 7 is a side view of the capacitor shown the top view of
FIG. 8 is a simplified diagram of a third integrated circuit package that includes, within the package, the die of
FIG. 9 is a top view of a die that includes a power amplifier, an interconnect portion and a switch with two capacitors. [0025]
FIG. 10 is a side view of one the two capacitors shown in
FIG. 11 is a top view of a die that includes a power amplifier, an interconnect portion, a switch with two capacitors. [0027]
FIG. 12 is a side view of one the two capacitors shown in
FIG. 13 is a top view of a die that includes a power amplifier, an interconnect portion, and a switch with two ground terminals. [0029]
FIG. 14 is a side view of one of the two ground terminals shown
FIG. 15 is a simplified diagram of a fourth integrated circuit package that includes, within the package, the die of
FIG. 16 is a simplified diagram of a fifth inte g rated circuit package that includes, within the package, the die of
FIG. 17 is a simpl i fied diagram of a sixth integrated circuit package that includes, within the package, the die of
FIG. 18 is a simplified schematic of a SP₂T switch coupled to a controller. [0034]
FIG. 19 is simplified schematic of another SP₂T switch coupled to a controller in accordance with one embodiment of the invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A circuit, comprising: a radio frequency (hereinafter "RF") power amplifier fabricated using gallium nitride (hereinafter "GaN") technology, the RF power amplifier having an output impedance at its output port; an interconnection portion connected directly to the output port of the RF power amplifier; a multi-band RF switch fabricated using GaN technology, the multi-band RF switch having a common RF port connected directly to the interconnect portion and having a plurality of RF output ports; a plurality of narrowband impedance matching networks, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the RF power amplifier with the input impedance of the input port of the RF filter that is coupled to the narrowband impedance matching network. Original
The circuit of claim 1, wherein the interconnection portion consists solely of an electrical conductor with one end of the electrical conductor connected to the output port of the RF power amplifier and another end of the electrical conductor connected to the common RF port of the multi-band RF switch. Original
The circuit of claim 1, wherein the interconnection portion consists solely of a capacitor with one end of the capacitor connected to the output port of the RF power amplifier and another end of the capacitor connected to the common RF port of the multi- band RF switch. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a first silicon substrate (hereinafter "PA-FET") housed within the IC package, the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA-FET having an output impedance at the drain terminal; and a multi-band RF switch disposed on a GaN layer over a second silicon substrate housed within the IC package, the multi-band RF switch including a plurality of Unit HEMT cells, the multi-band RF switch having a common RF port connected directly to the drain te rm inal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein a connection between the PA-FET and the multi-band RF switch is totally within the IC package. Original
The IC package of claim 11, wherein each Unit HEMT cell of the plurality of Unit HEMT cells includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to another contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 11 including a plurality of narrowband impedance matching networks housed within the IC package, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters housed within the IC package, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the drain terminal of the PA-FET with the input impedance of the input port of the RF filter coupled to the narrowband impedance matching network. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a silicon substrate (hereinafter "PA-FET"), the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA- FET having an output impedance at the drain terminal; and a multiband RF switch including a plurality of Unit HEMT cells, the multi-band RF switch disposed on a GaN layer over the silicon substrate, the multi-band RF switch having a common RF port connected directly to the drain terminal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein the silicon substrate is housed within the IC package. Original
The IC package of claim 16, wherein each Unit HEMT cell of the plurality of Unit HEMT cells, includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected to another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to the other contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 16, including at least one metal-insulator-metal (hereinafter "MIM") capacitor disposed on the silicon substrate, the at least one MIM capacitor coupling the multiband RF switch to ground potential. Original
The IC package of claim 16, including a controller, fabricated using CMOS technology and disposed on the silicon substrate, wherein the controller is separately coupled to the HEMT cell gate of each Unit HEMT cell of the multi-band RF switch for separately controlling each Unit HEMT cell. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier (PA-FET)
multi-band RF switch (GaN)
Unit HEMT cell
Materials described outside the worked examples.
gallium nitride
GaN
two-dimensional electron gas layer
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,103,696Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a simplified schematic of a known multi-band power amplifier circuit. [00
FIG. 2 is a simplified schematic of a multi-band power amplifier circuit in accordance with one embodiment of the invention. [0018]
FIG. 3 is a simplified schematic of a multi-band power amplifier circuit in accordance with another embodiment of the invention. [0019]
FIG. 4 is a simplified diagram of a first integrated circuit package that includes, within the package. a power amplifier on a first die, a switch on a second die …
FIG. 5 is a simplified diagram of a second integrated circuit packa g e that includes, within the package, a power amplifier on a first die, a switch on a second …
FIG. 6 is a top view of a die that includes a power amplifier, a capacitor and a switch. [0022]
FIG. 7 is a side view of the capacitor shown the top view of
FIG. 8 is a simplified diagram of a third integrated circuit package that includes, within the package, the die of
FIG. 9 is a top view of a die that includes a power amplifier, an interconnect portion and a switch with two capacitors. [0025]
FIG. 10 is a side view of one the two capacitors shown in
FIG. 11 is a top view of a die that includes a power amplifier, an interconnect portion, a switch with two capacitors. [0027]
FIG. 12 is a side view of one the two capacitors shown in
FIG. 13 is a top view of a die that includes a power amplifier, an interconnect portion, and a switch with two ground terminals. [0029]
FIG. 14 is a side view of one of the two ground terminals shown
FIG. 15 is a simplified diagram of a fourth integrated circuit package that includes, within the package, the die of
FIG. 16 is a simplified diagram of a fifth inte g rated circuit package that includes, within the package, the die of
FIG. 17 is a simpl i fied diagram of a sixth integrated circuit package that includes, within the package, the die of
FIG. 18 is a simplified schematic of a SP₂T switch coupled to a controller. [0034]
FIG. 19 is simplified schematic of another SP₂T switch coupled to a controller in accordance with one embodiment of the invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A circuit, comprising: a radio frequency (hereinafter "RF") power amplifier fabricated using gallium nitride (hereinafter "GaN") technology, the RF power amplifier having an output impedance at its output port; an interconnection portion connected directly to the output port of the RF power amplifier; a multi-band RF switch fabricated using GaN technology, the multi-band RF switch having a common RF port connected directly to the interconnect portion and having a plurality of RF output ports; a plurality of narrowband impedance matching networks, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the RF power amplifier with the input impedance of the input port of the RF filter that is coupled to the narrowband impedance matching network. Original
The circuit of claim 1, wherein the interconnection portion consists solely of an electrical conductor with one end of the electrical conductor connected to the output port of the RF power amplifier and another end of the electrical conductor connected to the common RF port of the multi-band RF switch. Original
The circuit of claim 1, wherein the interconnection portion consists solely of a capacitor with one end of the capacitor connected to the output port of the RF power amplifier and another end of the capacitor connected to the common RF port of the multi- band RF switch. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a first silicon substrate (hereinafter "PA-FET") housed within the IC package, the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA-FET having an output impedance at the drain terminal; and a multi-band RF switch disposed on a GaN layer over a second silicon substrate housed within the IC package, the multi-band RF switch including a plurality of Unit HEMT cells, the multi-band RF switch having a common RF port connected directly to the drain te rm inal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein a connection between the PA-FET and the multi-band RF switch is totally within the IC package. Original
The IC package of claim 11, wherein each Unit HEMT cell of the plurality of Unit HEMT cells includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to another contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 11 including a plurality of narrowband impedance matching networks housed within the IC package, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters housed within the IC package, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the drain terminal of the PA-FET with the input impedance of the input port of the RF filter coupled to the narrowband impedance matching network. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a silicon substrate (hereinafter "PA-FET"), the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA- FET having an output impedance at the drain terminal; and a multiband RF switch including a plurality of Unit HEMT cells, the multi-band RF switch disposed on a GaN layer over the silicon substrate, the multi-band RF switch having a common RF port connected directly to the drain terminal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein the silicon substrate is housed within the IC package. Original
The IC package of claim 16, wherein each Unit HEMT cell of the plurality of Unit HEMT cells, includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected to another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to the other contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 16, including at least one metal-insulator-metal (hereinafter "MIM") capacitor disposed on the silicon substrate, the at least one MIM capacitor coupling the multiband RF switch to ground potential. Original
The IC package of claim 16, including a controller, fabricated using CMOS technology and disposed on the silicon substrate, wherein the controller is separately coupled to the HEMT cell gate of each Unit HEMT cell of the multi-band RF switch for separately controlling each Unit HEMT cell. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier (PA-FET)
multi-band RF switch (GaN)
Unit HEMT cell
Materials described outside the worked examples.
gallium nitride
GaN
two-dimensional electron gas layer
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,103,696Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a simplified schematic of a known multi-band power amplifier circuit. [00
FIG. 2 is a simplified schematic of a multi-band power amplifier circuit in accordance with one embodiment of the invention. [0018]
FIG. 3 is a simplified schematic of a multi-band power amplifier circuit in accordance with another embodiment of the invention. [0019]
FIG. 4 is a simplified diagram of a first integrated circuit package that includes, within the package. a power amplifier on a first die, a switch on a second die …
FIG. 5 is a simplified diagram of a second integrated circuit packa g e that includes, within the package, a power amplifier on a first die, a switch on a second …
FIG. 6 is a top view of a die that includes a power amplifier, a capacitor and a switch. [0022]
FIG. 7 is a side view of the capacitor shown the top view of
FIG. 8 is a simplified diagram of a third integrated circuit package that includes, within the package, the die of
FIG. 9 is a top view of a die that includes a power amplifier, an interconnect portion and a switch with two capacitors. [0025]
FIG. 10 is a side view of one the two capacitors shown in
FIG. 11 is a top view of a die that includes a power amplifier, an interconnect portion, a switch with two capacitors. [0027]
FIG. 12 is a side view of one the two capacitors shown in
FIG. 13 is a top view of a die that includes a power amplifier, an interconnect portion, and a switch with two ground terminals. [0029]
FIG. 14 is a side view of one of the two ground terminals shown
FIG. 15 is a simplified diagram of a fourth integrated circuit package that includes, within the package, the die of
FIG. 16 is a simplified diagram of a fifth inte g rated circuit package that includes, within the package, the die of
FIG. 17 is a simpl i fied diagram of a sixth integrated circuit package that includes, within the package, the die of
FIG. 18 is a simplified schematic of a SP₂T switch coupled to a controller. [0034]
FIG. 19 is simplified schematic of another SP₂T switch coupled to a controller in accordance with one embodiment of the invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A circuit, comprising: a radio frequency (hereinafter "RF") power amplifier fabricated using gallium nitride (hereinafter "GaN") technology, the RF power amplifier having an output impedance at its output port; an interconnection portion connected directly to the output port of the RF power amplifier; a multi-band RF switch fabricated using GaN technology, the multi-band RF switch having a common RF port connected directly to the interconnect portion and having a plurality of RF output ports; a plurality of narrowband impedance matching networks, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the RF power amplifier with the input impedance of the input port of the RF filter that is coupled to the narrowband impedance matching network. Original
The circuit of claim 1, wherein the interconnection portion consists solely of an electrical conductor with one end of the electrical conductor connected to the output port of the RF power amplifier and another end of the electrical conductor connected to the common RF port of the multi-band RF switch. Original
The circuit of claim 1, wherein the interconnection portion consists solely of a capacitor with one end of the capacitor connected to the output port of the RF power amplifier and another end of the capacitor connected to the common RF port of the multi- band RF switch. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a first silicon substrate (hereinafter "PA-FET") housed within the IC package, the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA-FET having an output impedance at the drain terminal; and a multi-band RF switch disposed on a GaN layer over a second silicon substrate housed within the IC package, the multi-band RF switch including a plurality of Unit HEMT cells, the multi-band RF switch having a common RF port connected directly to the drain te rm inal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein a connection between the PA-FET and the multi-band RF switch is totally within the IC package. Original
The IC package of claim 11, wherein each Unit HEMT cell of the plurality of Unit HEMT cells includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to another contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 11 including a plurality of narrowband impedance matching networks housed within the IC package, each narrowband impedance matching network having an input port coupled to one RF output port of the multi-band RF switch and having an output port, each narrowband impedance matching network configured for optimum impedance matching within a narrow RF band; and a plurality of RF filters housed within the IC package, each RF filter having an input port and an output port, the input port of one RF filter coupled to the output port of one narrowband impedance matching network, each RF filter configured to pass only RF signals within the narrow RF band of the narrowband impedance matching network to which it is coupled, wherein each RF filter has an input impedance at its input port, wherein each narrowband impedance matching network matches the output impedance of the drain terminal of the PA-FET with the input impedance of the input port of the RF filter coupled to the narrowband impedance matching network. Original
An integrated circuit (hereinafter "IC") package, comprising: a field-effect transistor disposed on a gallium nitride (hereinafter "GaN") layer over a silicon substrate (hereinafter "PA-FET"), the PA-FET having a gate terminal, a drain terminal coupled to a direct current (hereinafter "DC") supply voltage for biasing the PA-FET at a positive voltage, and a source terminal coupled to ground potential, the PA- FET having an output impedance at the drain terminal; and a multiband RF switch including a plurality of Unit HEMT cells, the multi-band RF switch disposed on a GaN layer over the silicon substrate, the multi-band RF switch having a common RF port connected directly to the drain terminal of the PA-FET without any intervening impedance matching network and having a plurality of RF output ports, wherein the silicon substrate is housed within the IC package. Original
The IC package of claim 16, wherein each Unit HEMT cell of the plurality of Unit HEMT cells, includes: a two-dimensional electron gas (2DEG) layer disposed on the GaN layer; an insulating layer disposed on the 2DEG layer; a GaN high-electron-mobility transistor (hereinafter "HEMT"), the GaN HEMT having a gate disposed on the insulating layer, a drain adjacent to one side of the gate and a source adjacent to an opposing side of the gate, the GaN HEMT disposed on and including the GaN layer, and the GaN HEMT having its gate connected to one contact of a 2DEG gate bias resistor, the 2DEG gate bias resistor disposed in the 2DEG layer; a HEMT cell gate electrically connected to another contact of the 2DEG gate bias resistor; a HEMT cell drain electrically connected to one contact of a 2DEG linearity resistor and to the drain of the GaN HEMT; and a HEMT cell source electrically connected to the other contact of the 2DEG linearity resistor and to the source of the GaN HEMT, the 2DEG linearity resistor being disposed in the 2DEG layer. Original
The IC package of claim 16, including at least one metal-insulator-metal (hereinafter "MIM") capacitor disposed on the silicon substrate, the at least one MIM capacitor coupling the multiband RF switch to ground potential. Original
The IC package of claim 16, including a controller, fabricated using CMOS technology and disposed on the silicon substrate, wherein the controller is separately coupled to the HEMT cell gate of each Unit HEMT cell of the multi-band RF switch for separately controlling each Unit HEMT cell. Original
Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier (PA-FET)
multi-band RF switch (GaN)
Unit HEMT cell
Materials described outside the worked examples.
gallium nitride
GaN
two-dimensional electron gas layer
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