Patent
Atlas literature
Patent
US 11,837,683 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a top plan view of one embodiment of an exemplary processing system according to some embodi- 45 ments of the present technology.
FIG. 2 shows exemplary operations in a method of forming semiconductor devices according to some embodi- ments of the present technology.
FIGS. 3A-3D show cross-sectional views of semiconduc- 50 tor structures being processed according to embodiments of the present technology.
FIGS. 4A-D show additional cross-sectional views of semiconductor structures being processed according to embodiments of the present technology. 55 Several of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor processing method comprising: forming a nucleation layer on a semiconductor substrate; forming first, second, and third gallium-and-nitrogen-containing regions on the nucleation layer; porosifying the first gallium-and-nitrogen-containing region, without porosifiying the second and third gal-lium-and-nitrogen-containing regions; forming a first active region on the porosified first gal-lium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region; and forming a third active region on the unporosified third gallium-and-nitrogen-containing region.
The semiconductor processing method of claim 1, wherein the first active region and the second active region are formed in a single deposition of an active region material on the semiconductor substrate.
The semiconductor processing method of claim 1, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 1, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor processing method of claim 1, wherein the method further comprises: forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
A semiconductor processing method comprising: forming first, second, and third gallium-and-nitrogen-containing regions; depositing an active region material on the first and second gallium-and-nitrogen-containing-regions, wherein the active region material is formed into a first active region on the first gallium-and-nitrogen-contain-ing region, and a second active region on the second gallium-and-nitrogen-containing region; forming a third active region on the third gallium-and-nitrogen-containing region; forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the method further comprises forming a transparent conductive layer on the first, second, and third active regions before the forming of the first reflection layer on the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the transparent conductive layer comprises indium-tin-oxide.
The semiconductor processing method of claim 8, wherein the first reflection layer comprises aluminum, and the second reflection layer comprises copper.
The semiconductor processing method of claim 8, wherein the method further comprises porosifying the first gallium-and-nitrogen-containing region without porosifiy-ing the second and third gallium-and-nitrogen-containing regions.
The semiconductor processing method of claim 8, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 8, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
A semiconductor structure comprising: a first InGaN-containing active region on a porosified first gallium-and-nitrogen-containing region; a second InGaN-containing active region on an unporosi-fied second gallium-and-nitrogen-containing region; and a third InGaN-containing active region on an unporosified third gallium-and-nitrogen-containing layer, wherein the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor structure of claim 15, wherein the first, second, and third, gallium-and-nitrogen-containing regions contact a nucleation layer comprising aluminum nitride, niobium nitride, titanium nitride, or hafnium nitride.
The semiconductor structure of claim 15, wherein the first InGaN-containing active region and the second InGaN-containing active region are formed from a single deposition of InGaN-containing material.
The semiconductor structure of claim 15, wherein the third InGaN-containing active region comprises one or more v-pits.
The semiconductor structure of claim 15, wherein the semiconductor structure further comprises a first reflection layer comprising aluminum on the first and second active regions, and a second reflection layer comprising copper on the third active region.
Layer stacks claimed or described, ordered top of device to substrate.
RGB LED semiconductor structure with porosified GaN sub-region
Materials described outside the worked examples.
gallium-and-nitrogen-containing region
nucleation layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
second active region peak light emission wavelength (green/blue upper bound) | ≤ 550 nm | InGaN |
third active region peak light emission wavelength (red lower bound) | ≥ 600 nm |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 7
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US 11,837,683 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a top plan view of one embodiment of an exemplary processing system according to some embodi- 45 ments of the present technology.
FIG. 2 shows exemplary operations in a method of forming semiconductor devices according to some embodi- ments of the present technology.
FIGS. 3A-3D show cross-sectional views of semiconduc- 50 tor structures being processed according to embodiments of the present technology.
FIGS. 4A-D show additional cross-sectional views of semiconductor structures being processed according to embodiments of the present technology. 55 Several of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor processing method comprising: forming a nucleation layer on a semiconductor substrate; forming first, second, and third gallium-and-nitrogen-containing regions on the nucleation layer; porosifying the first gallium-and-nitrogen-containing region, without porosifiying the second and third gal-lium-and-nitrogen-containing regions; forming a first active region on the porosified first gal-lium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region; and forming a third active region on the unporosified third gallium-and-nitrogen-containing region.
The semiconductor processing method of claim 1, wherein the first active region and the second active region are formed in a single deposition of an active region material on the semiconductor substrate.
The semiconductor processing method of claim 1, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 1, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor processing method of claim 1, wherein the method further comprises: forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
A semiconductor processing method comprising: forming first, second, and third gallium-and-nitrogen-containing regions; depositing an active region material on the first and second gallium-and-nitrogen-containing-regions, wherein the active region material is formed into a first active region on the first gallium-and-nitrogen-contain-ing region, and a second active region on the second gallium-and-nitrogen-containing region; forming a third active region on the third gallium-and-nitrogen-containing region; forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the method further comprises forming a transparent conductive layer on the first, second, and third active regions before the forming of the first reflection layer on the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the transparent conductive layer comprises indium-tin-oxide.
The semiconductor processing method of claim 8, wherein the first reflection layer comprises aluminum, and the second reflection layer comprises copper.
The semiconductor processing method of claim 8, wherein the method further comprises porosifying the first gallium-and-nitrogen-containing region without porosifiy-ing the second and third gallium-and-nitrogen-containing regions.
The semiconductor processing method of claim 8, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 8, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
A semiconductor structure comprising: a first InGaN-containing active region on a porosified first gallium-and-nitrogen-containing region; a second InGaN-containing active region on an unporosi-fied second gallium-and-nitrogen-containing region; and a third InGaN-containing active region on an unporosified third gallium-and-nitrogen-containing layer, wherein the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor structure of claim 15, wherein the first, second, and third, gallium-and-nitrogen-containing regions contact a nucleation layer comprising aluminum nitride, niobium nitride, titanium nitride, or hafnium nitride.
The semiconductor structure of claim 15, wherein the first InGaN-containing active region and the second InGaN-containing active region are formed from a single deposition of InGaN-containing material.
The semiconductor structure of claim 15, wherein the third InGaN-containing active region comprises one or more v-pits.
The semiconductor structure of claim 15, wherein the semiconductor structure further comprises a first reflection layer comprising aluminum on the first and second active regions, and a second reflection layer comprising copper on the third active region.
Layer stacks claimed or described, ordered top of device to substrate.
RGB LED semiconductor structure with porosified GaN sub-region
Materials described outside the worked examples.
gallium-and-nitrogen-containing region
nucleation layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
second active region peak light emission wavelength (green/blue upper bound) | ≤ 550 nm | InGaN |
third active region peak light emission wavelength (red lower bound) | ≥ 600 nm |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 7
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Patent
Atlas literature
Patent
US 11,837,683 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a top plan view of one embodiment of an exemplary processing system according to some embodi- 45 ments of the present technology.
FIG. 2 shows exemplary operations in a method of forming semiconductor devices according to some embodi- ments of the present technology.
FIGS. 3A-3D show cross-sectional views of semiconduc- 50 tor structures being processed according to embodiments of the present technology.
FIGS. 4A-D show additional cross-sectional views of semiconductor structures being processed according to embodiments of the present technology. 55 Several of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor processing method comprising: forming a nucleation layer on a semiconductor substrate; forming first, second, and third gallium-and-nitrogen-containing regions on the nucleation layer; porosifying the first gallium-and-nitrogen-containing region, without porosifiying the second and third gal-lium-and-nitrogen-containing regions; forming a first active region on the porosified first gal-lium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region; and forming a third active region on the unporosified third gallium-and-nitrogen-containing region.
The semiconductor processing method of claim 1, wherein the first active region and the second active region are formed in a single deposition of an active region material on the semiconductor substrate.
The semiconductor processing method of claim 1, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 1, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor processing method of claim 1, wherein the method further comprises: forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
A semiconductor processing method comprising: forming first, second, and third gallium-and-nitrogen-containing regions; depositing an active region material on the first and second gallium-and-nitrogen-containing-regions, wherein the active region material is formed into a first active region on the first gallium-and-nitrogen-contain-ing region, and a second active region on the second gallium-and-nitrogen-containing region; forming a third active region on the third gallium-and-nitrogen-containing region; forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the method further comprises forming a transparent conductive layer on the first, second, and third active regions before the forming of the first reflection layer on the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the transparent conductive layer comprises indium-tin-oxide.
The semiconductor processing method of claim 8, wherein the first reflection layer comprises aluminum, and the second reflection layer comprises copper.
The semiconductor processing method of claim 8, wherein the method further comprises porosifying the first gallium-and-nitrogen-containing region without porosifiy-ing the second and third gallium-and-nitrogen-containing regions.
The semiconductor processing method of claim 8, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 8, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
A semiconductor structure comprising: a first InGaN-containing active region on a porosified first gallium-and-nitrogen-containing region; a second InGaN-containing active region on an unporosi-fied second gallium-and-nitrogen-containing region; and a third InGaN-containing active region on an unporosified third gallium-and-nitrogen-containing layer, wherein the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor structure of claim 15, wherein the first, second, and third, gallium-and-nitrogen-containing regions contact a nucleation layer comprising aluminum nitride, niobium nitride, titanium nitride, or hafnium nitride.
The semiconductor structure of claim 15, wherein the first InGaN-containing active region and the second InGaN-containing active region are formed from a single deposition of InGaN-containing material.
The semiconductor structure of claim 15, wherein the third InGaN-containing active region comprises one or more v-pits.
The semiconductor structure of claim 15, wherein the semiconductor structure further comprises a first reflection layer comprising aluminum on the first and second active regions, and a second reflection layer comprising copper on the third active region.
Layer stacks claimed or described, ordered top of device to substrate.
RGB LED semiconductor structure with porosified GaN sub-region
Materials described outside the worked examples.
gallium-and-nitrogen-containing region
nucleation layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
second active region peak light emission wavelength (green/blue upper bound) | ≤ 550 nm | InGaN |
third active region peak light emission wavelength (red lower bound) | ≥ 600 nm |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 7
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,837,683 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows a top plan view of one embodiment of an exemplary processing system according to some embodi- 45 ments of the present technology.
FIG. 2 shows exemplary operations in a method of forming semiconductor devices according to some embodi- ments of the present technology.
FIGS. 3A-3D show cross-sectional views of semiconduc- 50 tor structures being processed according to embodiments of the present technology.
FIGS. 4A-D show additional cross-sectional views of semiconductor structures being processed according to embodiments of the present technology. 55 Several of …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor processing method comprising: forming a nucleation layer on a semiconductor substrate; forming first, second, and third gallium-and-nitrogen-containing regions on the nucleation layer; porosifying the first gallium-and-nitrogen-containing region, without porosifiying the second and third gal-lium-and-nitrogen-containing regions; forming a first active region on the porosified first gal-lium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region; and forming a third active region on the unporosified third gallium-and-nitrogen-containing region.
The semiconductor processing method of claim 1, wherein the first active region and the second active region are formed in a single deposition of an active region material on the semiconductor substrate.
The semiconductor processing method of claim 1, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 1, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor processing method of claim 1, wherein the method further comprises: forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
A semiconductor processing method comprising: forming first, second, and third gallium-and-nitrogen-containing regions; depositing an active region material on the first and second gallium-and-nitrogen-containing-regions, wherein the active region material is formed into a first active region on the first gallium-and-nitrogen-contain-ing region, and a second active region on the second gallium-and-nitrogen-containing region; forming a third active region on the third gallium-and-nitrogen-containing region; forming a first reflection layer on the first, second, and third active regions; removing a portion of the first reflection layer from the third active region; and forming a second reflection layer over the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the method further comprises forming a transparent conductive layer on the first, second, and third active regions before the forming of the first reflection layer on the first, second, and third active regions.
The semiconductor processing method of claim 8, wherein the transparent conductive layer comprises indium-tin-oxide.
The semiconductor processing method of claim 8, wherein the first reflection layer comprises aluminum, and the second reflection layer comprises copper.
The semiconductor processing method of claim 8, wherein the method further comprises porosifying the first gallium-and-nitrogen-containing region without porosifiy-ing the second and third gallium-and-nitrogen-containing regions.
The semiconductor processing method of claim 8, wherein the forming of the third active region further comprises forming one or more v-pits in the third active region.
The semiconductor processing method of claim 8, wherein: the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
A semiconductor structure comprising: a first InGaN-containing active region on a porosified first gallium-and-nitrogen-containing region; a second InGaN-containing active region on an unporosi-fied second gallium-and-nitrogen-containing region; and a third InGaN-containing active region on an unporosified third gallium-and-nitrogen-containing layer, wherein the first active region is characterized by a first peak light emission wavelength between a second peak light emission wavelength that characterizes the second active region and a third peak light emission wave-length that characterizes the third active region, and the second peak light emission wavelength is less than or about 550 nm, and the third peak light emission wavelength is greater than or about 600 nm.
The semiconductor structure of claim 15, wherein the first, second, and third, gallium-and-nitrogen-containing regions contact a nucleation layer comprising aluminum nitride, niobium nitride, titanium nitride, or hafnium nitride.
The semiconductor structure of claim 15, wherein the first InGaN-containing active region and the second InGaN-containing active region are formed from a single deposition of InGaN-containing material.
The semiconductor structure of claim 15, wherein the third InGaN-containing active region comprises one or more v-pits.
The semiconductor structure of claim 15, wherein the semiconductor structure further comprises a first reflection layer comprising aluminum on the first and second active regions, and a second reflection layer comprising copper on the third active region.
Layer stacks claimed or described, ordered top of device to substrate.
RGB LED semiconductor structure with porosified GaN sub-region
Materials described outside the worked examples.
gallium-and-nitrogen-containing region
nucleation layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
second active region peak light emission wavelength (green/blue upper bound) | ≤ 550 nm | InGaN |
third active region peak light emission wavelength (red lower bound) | ≥ 600 nm |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 7
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