Patent
US 11,069,787GAN-BASED MICROWAVE POWER DEVICE WITH LARGE GATE WIDTH AND MANUFACTURING METHOD THEREOF
Hong WANG
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 11,069,787Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A GaN-based microwave power device with a large gate width, wherein the device comprises: an A I GaN/GaN heterojunction epitaxial layer; a first dielectric layer overlying the AlGaN/GaN heterojunction epitaxial layer; a strip-like source electrode; a drain electrode distributed in a shape of a fishbone, wherein the drain electrode comprises a f i rst drain electrode located at a fish ridge of the fishbone and a plu r ality of second drain electrodes located at fish bones of the fishbone, and all of the second drain electrodes are connected together by the first drain electrode in the middle; a plurality of annular gate electrodes, wherein the gate electrodes are disposed on two sides of the first drain electrode in a symmetrical manner, and the gate electrodes disposed on one side of the first drain electrode are arranged along an extending direction of the first drain electrode; a second dielectric layer; and an interconnect metal electrode pad, wherein the second dielectric layer separates the gate electrodes and a portion of the interconnect metal electrode pad which connects the source electrode, and the second dielectric layer separates the drain electrode and the portion of the interconnect metal electrode pad, wherein the first dielectric layer overlying the AlGaN/GaN hetero j unction epitaxial la y er is one of SiN, SiO 2, SiON, Ga 2 O 3, A 1 2 0 3, A l N, and HfO 2, or is a multilayer structure which is combined by two or more of them, and the firs t dielectric layer has a thickness of 10 nm to 50 n m. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the AlGaN/GaN heterojunction epitaxial layer comprises a substrate, a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, a I GaN barrier layer from bottom to top; wherein a material of the substrate is sapphire, silicon or silicon carbide; the nitride nucleation layer is GaN or Al N; the nitride buffer layer is one or more of GaN, AlGaN, compositionally graded AlGaN; and a two-dimensional electron gas is provided between the GaN channel layer and the A l GaN barrier layer. Previously presented
The GaN-based microwave power device with the large gate width according to claim 1, wherein the source electrode and the drain electrode penetrate the entire first dielectric layer and are in contact with the A l GaN barrier layer; and a material forming the source electrode and the drain electrode is a Ti/Al m ultilayer metal system; the source electrode and the drain electrode are in ohmic contact with the A l GaN barrier layer by high temperature annealing. Previously presented
(currently a m ended) The G aN-based microwave power device with the large gate width according to claim 1, wherein a plurality of strip-like source electrodes are distributed in parallel on a surface of the AlGaN/GaN heterojunction epitaxial layer to fo rm a plurality of gate finger units; the drain electrode is distributed on the surface of the AlGaN/GaN heterojunction epitaxial layer,., each second drain electrode [[,]] is parallel to the source electrode, and.. see el d re-eeftneet ethe-b A e d -ri each second drain electrode together with one source electrode[[,]] for ms one gate finger unit, and all of the second drain electrodes and the source electrodes constitute a plurality of gate finger units. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the gate electrodes are [[is]] located above the first dielectric layer, a bottom of the gate electrodes is in contact with the first dielectric layer, the first dielectric layer is located between the gate electrodes and the AlGaN/GaN heterojunction epitaxial layer; a material forming the gate electrodes is a Ni/Au multilayer metal system with good conductivity; [[the]] each gate electrode is distributed between the source electrode and the drain electrode and surrounds the source electrode in a ring form; the second dielectric layer is located above the first dielectric layer and overlies the source electrode, the drain electrode and the gate electrodes, and a material of the second dielectric layer is one of Si N, SiO 2 and SiON or is a multilayer str u cture which is combined by two or more of them, the second dielectric layer has a thickness of 300 nm to 500 nm. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the second dielectric layer above a partial region of the source electrode, the drain electrode and the gate electrodes is removed to form through holes, shapes of the through holes is one of a square, a rectangle, and a circle, and widths of the through holes not exceeding sizes of the partial region of the source electrode, the drain electrode and the gate electrodes, and areas of the through holes is smaller than areas of the partial region of the source electrode, the drain electrode and the gate electrodes. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 1, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in se quence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing I CP etching to remove the AlGaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the A l GaN ba rr ier layer, removing the AlGaN ba rr ier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, SiO 2, Si O N, Ga₂ O 3, A 1 2 0 3, A l N, HfO 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nmn to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode m etal fi lm by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source elect r ode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal a re in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of S iN, SiO 2, SiON, or is the multilayer structure which is combined by them; the second dielectric layer has the thickness of 300 nm to 500 n m; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PE C VD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes cor r esponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Canceled
A method of preparing the GaN-based microwave power device with the large gate width according to claim 3, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an A I GaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojun c tion epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the AlGaN/GaN heterojun c tion outside the active region, and an depth of the etching is greater than the A l GaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojun c tion epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si O 2, SiON, Ga₂ 0 3, A 1 2 0 3, A I N, HfO 2, or the multilay er structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate elect r ode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate elect r ode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source elect r ode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the A l GaN/GaN heterojun c tion epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma en h anced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, de f ining a pattern of the through holes corresponding to the positions of the source electrodes, the drain e lectrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then fo rm ing the interconnect metal pad by lift-off process. Withdrawn
The GaN-based microwave power device with the large gate width according to claim [[1]] 7, wherein the interconnect metal electrode pad is respectively connected the source electrode, the drain electrode and the gate electrodes through the through holes in the second dielectric layer, and respectively forms a source electrode, a drain electrode, and a gate electrode which are used for device electrical performance testing and packaging; when the interconnect metal electrode pad is connected to the source electrode, the second dielectric layer is used as a dielectric bridge, and crosses over the gate electrode and the drain electrode. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 8, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the A l GaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the AlGaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the Al GaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si₀ 2, SiON, Ga 2 0 3, A 1 2 0 3, A I N, Hf O 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 nm; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PE C VD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then fo rm ing the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes corresponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing I CP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interco nn ect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based microwave power HEMT with large gate width
Materials described outside the worked examples.
SiN
SiO₂
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 300–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,069,787Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A GaN-based microwave power device with a large gate width, wherein the device comprises: an A I GaN/GaN heterojunction epitaxial layer; a first dielectric layer overlying the AlGaN/GaN heterojunction epitaxial layer; a strip-like source electrode; a drain electrode distributed in a shape of a fishbone, wherein the drain electrode comprises a f i rst drain electrode located at a fish ridge of the fishbone and a plu r ality of second drain electrodes located at fish bones of the fishbone, and all of the second drain electrodes are connected together by the first drain electrode in the middle; a plurality of annular gate electrodes, wherein the gate electrodes are disposed on two sides of the first drain electrode in a symmetrical manner, and the gate electrodes disposed on one side of the first drain electrode are arranged along an extending direction of the first drain electrode; a second dielectric layer; and an interconnect metal electrode pad, wherein the second dielectric layer separates the gate electrodes and a portion of the interconnect metal electrode pad which connects the source electrode, and the second dielectric layer separates the drain electrode and the portion of the interconnect metal electrode pad, wherein the first dielectric layer overlying the AlGaN/GaN hetero j unction epitaxial la y er is one of SiN, SiO 2, SiON, Ga 2 O 3, A 1 2 0 3, A l N, and HfO 2, or is a multilayer structure which is combined by two or more of them, and the firs t dielectric layer has a thickness of 10 nm to 50 n m. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the AlGaN/GaN heterojunction epitaxial layer comprises a substrate, a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, a I GaN barrier layer from bottom to top; wherein a material of the substrate is sapphire, silicon or silicon carbide; the nitride nucleation layer is GaN or Al N; the nitride buffer layer is one or more of GaN, AlGaN, compositionally graded AlGaN; and a two-dimensional electron gas is provided between the GaN channel layer and the A l GaN barrier layer. Previously presented
The GaN-based microwave power device with the large gate width according to claim 1, wherein the source electrode and the drain electrode penetrate the entire first dielectric layer and are in contact with the A l GaN barrier layer; and a material forming the source electrode and the drain electrode is a Ti/Al m ultilayer metal system; the source electrode and the drain electrode are in ohmic contact with the A l GaN barrier layer by high temperature annealing. Previously presented
(currently a m ended) The G aN-based microwave power device with the large gate width according to claim 1, wherein a plurality of strip-like source electrodes are distributed in parallel on a surface of the AlGaN/GaN heterojunction epitaxial layer to fo rm a plurality of gate finger units; the drain electrode is distributed on the surface of the AlGaN/GaN heterojunction epitaxial layer,., each second drain electrode [[,]] is parallel to the source electrode, and.. see el d re-eeftneet ethe-b A e d -ri each second drain electrode together with one source electrode[[,]] for ms one gate finger unit, and all of the second drain electrodes and the source electrodes constitute a plurality of gate finger units. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the gate electrodes are [[is]] located above the first dielectric layer, a bottom of the gate electrodes is in contact with the first dielectric layer, the first dielectric layer is located between the gate electrodes and the AlGaN/GaN heterojunction epitaxial layer; a material forming the gate electrodes is a Ni/Au multilayer metal system with good conductivity; [[the]] each gate electrode is distributed between the source electrode and the drain electrode and surrounds the source electrode in a ring form; the second dielectric layer is located above the first dielectric layer and overlies the source electrode, the drain electrode and the gate electrodes, and a material of the second dielectric layer is one of Si N, SiO 2 and SiON or is a multilayer str u cture which is combined by two or more of them, the second dielectric layer has a thickness of 300 nm to 500 nm. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the second dielectric layer above a partial region of the source electrode, the drain electrode and the gate electrodes is removed to form through holes, shapes of the through holes is one of a square, a rectangle, and a circle, and widths of the through holes not exceeding sizes of the partial region of the source electrode, the drain electrode and the gate electrodes, and areas of the through holes is smaller than areas of the partial region of the source electrode, the drain electrode and the gate electrodes. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 1, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in se quence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing I CP etching to remove the AlGaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the A l GaN ba rr ier layer, removing the AlGaN ba rr ier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, SiO 2, Si O N, Ga₂ O 3, A 1 2 0 3, A l N, HfO 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nmn to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode m etal fi lm by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source elect r ode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal a re in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of S iN, SiO 2, SiON, or is the multilayer structure which is combined by them; the second dielectric layer has the thickness of 300 nm to 500 n m; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PE C VD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes cor r esponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Canceled
A method of preparing the GaN-based microwave power device with the large gate width according to claim 3, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an A I GaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojun c tion epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the AlGaN/GaN heterojun c tion outside the active region, and an depth of the etching is greater than the A l GaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojun c tion epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si O 2, SiON, Ga₂ 0 3, A 1 2 0 3, A I N, HfO 2, or the multilay er structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate elect r ode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate elect r ode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source elect r ode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the A l GaN/GaN heterojun c tion epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma en h anced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, de f ining a pattern of the through holes corresponding to the positions of the source electrodes, the drain e lectrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then fo rm ing the interconnect metal pad by lift-off process. Withdrawn
The GaN-based microwave power device with the large gate width according to claim [[1]] 7, wherein the interconnect metal electrode pad is respectively connected the source electrode, the drain electrode and the gate electrodes through the through holes in the second dielectric layer, and respectively forms a source electrode, a drain electrode, and a gate electrode which are used for device electrical performance testing and packaging; when the interconnect metal electrode pad is connected to the source electrode, the second dielectric layer is used as a dielectric bridge, and crosses over the gate electrode and the drain electrode. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 8, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the A l GaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the AlGaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the Al GaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si₀ 2, SiON, Ga 2 0 3, A 1 2 0 3, A I N, Hf O 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 nm; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PE C VD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then fo rm ing the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes corresponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing I CP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interco nn ect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based microwave power HEMT with large gate width
Materials described outside the worked examples.
SiN
SiO₂
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 300–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,069,787Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A GaN-based microwave power device with a large gate width, wherein the device comprises: an A I GaN/GaN heterojunction epitaxial layer; a first dielectric layer overlying the AlGaN/GaN heterojunction epitaxial layer; a strip-like source electrode; a drain electrode distributed in a shape of a fishbone, wherein the drain electrode comprises a f i rst drain electrode located at a fish ridge of the fishbone and a plu r ality of second drain electrodes located at fish bones of the fishbone, and all of the second drain electrodes are connected together by the first drain electrode in the middle; a plurality of annular gate electrodes, wherein the gate electrodes are disposed on two sides of the first drain electrode in a symmetrical manner, and the gate electrodes disposed on one side of the first drain electrode are arranged along an extending direction of the first drain electrode; a second dielectric layer; and an interconnect metal electrode pad, wherein the second dielectric layer separates the gate electrodes and a portion of the interconnect metal electrode pad which connects the source electrode, and the second dielectric layer separates the drain electrode and the portion of the interconnect metal electrode pad, wherein the first dielectric layer overlying the AlGaN/GaN hetero j unction epitaxial la y er is one of SiN, SiO 2, SiON, Ga 2 O 3, A 1 2 0 3, A l N, and HfO 2, or is a multilayer structure which is combined by two or more of them, and the firs t dielectric layer has a thickness of 10 nm to 50 n m. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the AlGaN/GaN heterojunction epitaxial layer comprises a substrate, a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, a I GaN barrier layer from bottom to top; wherein a material of the substrate is sapphire, silicon or silicon carbide; the nitride nucleation layer is GaN or Al N; the nitride buffer layer is one or more of GaN, AlGaN, compositionally graded AlGaN; and a two-dimensional electron gas is provided between the GaN channel layer and the A l GaN barrier layer. Previously presented
The GaN-based microwave power device with the large gate width according to claim 1, wherein the source electrode and the drain electrode penetrate the entire first dielectric layer and are in contact with the A l GaN barrier layer; and a material forming the source electrode and the drain electrode is a Ti/Al m ultilayer metal system; the source electrode and the drain electrode are in ohmic contact with the A l GaN barrier layer by high temperature annealing. Previously presented
(currently a m ended) The G aN-based microwave power device with the large gate width according to claim 1, wherein a plurality of strip-like source electrodes are distributed in parallel on a surface of the AlGaN/GaN heterojunction epitaxial layer to fo rm a plurality of gate finger units; the drain electrode is distributed on the surface of the AlGaN/GaN heterojunction epitaxial layer,., each second drain electrode [[,]] is parallel to the source electrode, and.. see el d re-eeftneet ethe-b A e d -ri each second drain electrode together with one source electrode[[,]] for ms one gate finger unit, and all of the second drain electrodes and the source electrodes constitute a plurality of gate finger units. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the gate electrodes are [[is]] located above the first dielectric layer, a bottom of the gate electrodes is in contact with the first dielectric layer, the first dielectric layer is located between the gate electrodes and the AlGaN/GaN heterojunction epitaxial layer; a material forming the gate electrodes is a Ni/Au multilayer metal system with good conductivity; [[the]] each gate electrode is distributed between the source electrode and the drain electrode and surrounds the source electrode in a ring form; the second dielectric layer is located above the first dielectric layer and overlies the source electrode, the drain electrode and the gate electrodes, and a material of the second dielectric layer is one of Si N, SiO 2 and SiON or is a multilayer str u cture which is combined by two or more of them, the second dielectric layer has a thickness of 300 nm to 500 nm. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the second dielectric layer above a partial region of the source electrode, the drain electrode and the gate electrodes is removed to form through holes, shapes of the through holes is one of a square, a rectangle, and a circle, and widths of the through holes not exceeding sizes of the partial region of the source electrode, the drain electrode and the gate electrodes, and areas of the through holes is smaller than areas of the partial region of the source electrode, the drain electrode and the gate electrodes. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 1, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in se quence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing I CP etching to remove the AlGaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the A l GaN ba rr ier layer, removing the AlGaN ba rr ier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, SiO 2, Si O N, Ga₂ O 3, A 1 2 0 3, A l N, HfO 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nmn to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode m etal fi lm by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source elect r ode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal a re in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of S iN, SiO 2, SiON, or is the multilayer structure which is combined by them; the second dielectric layer has the thickness of 300 nm to 500 n m; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PE C VD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes cor r esponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Canceled
A method of preparing the GaN-based microwave power device with the large gate width according to claim 3, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an A I GaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojun c tion epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the AlGaN/GaN heterojun c tion outside the active region, and an depth of the etching is greater than the A l GaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojun c tion epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si O 2, SiON, Ga₂ 0 3, A 1 2 0 3, A I N, HfO 2, or the multilay er structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate elect r ode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate elect r ode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source elect r ode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the A l GaN/GaN heterojun c tion epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma en h anced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, de f ining a pattern of the through holes corresponding to the positions of the source electrodes, the drain e lectrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then fo rm ing the interconnect metal pad by lift-off process. Withdrawn
The GaN-based microwave power device with the large gate width according to claim [[1]] 7, wherein the interconnect metal electrode pad is respectively connected the source electrode, the drain electrode and the gate electrodes through the through holes in the second dielectric layer, and respectively forms a source electrode, a drain electrode, and a gate electrode which are used for device electrical performance testing and packaging; when the interconnect metal electrode pad is connected to the source electrode, the second dielectric layer is used as a dielectric bridge, and crosses over the gate electrode and the drain electrode. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 8, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the A l GaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the AlGaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the Al GaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si₀ 2, SiON, Ga 2 0 3, A 1 2 0 3, A I N, Hf O 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 nm; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PE C VD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then fo rm ing the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes corresponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing I CP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interco nn ect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based microwave power HEMT with large gate width
Materials described outside the worked examples.
SiN
SiO₂
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 300–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,069,787Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A GaN-based microwave power device with a large gate width, wherein the device comprises: an A I GaN/GaN heterojunction epitaxial layer; a first dielectric layer overlying the AlGaN/GaN heterojunction epitaxial layer; a strip-like source electrode; a drain electrode distributed in a shape of a fishbone, wherein the drain electrode comprises a f i rst drain electrode located at a fish ridge of the fishbone and a plu r ality of second drain electrodes located at fish bones of the fishbone, and all of the second drain electrodes are connected together by the first drain electrode in the middle; a plurality of annular gate electrodes, wherein the gate electrodes are disposed on two sides of the first drain electrode in a symmetrical manner, and the gate electrodes disposed on one side of the first drain electrode are arranged along an extending direction of the first drain electrode; a second dielectric layer; and an interconnect metal electrode pad, wherein the second dielectric layer separates the gate electrodes and a portion of the interconnect metal electrode pad which connects the source electrode, and the second dielectric layer separates the drain electrode and the portion of the interconnect metal electrode pad, wherein the first dielectric layer overlying the AlGaN/GaN hetero j unction epitaxial la y er is one of SiN, SiO 2, SiON, Ga 2 O 3, A 1 2 0 3, A l N, and HfO 2, or is a multilayer structure which is combined by two or more of them, and the firs t dielectric layer has a thickness of 10 nm to 50 n m. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the AlGaN/GaN heterojunction epitaxial layer comprises a substrate, a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, a I GaN barrier layer from bottom to top; wherein a material of the substrate is sapphire, silicon or silicon carbide; the nitride nucleation layer is GaN or Al N; the nitride buffer layer is one or more of GaN, AlGaN, compositionally graded AlGaN; and a two-dimensional electron gas is provided between the GaN channel layer and the A l GaN barrier layer. Previously presented
The GaN-based microwave power device with the large gate width according to claim 1, wherein the source electrode and the drain electrode penetrate the entire first dielectric layer and are in contact with the A l GaN barrier layer; and a material forming the source electrode and the drain electrode is a Ti/Al m ultilayer metal system; the source electrode and the drain electrode are in ohmic contact with the A l GaN barrier layer by high temperature annealing. Previously presented
(currently a m ended) The G aN-based microwave power device with the large gate width according to claim 1, wherein a plurality of strip-like source electrodes are distributed in parallel on a surface of the AlGaN/GaN heterojunction epitaxial layer to fo rm a plurality of gate finger units; the drain electrode is distributed on the surface of the AlGaN/GaN heterojunction epitaxial layer,., each second drain electrode [[,]] is parallel to the source electrode, and.. see el d re-eeftneet ethe-b A e d -ri each second drain electrode together with one source electrode[[,]] for ms one gate finger unit, and all of the second drain electrodes and the source electrodes constitute a plurality of gate finger units. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the gate electrodes are [[is]] located above the first dielectric layer, a bottom of the gate electrodes is in contact with the first dielectric layer, the first dielectric layer is located between the gate electrodes and the AlGaN/GaN heterojunction epitaxial layer; a material forming the gate electrodes is a Ni/Au multilayer metal system with good conductivity; [[the]] each gate electrode is distributed between the source electrode and the drain electrode and surrounds the source electrode in a ring form; the second dielectric layer is located above the first dielectric layer and overlies the source electrode, the drain electrode and the gate electrodes, and a material of the second dielectric layer is one of Si N, SiO 2 and SiON or is a multilayer str u cture which is combined by two or more of them, the second dielectric layer has a thickness of 300 nm to 500 nm. Currently amended
The GaN-based microwave power device with the large gate width according to claim 1, wherein the second dielectric layer above a partial region of the source electrode, the drain electrode and the gate electrodes is removed to form through holes, shapes of the through holes is one of a square, a rectangle, and a circle, and widths of the through holes not exceeding sizes of the partial region of the source electrode, the drain electrode and the gate electrodes, and areas of the through holes is smaller than areas of the partial region of the source electrode, the drain electrode and the gate electrodes. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 1, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in se quence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing I CP etching to remove the AlGaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the A l GaN ba rr ier layer, removing the AlGaN ba rr ier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, SiO 2, Si O N, Ga₂ O 3, A 1 2 0 3, A l N, HfO 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nmn to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode m etal fi lm by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source elect r ode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal a re in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of S iN, SiO 2, SiON, or is the multilayer structure which is combined by them; the second dielectric layer has the thickness of 300 nm to 500 n m; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PE C VD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes cor r esponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Canceled
A method of preparing the GaN-based microwave power device with the large gate width according to claim 3, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an A I GaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojun c tion epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the AlGaN/GaN heterojun c tion outside the active region, and an depth of the etching is greater than the A l GaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the AlGaN/GaN heterojun c tion epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si O 2, SiON, Ga₂ 0 3, A 1 2 0 3, A I N, HfO 2, or the multilay er structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 n m; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate elect r ode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate elect r ode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source elect r ode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then forming the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the A l GaN/GaN heterojun c tion epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma en h anced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, de f ining a pattern of the through holes corresponding to the positions of the source electrodes, the drain e lectrode and the gate electrode by photolithography process; and utilizing ICP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interconnect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then fo rm ing the interconnect metal pad by lift-off process. Withdrawn
The GaN-based microwave power device with the large gate width according to claim [[1]] 7, wherein the interconnect metal electrode pad is respectively connected the source electrode, the drain electrode and the gate electrodes through the through holes in the second dielectric layer, and respectively forms a source electrode, a drain electrode, and a gate electrode which are used for device electrical performance testing and packaging; when the interconnect metal electrode pad is connected to the source electrode, the second dielectric layer is used as a dielectric bridge, and crosses over the gate electrode and the drain electrode. Currently amended
A method of preparing the GaN-based microwave power device with the large gate width according to claim 8, comprising the steps of: 1) epitaxial process: epitaxially growing a nitride nucleation layer, a nitride buffer layer, a GaN channel layer, and an AlGaN barrier layer on a substrate in sequence and forming an AlGaN/GaN heterojunction epitaxial layer, by a metal organic vapor deposition method; 2) devices isolation: defining an active region by photolithography process, using a photoresist to overlie and protect the active region, and utilizing ICP etching to remove the A l GaN/GaN heterojunction outside the active region, and an depth of the etching is greater than the AlGaN barrier layer, removing the A l GaN barrier layer and a portion of the GaN channel layer to achieve isolation between different devices; 3) dielectric deposition process: depositing the first dielectric layer on the Al GaN/GaN heterojunction epitaxial layer, wherein the material of the first dielectric layer is one of SiN, Si₀ 2, SiON, Ga 2 0 3, A 1 2 0 3, A I N, Hf O 2, or the multilayer structure which is combined by them, and the first dielectric layer has the thickness of 10 nm to 50 nm; and a deposition manner of the first dielectric layer is one of metal organic chemical vapor deposition (MOCVD), plasma enhanced chemical vapor deposition (PE C VD), and low pressure chemical vapor deposition (LPCVD); 4) gate electrode process: depositing a gate electrode metal film on the first dielectric layer by means of electron beam evaporation or magnetron sputtering, and defining a pattern of the gate electrode on the gate electrode metal film by electron beam exposure process, etching the gate electrode metal film by means of ICP or RIE, removing the photoresist, and remaining the gate electrode; 5) source and drain electrode process: defining patterns of the source electrode and the drain electrode on the gate electrode metal film by negative photoresist photolithography process; completely etching and removing the first dielectric layer at positions of the patterns of the source electrode and the drain electrode by ICP; depositing a source and drain electrode metal film by means of electron beam evaporation or magnetron sputtering, a material of the metal film is a Ti/Al multilayer metal system; then fo rm ing the source electrode and the drain electrode by lift-off process; placing a sample under a nitrogen atmosphere and annealing the sample at a high temperature such that the source and drain electrode metal are in ohmic contact with the AlGaN/GaN heterojunction epitaxial layer; 6) dielectric deposition: depositing the second dielectric layer over the first dielectric layer and completely overlying the source electrode, the drain electrode and the gate electrode; wherein the material of the second dielectric layer is one of SiN, dielectric layer has the thickness of 300 nm to 500 nm; and a deposition manner of the second dielectric layer is plasma enhanced chemical vapor deposition (PECVD); 7) through hole etching process: on the second dielectric layer, defining a pattern of the through holes corresponding to the positions of the source electrodes, the drain electrode and the gate electrode by photolithography process; and utilizing I CP to etch the material of the second dielectric layer at the positions of the through holes such that the second dielectric layer at the positions of the through holes is completely removed and the electrodes below are exposed; 8) interco nn ect metal pad: defining a pattern of the interconnect metal pad by photolithography process; depositing the interconnect metal by electron beam evaporation; then forming the interconnect metal pad by lift-off process. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based microwave power HEMT with large gate width
Materials described outside the worked examples.
SiN
SiO₂
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 300–500 nm | — |
Thickness |
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