Patent
US 10,362,680PATTERNING OF GRAPHENE CIRCUITS ON FLEXIBLE SUBSTRATES
Kelvin Po Leung Pun
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,362,680Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; laminating a bonding film onto a first core dielectric substrate; roughening a surface of said bonding film; transferring said graphene layer onto roughened said surface of said bonding film; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 1 wherein said bonding film comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 1 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 1 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 1 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 1 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 1 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 1 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 1 wherein each of said first and second core dielectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 1 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; forming a bonding layer on a protective film and roughening a surface of said bonding layer; transferring said graphene layer onto roughened said surface of said bonding layer; thereafter removing said protective film and laminating said bonding layer to a first core dielectric substrate; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 11 wherein said bonding layer comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 11 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 11 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 11 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 11 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 11 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 11 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 11 wherein each of said first and second core die l ectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 11 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or nonconductive epoxy.
Layer stacks claimed or described, ordered top of device to substrate.
graphene circuit board
Materials described outside the worked examples.
graphene
bonding film
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
durability due to its thinner profile than the conventional circuit board. The thickness of this flexible circuit board can be thinner, down to 1 0p m. It also can be bent easily and can conform well to its final shape without bounce back. Although the preferred
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
core dielectric substrate thickness | 2–200 um | core dielectric substrate |
graphene pattern thickness | 0.3–3 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,362,680Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; laminating a bonding film onto a first core dielectric substrate; roughening a surface of said bonding film; transferring said graphene layer onto roughened said surface of said bonding film; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 1 wherein said bonding film comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 1 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 1 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 1 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 1 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 1 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 1 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 1 wherein each of said first and second core dielectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 1 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; forming a bonding layer on a protective film and roughening a surface of said bonding layer; transferring said graphene layer onto roughened said surface of said bonding layer; thereafter removing said protective film and laminating said bonding layer to a first core dielectric substrate; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 11 wherein said bonding layer comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 11 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 11 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 11 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 11 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 11 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 11 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 11 wherein each of said first and second core die l ectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 11 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or nonconductive epoxy.
Layer stacks claimed or described, ordered top of device to substrate.
graphene circuit board
Materials described outside the worked examples.
graphene
bonding film
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
durability due to its thinner profile than the conventional circuit board. The thickness of this flexible circuit board can be thinner, down to 1 0p m. It also can be bent easily and can conform well to its final shape without bounce back. Although the preferred
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
core dielectric substrate thickness | 2–200 um | core dielectric substrate |
graphene pattern thickness | 0.3–3 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,362,680Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; laminating a bonding film onto a first core dielectric substrate; roughening a surface of said bonding film; transferring said graphene layer onto roughened said surface of said bonding film; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 1 wherein said bonding film comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 1 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 1 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 1 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 1 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 1 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 1 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 1 wherein each of said first and second core dielectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 1 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; forming a bonding layer on a protective film and roughening a surface of said bonding layer; transferring said graphene layer onto roughened said surface of said bonding layer; thereafter removing said protective film and laminating said bonding layer to a first core dielectric substrate; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 11 wherein said bonding layer comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 11 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 11 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 11 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 11 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 11 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 11 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 11 wherein each of said first and second core die l ectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 11 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or nonconductive epoxy.
Layer stacks claimed or described, ordered top of device to substrate.
graphene circuit board
Materials described outside the worked examples.
graphene
bonding film
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
durability due to its thinner profile than the conventional circuit board. The thickness of this flexible circuit board can be thinner, down to 1 0p m. It also can be bent easily and can conform well to its final shape without bounce back. Although the preferred
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
core dielectric substrate thickness | 2–200 um | core dielectric substrate |
graphene pattern thickness | 0.3–3 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,362,680Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; laminating a bonding film onto a first core dielectric substrate; roughening a surface of said bonding film; transferring said graphene layer onto roughened said surface of said bonding film; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 1 wherein said bonding film comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 1 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 1 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 1 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 1 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 1 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 1 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 1 wherein each of said first and second core dielectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 1 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or non-conductive epoxy.
A method for forming a graphene circuit board comprising: growing a graphene layer on a metal foil; forming a bonding layer on a protective film and roughening a surface of said bonding layer; transferring said graphene layer onto roughened said surface of said bonding layer; thereafter removing said protective film and laminating said bonding layer to a first core dielectric substrate; thereafter etching away said metal foil; thereafter oxygen plasma etching said graphene layer to form graphene circuits on said first core dielectric substrate; and thereafter bonding together said first core dielectric substrate having said graphene circuits thereon with a second core dielectric substrate wherein said graphene circuits are on a side facing said second core dielectric substrate and wherein an air gap is left therebetween.
The method according to claim 11 wherein said bonding layer comprises a thermoset adhesive film reinforced with fibers.
The method according to claim 11 wherein said roughening said surface of said bonding film comprises treating said surface with potassium permanganate.
The method according to claim 11 wherein said second core dielectric substrate has graphene patterns formed thereon facing said first core dielectric substrate.
The method according to claim 11 said second core dielectric substrate has a conductive layer on a side facing said first core dielectric substrate wherein said conductive layer comprises Copper, Gold, TiW, Silver, Palladium, or Aluminum.
The method according to claim 11 wherein said graphene patterns are electrodes or electrolytes.
The method according to claim 11 wherein said first and second core dielectric substrates comprise Polyimide (P I), Liquid Crystal Polymer (LCP), polyester (PET), polyethylene-naphthalate (PEN), laminates of epoxies or Bismaleimide-Triazine resin (BT), Teflon, modified Teflon, ceramic, or Cyclo-olefin Polymers (COP).
The method according to claim 11 wherein at least one of said first and second core dielectric substrates further comprises one or more conductive metal layers on a side of said substrate opposite to said side having said graphene patterns thereon, wherein said conductive metal layers comprise copper (Cu), Silver (Ag), Palladium (Pd), Aluminium (A l), Titanium-Tungsten (TiW), and/or Gold (Au).
The method according to claim 11 wherein each of said first and second core die l ectric substrates has a thickness of between about 2 and 200 p m and wherein said graphene patterns have a thickness of between about 0.3 and 3 nm.
The method according to claim 11 wherein said bonding of said first and second core substrates uses pressure-sensitive adhesive, thermal-sensitive adhesive, conductive epoxy, or nonconductive epoxy.
Layer stacks claimed or described, ordered top of device to substrate.
graphene circuit board
Materials described outside the worked examples.
graphene
bonding film
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
durability due to its thinner profile than the conventional circuit board. The thickness of this flexible circuit board can be thinner, down to 1 0p m. It also can be bent easily and can conform well to its final shape without bounce back. Although the preferred
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
core dielectric substrate thickness | 2–200 um | core dielectric substrate |
graphene pattern thickness | 0.3–3 nm |
Related documents with shared materials, methods, properties, or citations.
core dielectric substrate
potassium permanganate
KMnO₄
conductive metal layer
metal foil
ABF (Ajinomoto Bonding Film)
Dupont FR 0100 bonding film
copper foil
Cu
methane
CH₄
FeCl₃
polyester (PET) base layer
bonding film coefficient of thermal expansion | ≤ 46 ppm/K | bonding film |
bonding film glass transition temperature | ≥ 200 degC | bonding film |
Thickness | 2–2000 µm | — |
Thickness | 5–35 µm | — |
core dielectric substrate
potassium permanganate
KMnO₄
conductive metal layer
metal foil
ABF (Ajinomoto Bonding Film)
Dupont FR 0100 bonding film
copper foil
Cu
methane
CH₄
FeCl₃
polyester (PET) base layer
bonding film coefficient of thermal expansion | ≤ 46 ppm/K | bonding film |
bonding film glass transition temperature | ≥ 200 degC | bonding film |
Thickness | 2–2000 µm | — |
Thickness | 5–35 µm | — |
core dielectric substrate
potassium permanganate
KMnO₄
conductive metal layer
metal foil
ABF (Ajinomoto Bonding Film)
Dupont FR 0100 bonding film
copper foil
Cu
methane
CH₄
FeCl₃
polyester (PET) base layer
bonding film coefficient of thermal expansion | ≤ 46 ppm/K | bonding film |
bonding film glass transition temperature | ≥ 200 degC | bonding film |
Thickness | 2–2000 µm | — |
Thickness | 5–35 µm | — |
core dielectric substrate
potassium permanganate
KMnO₄
conductive metal layer
metal foil
ABF (Ajinomoto Bonding Film)
Dupont FR 0100 bonding film
copper foil
Cu
methane
CH₄
FeCl₃
polyester (PET) base layer
bonding film coefficient of thermal expansion | ≤ 46 ppm/K | bonding film |
bonding film glass transition temperature | ≥ 200 degC | bonding film |
Thickness | 2–2000 µm | — |
Thickness | 5–35 µm | — |