An electronic circuit comprising a rectifier, said rectifier comprising a layered article comprising: (a) a first layer comprising silicon; and (b) a second layer comprising gallium arsenide said gallium arsenide of said first layer being layered onto said silicon of said second layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said silicon has a smoothness variation less than about 100 nanometers.

A tunable photodiode comprising: (a) a diode structure [having an input and output contacts, and] comprising: (i) A first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said diode structure having an input and an output in contact therewith; said gallium arsenide of said [first] second layer being layered onto said silicon of said [second] first layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said layer of silicon [in] has a smoothness variation [is] less than 100 nanometers; and (b) an adjustable source of electrical potential connected to said input and output contacts, whereby the peak wavelength sensitivity of said diode structure to incident light thereupon [may be] being tuned through application of said electrical potential.

- Application No. 11/973,680 (H1970910.1 } 4 3. A memory device comprising: (a) a field effect transistor comprising a GaAs/Si composite comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A logic device comprising: (a) one or more input lines associated with one or more output lines according to a logic algorithm; (b) at least one signal input device associated with said one or more input lines, and least one signal output device associated with said one or more output lines; at least one of said at least one signal input device and at least one signal output device being optical or electrical; and (c) a logic algorithm device for associating said one or more input lines associated with one or more output lines, said device comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A multiplexer device comprising: (a) a plurality of input lines associated with a respective number of data sources, and an output line, and (b) a data selector; {H1970910.1 } 5 Application No. 11/973,680 each of said input lines adapted to transfer data to said output line when said data selector selects it, said data selector comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

An electronic circuit comprising a rectifier, said rectifier comprising a layered article comprising: (a) a first layer comprising silicon; and (b) a second layer comprising gallium arsenide said gallium arsenide of said first layer being layered onto said silicon of said second layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said silicon has a smoothness variation less than about 100 nanometers.

A tunable photodiode comprising: (a) a diode structure [having an input and output contacts, and] comprising: (i) A first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said diode structure having an input and an output in contact therewith; said gallium arsenide of said [first] second layer being layered onto said silicon of said [second] first layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said layer of silicon [in] has a smoothness variation [is] less than 100 nanometers; and (b) an adjustable source of electrical potential connected to said input and output contacts, whereby the peak wavelength sensitivity of said diode structure to incident light thereupon [may be] being tuned through application of said electrical potential.

- Application No. 11/973,680 (H1970910.1 } 4 3. A memory device comprising: (a) a field effect transistor comprising a GaAs/Si composite comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A logic device comprising: (a) one or more input lines associated with one or more output lines according to a logic algorithm; (b) at least one signal input device associated with said one or more input lines, and least one signal output device associated with said one or more output lines; at least one of said at least one signal input device and at least one signal output device being optical or electrical; and (c) a logic algorithm device for associating said one or more input lines associated with one or more output lines, said device comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A multiplexer device comprising: (a) a plurality of input lines associated with a respective number of data sources, and an output line, and (b) a data selector; {H1970910.1 } 5 Application No. 11/973,680 each of said input lines adapted to transfer data to said output line when said data selector selects it, said data selector comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

An electronic circuit comprising a rectifier, said rectifier comprising a layered article comprising: (a) a first layer comprising silicon; and (b) a second layer comprising gallium arsenide said gallium arsenide of said first layer being layered onto said silicon of said second layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said silicon has a smoothness variation less than about 100 nanometers.

A tunable photodiode comprising: (a) a diode structure [having an input and output contacts, and] comprising: (i) A first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said diode structure having an input and an output in contact therewith; said gallium arsenide of said [first] second layer being layered onto said silicon of said [second] first layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said layer of silicon [in] has a smoothness variation [is] less than 100 nanometers; and (b) an adjustable source of electrical potential connected to said input and output contacts, whereby the peak wavelength sensitivity of said diode structure to incident light thereupon [may be] being tuned through application of said electrical potential.

- Application No. 11/973,680 (H1970910.1 } 4 3. A memory device comprising: (a) a field effect transistor comprising a GaAs/Si composite comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A logic device comprising: (a) one or more input lines associated with one or more output lines according to a logic algorithm; (b) at least one signal input device associated with said one or more input lines, and least one signal output device associated with said one or more output lines; at least one of said at least one signal input device and at least one signal output device being optical or electrical; and (c) a logic algorithm device for associating said one or more input lines associated with one or more output lines, said device comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A multiplexer device comprising: (a) a plurality of input lines associated with a respective number of data sources, and an output line, and (b) a data selector; {H1970910.1 } 5 Application No. 11/973,680 each of said input lines adapted to transfer data to said output line when said data selector selects it, said data selector comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

An electronic circuit comprising a rectifier, said rectifier comprising a layered article comprising: (a) a first layer comprising silicon; and (b) a second layer comprising gallium arsenide said gallium arsenide of said first layer being layered onto said silicon of said second layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said silicon has a smoothness variation less than about 100 nanometers.

A tunable photodiode comprising: (a) a diode structure [having an input and output contacts, and] comprising: (i) A first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said diode structure having an input and an output in contact therewith; said gallium arsenide of said [first] second layer being layered onto said silicon of said [second] first layer in a substantially stoichiometric ratio, and whereby said layer of gallium arsenide deposited upon said layer of silicon [in] has a smoothness variation [is] less than 100 nanometers; and (b) an adjustable source of electrical potential connected to said input and output contacts, whereby the peak wavelength sensitivity of said diode structure to incident light thereupon [may be] being tuned through application of said electrical potential.

- Application No. 11/973,680 (H1970910.1 } 4 3. A memory device comprising: (a) a field effect transistor comprising a GaAs/Si composite comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A logic device comprising: (a) one or more input lines associated with one or more output lines according to a logic algorithm; (b) at least one signal input device associated with said one or more input lines, and least one signal output device associated with said one or more output lines; at least one of said at least one signal input device and at least one signal output device being optical or electrical; and (c) a logic algorithm device for associating said one or more input lines associated with one or more output lines, said device comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.

A multiplexer device comprising: (a) a plurality of input lines associated with a respective number of data sources, and an output line, and (b) a data selector; {H1970910.1 } 5 Application No. 11/973,680 each of said input lines adapted to transfer data to said output line when said data selector selects it, said data selector comprising: (i) a first layer comprising silicon; and (ii) a second layer comprising gallium arsenide; said gallium arsenide of said first layer being layered onto said silicon of said second layer uniformly and in a substantially stoichiometric ratio.