Patent
US 10,663,766double-layer graphene plasmonic slot electro-optical modulator
silicon dioxide
SiO₂
aluminum oxide
Al₂O₃
hafnium oxide
HfO₂
plasmonic metal (silver, gold, aluminum, titanium nitride)
chromium
Cr
substrate material (Si, InAs, InGaAs, InP)
FIG. 2A shows the performance of presented single layer graphene plasmonic slot modulator in term of extinction ratio, according to an embodiment of the …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
double-layer graphene plasmonic slot electro-optical modulator
silicon dioxide
SiO₂
aluminum oxide
Al₂O₃
hafnium oxide
HfO₂
plasmonic metal (silver, gold, aluminum, titanium nitride)
chromium
Cr
substrate material (Si, InAs, InGaAs, InP)
FIG. 2A shows the performance of presented single layer graphene plasmonic slot modulator in term of extinction ratio, according to an embodiment of the …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
double-layer graphene plasmonic slot electro-optical modulator
silicon dioxide
SiO₂
aluminum oxide
Al₂O₃
hafnium oxide
HfO₂
plasmonic metal (silver, gold, aluminum, titanium nitride)
chromium
Cr
substrate material (Si, InAs, InGaAs, InP)
FIG. 2A shows the performance of presented single layer graphene plasmonic slot modulator in term of extinction ratio, according to an embodiment of the …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
double-layer graphene plasmonic slot electro-optical modulator
silicon dioxide
SiO₂
aluminum oxide
Al₂O₃
hafnium oxide
HfO₂
plasmonic metal (silver, gold, aluminum, titanium nitride)
chromium
Cr
substrate material (Si, InAs, InGaAs, InP)
FIG. 2A shows the performance of presented single layer graphene plasmonic slot modulator in term of extinction ratio, according to an embodiment of the …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 3A embodiment may be favorable to the FIG. l A embodiment for a number of reasons. For example, by integrating more layers of graphene into the device is …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …
FIG. 6 shows the experimental result of source-drain IV curve of a graphene transistor, demonstrates that before and after e-beam lithography process, the …