steps:provide SiC or sapphire substrate, form N-type and P-type GaN semiconductor layers on upper surface, form P-type body region in N-type semiconductor layer, form body electrode on upper surface connected to body region, form N-type emitter region in body region connected to body electrode, form dielectric layer on upper surface, form gate on dielectric layer, form holes through substrate by laser etching, form conductive plugs in holes to create conductive array, form collector on lower surface electrically connected to conductive array
device:vertical insulated gate bipolar transistor (IGBT)