Patent
US 11,335,557MULTI-DEPOSITION PROCESS FOR HIGH QUALITY GALLIUM NITRIDE DEVICE MANUFACTURING
Vladimir Odnoblyudov, Cemn Basceri
Qromis, Inc.·US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 11,335,557Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
FIG. 2. Electrodes 160, insulation layers 163, interconnects 162 are formed after completion of the iterative selective epi process in some embodiments. [0036]
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
FIG. 6 is a simplified flowchart illustrating a method of forming a I II -N-based epitaxial structure according to an embodiment of the present invention. The …
FIG. 7. Although only two engineered layers 114 and 115 are illustrated, embodiments of the present invention are not limited to two layers and may include …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A group III -nitride (III-N)-based electronic device comprising: an engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; a single crystalline silicon layer coupled to the engineered substrate; a metalorganic chemical vapor deposition (MOCVD) I II -N-based epitaxial layer coupled to the single crystalline silicon layer; and a hybrid vapor phase epitaxy (H V PE) I II -N-based epitaxial layer coupled to the MOCVD epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein the engineered substrate further comprises: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being nonmetallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer encapsulates the engineered substrate. Original
The I II -N-based electronic device of claim 1 further comprising: a second MOCVD I II -N-based epitaxial layer coupled to the H V PE I II -N-based epitaxial layer; and a second H V PE I II -N-based epitaxial layer coupled to the second MOCVD I II -N- based epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein: the MOCVD I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN; and the H V PE I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN. Original
A method of fabricating a epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; growing a first epitaxial layer coupled to the engineered substrate using a first deposition process; and growing a second epitaxial layer coupled to the first epitaxial layer using a second deposition process. Original
The method of claim 7 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 7 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 7 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 7 further comprising: growing a third epitaxial layer coupled to the second epitaxial layer using the first deposition process; and growing a fourth epitaxial layer coupled to the third epitaxial layer using the second deposition process. Original
The method of claim 7 wherein the first deposition process comprises a metalorganic chemical vapor deposition (MOCVD) process and the second deposition process comprises a hybrid vapor phase epitaxy (H V PE) process. Original
The method of claim 7 wherein: the first epitaxial layer comprises at least one of A l N, GaN, or A l GaN; and the second epitaxial layer comprises at least one of A l N, GaN, or A l GaN. Original
A method of forming a GaN-based epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; depositing a first GaN-based epitaxial layer coupled to the single crystalline silicon layer using a metalorganic chemical vapor deposition (MOCVD) process; and depositing a second GaN-based epitaxial layer coupled to the first GaN-based epitaxial layer using a hybrid vapor phase epitaxy (H V PE) deposition process. Original
The method of claim 14 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 14 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 14 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 14 further comprising: depositing an additional MOCVD GaN-based epitaxial layer using an MOCVD process: depositing an additional H V PE GaN-based epitaxial layer using a H VPE deposition process; and repeating depositing an additional MOCVD GaN-based epitaxial layer and depositing an additional H V PE GaN-based epitaxial layer a predetermined number of times. Original
The method of claim 14 wherein: the engineered substrate is characterized by a substrate coefficient of thermal expansion (CTE); the first GaN-based epitaxial layer is characterized by a first CTE; the second GaN-based epitaxial layer is characterized by a second CTE; and the substrate CTE, the first CTE, and the second CTE are substantially equal. Original
The method of claim 14 wherein: the first GaN-based epitaxial layer comprises Al xGai-x N; and the second GaN-based epitaxial layer comprises Al xGai-xN. Original
Layer stacks claimed or described, ordered top of device to substrate.
group III-N-based electronic device on engineered substrate
Materials described outside the worked examples.
polycrystalline ceramic core
aluminum nitride (AlN) ceramic wafer
AlN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 25–1200 °C | — |
Thickness | ≤ 150 mm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,335,557Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
FIG. 2. Electrodes 160, insulation layers 163, interconnects 162 are formed after completion of the iterative selective epi process in some embodiments. [0036]
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
FIG. 6 is a simplified flowchart illustrating a method of forming a I II -N-based epitaxial structure according to an embodiment of the present invention. The …
FIG. 7. Although only two engineered layers 114 and 115 are illustrated, embodiments of the present invention are not limited to two layers and may include …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A group III -nitride (III-N)-based electronic device comprising: an engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; a single crystalline silicon layer coupled to the engineered substrate; a metalorganic chemical vapor deposition (MOCVD) I II -N-based epitaxial layer coupled to the single crystalline silicon layer; and a hybrid vapor phase epitaxy (H V PE) I II -N-based epitaxial layer coupled to the MOCVD epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein the engineered substrate further comprises: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being nonmetallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer encapsulates the engineered substrate. Original
The I II -N-based electronic device of claim 1 further comprising: a second MOCVD I II -N-based epitaxial layer coupled to the H V PE I II -N-based epitaxial layer; and a second H V PE I II -N-based epitaxial layer coupled to the second MOCVD I II -N- based epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein: the MOCVD I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN; and the H V PE I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN. Original
A method of fabricating a epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; growing a first epitaxial layer coupled to the engineered substrate using a first deposition process; and growing a second epitaxial layer coupled to the first epitaxial layer using a second deposition process. Original
The method of claim 7 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 7 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 7 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 7 further comprising: growing a third epitaxial layer coupled to the second epitaxial layer using the first deposition process; and growing a fourth epitaxial layer coupled to the third epitaxial layer using the second deposition process. Original
The method of claim 7 wherein the first deposition process comprises a metalorganic chemical vapor deposition (MOCVD) process and the second deposition process comprises a hybrid vapor phase epitaxy (H V PE) process. Original
The method of claim 7 wherein: the first epitaxial layer comprises at least one of A l N, GaN, or A l GaN; and the second epitaxial layer comprises at least one of A l N, GaN, or A l GaN. Original
A method of forming a GaN-based epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; depositing a first GaN-based epitaxial layer coupled to the single crystalline silicon layer using a metalorganic chemical vapor deposition (MOCVD) process; and depositing a second GaN-based epitaxial layer coupled to the first GaN-based epitaxial layer using a hybrid vapor phase epitaxy (H V PE) deposition process. Original
The method of claim 14 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 14 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 14 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 14 further comprising: depositing an additional MOCVD GaN-based epitaxial layer using an MOCVD process: depositing an additional H V PE GaN-based epitaxial layer using a H VPE deposition process; and repeating depositing an additional MOCVD GaN-based epitaxial layer and depositing an additional H V PE GaN-based epitaxial layer a predetermined number of times. Original
The method of claim 14 wherein: the engineered substrate is characterized by a substrate coefficient of thermal expansion (CTE); the first GaN-based epitaxial layer is characterized by a first CTE; the second GaN-based epitaxial layer is characterized by a second CTE; and the substrate CTE, the first CTE, and the second CTE are substantially equal. Original
The method of claim 14 wherein: the first GaN-based epitaxial layer comprises Al xGai-x N; and the second GaN-based epitaxial layer comprises Al xGai-xN. Original
Layer stacks claimed or described, ordered top of device to substrate.
group III-N-based electronic device on engineered substrate
Materials described outside the worked examples.
polycrystalline ceramic core
aluminum nitride (AlN) ceramic wafer
AlN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 25–1200 °C | — |
Thickness | ≤ 150 mm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,335,557Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
FIG. 2. Electrodes 160, insulation layers 163, interconnects 162 are formed after completion of the iterative selective epi process in some embodiments. [0036]
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
FIG. 6 is a simplified flowchart illustrating a method of forming a I II -N-based epitaxial structure according to an embodiment of the present invention. The …
FIG. 7. Although only two engineered layers 114 and 115 are illustrated, embodiments of the present invention are not limited to two layers and may include …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A group III -nitride (III-N)-based electronic device comprising: an engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; a single crystalline silicon layer coupled to the engineered substrate; a metalorganic chemical vapor deposition (MOCVD) I II -N-based epitaxial layer coupled to the single crystalline silicon layer; and a hybrid vapor phase epitaxy (H V PE) I II -N-based epitaxial layer coupled to the MOCVD epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein the engineered substrate further comprises: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being nonmetallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer encapsulates the engineered substrate. Original
The I II -N-based electronic device of claim 1 further comprising: a second MOCVD I II -N-based epitaxial layer coupled to the H V PE I II -N-based epitaxial layer; and a second H V PE I II -N-based epitaxial layer coupled to the second MOCVD I II -N- based epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein: the MOCVD I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN; and the H V PE I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN. Original
A method of fabricating a epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; growing a first epitaxial layer coupled to the engineered substrate using a first deposition process; and growing a second epitaxial layer coupled to the first epitaxial layer using a second deposition process. Original
The method of claim 7 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 7 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 7 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 7 further comprising: growing a third epitaxial layer coupled to the second epitaxial layer using the first deposition process; and growing a fourth epitaxial layer coupled to the third epitaxial layer using the second deposition process. Original
The method of claim 7 wherein the first deposition process comprises a metalorganic chemical vapor deposition (MOCVD) process and the second deposition process comprises a hybrid vapor phase epitaxy (H V PE) process. Original
The method of claim 7 wherein: the first epitaxial layer comprises at least one of A l N, GaN, or A l GaN; and the second epitaxial layer comprises at least one of A l N, GaN, or A l GaN. Original
A method of forming a GaN-based epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; depositing a first GaN-based epitaxial layer coupled to the single crystalline silicon layer using a metalorganic chemical vapor deposition (MOCVD) process; and depositing a second GaN-based epitaxial layer coupled to the first GaN-based epitaxial layer using a hybrid vapor phase epitaxy (H V PE) deposition process. Original
The method of claim 14 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 14 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 14 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 14 further comprising: depositing an additional MOCVD GaN-based epitaxial layer using an MOCVD process: depositing an additional H V PE GaN-based epitaxial layer using a H VPE deposition process; and repeating depositing an additional MOCVD GaN-based epitaxial layer and depositing an additional H V PE GaN-based epitaxial layer a predetermined number of times. Original
The method of claim 14 wherein: the engineered substrate is characterized by a substrate coefficient of thermal expansion (CTE); the first GaN-based epitaxial layer is characterized by a first CTE; the second GaN-based epitaxial layer is characterized by a second CTE; and the substrate CTE, the first CTE, and the second CTE are substantially equal. Original
The method of claim 14 wherein: the first GaN-based epitaxial layer comprises Al xGai-x N; and the second GaN-based epitaxial layer comprises Al xGai-xN. Original
Layer stacks claimed or described, ordered top of device to substrate.
group III-N-based electronic device on engineered substrate
Materials described outside the worked examples.
polycrystalline ceramic core
aluminum nitride (AlN) ceramic wafer
AlN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 25–1200 °C | — |
Thickness | ≤ 150 mm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,335,557Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
FIG. 2. Electrodes 160, insulation layers 163, interconnects 162 are formed after completion of the iterative selective epi process in some embodiments. [0036]
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
FIG. 6 is a simplified flowchart illustrating a method of forming a I II -N-based epitaxial structure according to an embodiment of the present invention. The …
FIG. 7. Although only two engineered layers 114 and 115 are illustrated, embodiments of the present invention are not limited to two layers and may include …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A group III -nitride (III-N)-based electronic device comprising: an engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; a single crystalline silicon layer coupled to the engineered substrate; a metalorganic chemical vapor deposition (MOCVD) I II -N-based epitaxial layer coupled to the single crystalline silicon layer; and a hybrid vapor phase epitaxy (H V PE) I II -N-based epitaxial layer coupled to the MOCVD epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein the engineered substrate further comprises: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being nonmetallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The I II -N-based electronic device of claim 1 wherein the conductive layer encapsulates the engineered substrate. Original
The I II -N-based electronic device of claim 1 further comprising: a second MOCVD I II -N-based epitaxial layer coupled to the H V PE I II -N-based epitaxial layer; and a second H V PE I II -N-based epitaxial layer coupled to the second MOCVD I II -N- based epitaxial layer. Original
The I II -N-based electronic device of claim 1 wherein: the MOCVD I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN; and the H V PE I II -N-based epitaxial layer comprises at least one of A l N, GaN, or Al GaN. Original
A method of fabricating a epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; growing a first epitaxial layer coupled to the engineered substrate using a first deposition process; and growing a second epitaxial layer coupled to the first epitaxial layer using a second deposition process. Original
The method of claim 7 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 7 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 7 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 7 further comprising: growing a third epitaxial layer coupled to the second epitaxial layer using the first deposition process; and growing a fourth epitaxial layer coupled to the third epitaxial layer using the second deposition process. Original
The method of claim 7 wherein the first deposition process comprises a metalorganic chemical vapor deposition (MOCVD) process and the second deposition process comprises a hybrid vapor phase epitaxy (H V PE) process. Original
The method of claim 7 wherein: the first epitaxial layer comprises at least one of A l N, GaN, or A l GaN; and the second epitaxial layer comprises at least one of A l N, GaN, or A l GaN. Original
A method of forming a GaN-based epitaxial structure, the method comprising: providing an engineered substrate, the engineered substrate comprising: a polycrystalline ceramic core; a conductive layer coupled to the polycrystalline ceramic core; and a barrier layer encapsulating the conductive layer and the polycrystalline ceramic core, the barrier layer being non-metallic; transferring a single crystalline silicon layer coupled to the engineered substrate; depositing a first GaN-based epitaxial layer coupled to the single crystalline silicon layer using a metalorganic chemical vapor deposition (MOCVD) process; and depositing a second GaN-based epitaxial layer coupled to the first GaN-based epitaxial layer using a hybrid vapor phase epitaxy (H V PE) deposition process. Original
The method of claim 14 wherein the engineered substrate further comp ri ses: a first adhesion layer coupled to the polycrystalline ceramic core, the first adhesion layer being non-metallic, wherein the conductive layer is coupled to the first adhesion layer; and a second adhesion layer coupled to the conductive layer, the second adhesion layer being non-metallic, wherein the barrier layer encapsulates the second adhesion layer. Original
The method of claim 14 wherein the conductive layer is formed on only one side of the engineered substrate. Original
The method of claim 14 wherein the conductive layer encapsulates the engineered substrate. Original
The method of claim 14 further comprising: depositing an additional MOCVD GaN-based epitaxial layer using an MOCVD process: depositing an additional H V PE GaN-based epitaxial layer using a H VPE deposition process; and repeating depositing an additional MOCVD GaN-based epitaxial layer and depositing an additional H V PE GaN-based epitaxial layer a predetermined number of times. Original
The method of claim 14 wherein: the engineered substrate is characterized by a substrate coefficient of thermal expansion (CTE); the first GaN-based epitaxial layer is characterized by a first CTE; the second GaN-based epitaxial layer is characterized by a second CTE; and the substrate CTE, the first CTE, and the second CTE are substantially equal. Original
The method of claim 14 wherein: the first GaN-based epitaxial layer comprises Al xGai-x N; and the second GaN-based epitaxial layer comprises Al xGai-xN. Original
Layer stacks claimed or described, ordered top of device to substrate.
group III-N-based electronic device on engineered substrate
Materials described outside the worked examples.
polycrystalline ceramic core
aluminum nitride (AlN) ceramic wafer
AlN
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is a side sectional view illustrating GaN epitaxial (i.e., epi) layers 130 formed on an engineered substrate (ES) 110 according to an embodiment of the …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 25–1200 °C | — |
Thickness | ≤ 150 mm |
Related documents with shared materials, methods, properties, or citations.
silicon carbide (SiC) polycrystalline ceramic
SiC
conductive layer
MOCVD III-N-based epitaxial layer
HVPE III-N-based epitaxial layer
single crystalline silicon layer
Si
gallium nitride
GaN
aluminum gallium nitride
AlGaN
first GaN-based MOCVD epitaxial layer
second GaN-based HVPE epitaxial layer
AlxGa₁-xN
non-metallic barrier layer
oxide layer
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
| — |
Thickness | ≥ 150 mm | — |
silicon carbide (SiC) polycrystalline ceramic
SiC
conductive layer
MOCVD III-N-based epitaxial layer
HVPE III-N-based epitaxial layer
single crystalline silicon layer
Si
gallium nitride
GaN
aluminum gallium nitride
AlGaN
first GaN-based MOCVD epitaxial layer
second GaN-based HVPE epitaxial layer
AlxGa₁-xN
non-metallic barrier layer
oxide layer
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
| — |
Thickness | ≥ 150 mm | — |
silicon carbide (SiC) polycrystalline ceramic
SiC
conductive layer
MOCVD III-N-based epitaxial layer
HVPE III-N-based epitaxial layer
single crystalline silicon layer
Si
gallium nitride
GaN
aluminum gallium nitride
AlGaN
first GaN-based MOCVD epitaxial layer
second GaN-based HVPE epitaxial layer
AlxGa₁-xN
non-metallic barrier layer
oxide layer
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
| — |
Thickness | ≥ 150 mm | — |
silicon carbide (SiC) polycrystalline ceramic
SiC
conductive layer
MOCVD III-N-based epitaxial layer
HVPE III-N-based epitaxial layer
single crystalline silicon layer
Si
gallium nitride
GaN
aluminum gallium nitride
AlGaN
first GaN-based MOCVD epitaxial layer
second GaN-based HVPE epitaxial layer
AlxGa₁-xN
non-metallic barrier layer
oxide layer
FIG. 3, changes in dislocation density are associated with different GaN epi thicknesses. Graph 200 includes an X axis that represents GaN thickness in microns …
FIG. 4, multiple, different epitaxial deposition processes are used to form multiple, different GaN epi layers 220 and 222 on CTE-matched engineered substrate …
FIG. 5, a metalorganic chemical vapor deposition (MOCVD) process is used to form buffer layer 520A coupled to (e.g., on top of) engineered substrate 110. In one …
| — |
Thickness | ≥ 150 mm | — |