A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed.,ammoe par forming a space in the drain contact s twoY(seate~y¾cs; a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region formed under the field plate in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where the fi st isolation region is formed; and, a second isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface 2 DOCSLA-129143 v 1 Application No. 14/445,940 Docket No.: E0101.0027 where the sec d isolation region is formed, wherein at least a portion of the second isolation region is formed under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; gate electrode disposed on the barrier layer; a source contact disposed above the barrier layer; 3 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed e moca forming a space in the drain contact la's"ates_ =="=--'=------<- a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region and a second isolation region each formed in respective first and second portions of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the first and second portions of the interface where the firsta seond isolation regions as l formed, wherein the first isolation region is formed under the field plate; and, a third isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the portion of the interface where the thiisolation region is formed, wherein at least a portion of the third isolation region is formed under the space.

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4 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 canceled

A method for fabricating a transistor device, the method comprising: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for t he drain contact s are formed with a space in between. sce seaigje dran con:wo a e s depositing ohmic contact metal in the openings to form the drain and source contacts; forming a first isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2DEG from the portion of the interface where the isolation region is formed; forming a field plate on the dielectric layer above the first isolation region; and, 5 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming a second isolation region in another portion of the interface between the at least one buffer layer and the barrier layer, wherein at least a portion of the second isolation region passes under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is missing n --issin..a. forming a space in the d rain contact that ta v o se paneKpeces a dielectric layer disposed on the gate electrode and the ba rri er layer; an isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where 7 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 the isolation region is formed, wherein at least a portion of the isolation region is formed under the space.

A method for fabricating a transistor device, the method comp ri sing: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2D E G) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; and depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for l- drain contacts are formed with a space in between, K aceQn raifn coniatnws aei s depositing ohmic contact metal in the openings to form the drain and source contacts; 8 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming an isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2D E G from the portion of the interface where the SVG 14445940.11-27-2015.IHIEW₀UDPXXIFW3.CLM.1.svg 0.39 6.7 Black and white

A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed.,ammoe par forming a space in the drain contact s twoY(seate~y¾cs; a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region formed under the field plate in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where the fi st isolation region is formed; and, a second isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface 2 DOCSLA-129143 v 1 Application No. 14/445,940 Docket No.: E0101.0027 where the sec d isolation region is formed, wherein at least a portion of the second isolation region is formed under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; gate electrode disposed on the barrier layer; a source contact disposed above the barrier layer; 3 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed e moca forming a space in the drain contact la's"ates_ =="=--'=------<- a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region and a second isolation region each formed in respective first and second portions of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the first and second portions of the interface where the firsta seond isolation regions as l formed, wherein the first isolation region is formed under the field plate; and, a third isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the portion of the interface where the thiisolation region is formed, wherein at least a portion of the third isolation region is formed under the space.

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4 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 canceled

A method for fabricating a transistor device, the method comprising: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for t he drain contact s are formed with a space in between. sce seaigje dran con:wo a e s depositing ohmic contact metal in the openings to form the drain and source contacts; forming a first isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2DEG from the portion of the interface where the isolation region is formed; forming a field plate on the dielectric layer above the first isolation region; and, 5 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming a second isolation region in another portion of the interface between the at least one buffer layer and the barrier layer, wherein at least a portion of the second isolation region passes under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is missing n --issin..a. forming a space in the d rain contact that ta v o se paneKpeces a dielectric layer disposed on the gate electrode and the ba rri er layer; an isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where 7 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 the isolation region is formed, wherein at least a portion of the isolation region is formed under the space.

A method for fabricating a transistor device, the method comp ri sing: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2D E G) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; and depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for l- drain contacts are formed with a space in between, K aceQn raifn coniatnws aei s depositing ohmic contact metal in the openings to form the drain and source contacts; 8 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming an isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2D E G from the portion of the interface where the SVG 14445940.11-27-2015.IHIEW₀UDPXXIFW3.CLM.1.svg 0.39 6.7 Black and white

A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed.,ammoe par forming a space in the drain contact s twoY(seate~y¾cs; a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region formed under the field plate in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where the fi st isolation region is formed; and, a second isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface 2 DOCSLA-129143 v 1 Application No. 14/445,940 Docket No.: E0101.0027 where the sec d isolation region is formed, wherein at least a portion of the second isolation region is formed under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; gate electrode disposed on the barrier layer; a source contact disposed above the barrier layer; 3 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed e moca forming a space in the drain contact la's"ates_ =="=--'=------<- a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region and a second isolation region each formed in respective first and second portions of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the first and second portions of the interface where the firsta seond isolation regions as l formed, wherein the first isolation region is formed under the field plate; and, a third isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the portion of the interface where the thiisolation region is formed, wherein at least a portion of the third isolation region is formed under the space.

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4 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 canceled

A method for fabricating a transistor device, the method comprising: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for t he drain contact s are formed with a space in between. sce seaigje dran con:wo a e s depositing ohmic contact metal in the openings to form the drain and source contacts; forming a first isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2DEG from the portion of the interface where the isolation region is formed; forming a field plate on the dielectric layer above the first isolation region; and, 5 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming a second isolation region in another portion of the interface between the at least one buffer layer and the barrier layer, wherein at least a portion of the second isolation region passes under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is missing n --issin..a. forming a space in the d rain contact that ta v o se paneKpeces a dielectric layer disposed on the gate electrode and the ba rri er layer; an isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where 7 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 the isolation region is formed, wherein at least a portion of the isolation region is formed under the space.

A method for fabricating a transistor device, the method comp ri sing: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2D E G) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; and depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for l- drain contacts are formed with a space in between, K aceQn raifn coniatnws aei s depositing ohmic contact metal in the openings to form the drain and source contacts; 8 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming an isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2D E G from the portion of the interface where the SVG 14445940.11-27-2015.IHIEW₀UDPXXIFW3.CLM.1.svg 0.39 6.7 Black and white

A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed.,ammoe par forming a space in the drain contact s twoY(seate~y¾cs; a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region formed under the field plate in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where the fi st isolation region is formed; and, a second isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface 2 DOCSLA-129143 v 1 Application No. 14/445,940 Docket No.: E0101.0027 where the sec d isolation region is formed, wherein at least a portion of the second isolation region is formed under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; gate electrode disposed on the barrier layer; a source contact disposed above the barrier layer; 3 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 a drain contact disposed above the ba rri er layer wherein a part of the drain contact is removed e moca forming a space in the drain contact la's"ates_ =="=--'=------<- a dielectric layer disposed on the gate electrode and the ba rri er layer; a field plate disposed on the dielectric layer; a first isolation region and a second isolation region each formed in respective first and second portions of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the first and second portions of the interface where the firsta seond isolation regions as l formed, wherein the first isolation region is formed under the field plate; and, a third isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2D E G is removed from the portion of the interface where the thiisolation region is formed, wherein at least a portion of the third isolation region is formed under the space.

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4 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 canceled

A method for fabricating a transistor device, the method comprising: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for t he drain contact s are formed with a space in between. sce seaigje dran con:wo a e s depositing ohmic contact metal in the openings to form the drain and source contacts; forming a first isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2DEG from the portion of the interface where the isolation region is formed; forming a field plate on the dielectric layer above the first isolation region; and, 5 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming a second isolation region in another portion of the interface between the at least one buffer layer and the barrier layer, wherein at least a portion of the second isolation region passes under the space.

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A transistor device comprising: at least one buffer layer disposed on a substrate layer; a barrier layer disposed on the at least one buffer layer with a two dimensional electron gas (2DEG) disposed at an interface between the ba rri er layer and the at least one buffer layer; a gate electrode disposed on the ba rri er layer; a source contact disposed above the barrier layer; a drain contact disposed above the ba rri er layer wherein a part of the drain contact is missing n --issin..a. forming a space in the d rain contact that ta v o se paneKpeces a dielectric layer disposed on the gate electrode and the ba rri er layer; an isolation region formed in a portion of the interface between the at least one buffer layer and the ba rri er layer, such that the 2DEG is removed from the portion of the interface where 7 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 the isolation region is formed, wherein at least a portion of the isolation region is formed under the space.

A method for fabricating a transistor device, the method comp ri sing: forming at least one buffer layer on a substrate layer; forming a barrier layer on the at least one buffer layer with a two dimensional electron gas (2D E G) disposed at an interface between the ba rri er layer and the at least one buffer layer; forming a gate electrode on the ba rri er layer; and depositing a dielectric layer over the gate electrode and the ba rri er layer; patterning and etching the dielectric layer to form openings for drain and source contacts, wherein a first and second opening for l- drain contacts are formed with a space in between, K aceQn raifn coniatnws aei s depositing ohmic contact metal in the openings to form the drain and source contacts; 8 DOCSLA-129143 v i Application No. 14/445,940 Docket No.: E0101.0027 forming an isolation region in a portion of the interface between the at least one buffer layer and the ba rri er layer to remove the 2D E G from the portion of the interface where the SVG 14445940.11-27-2015.IHIEW₀UDPXXIFW3.CLM.1.svg 0.39 6.7 Black and white