The method of claim 10, wherein said layer of a first dielectric material and said layer of a second dielectric material have a same thickness, the method further comprising forming a third dielectric material layer on top of said layer of a first dielectric material and said layer of a second dielectric material.

The method of claim 10, further comprising forming an upper electrical connection above at least portions of said layer of a first dielectric material and said layer of a second dielectric material; said upper electrical connection layer being coupled to the first and second electronic components.

The method of claim 10, comprising: forming at least one first metallic contact on top of at least a portion of said first region of said first substrate; forming at least one second metallic contact below at least a portion of said layer of a second dielectric material; and connecting said first and second metallic contacts together.

A method of manufacture of a compound semiconductor integrated system; the method comprising: providing a third substrate; Pg. 4 Preliminary Amendment Attorney Docket No. B-8018D I V 630711-7 forming a third electronic component in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component.

The method of claim 10, wherein each of the first and second electronic components comprises a material combination selected from the group consisting of Group IV-I V, Group I II-V and Group I I-VI materials.

The method of manufacture of a compound semiconductor integrated system of claim 14; wherein: providing a third substrate and forming a third electronic component in the third substrate comprises providing a third substrate and forming a plurality of third electronic components in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10 comprises forming a plurality of compound semiconductor integrated circuits according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component comprises attaching said plurality of compound semiconductor integrated circuits to said third substrate; and forming an upper electrical connection above said plurality of compound semiconductor integrated circuits; said upper electrical connection layer being coupled to said first, second and third electronic components.

The method of claim 10, wherein said layer of a first dielectric material and said layer of a second dielectric material have a same thickness, the method further comprising forming a third dielectric material layer on top of said layer of a first dielectric material and said layer of a second dielectric material.

The method of claim 10, further comprising forming an upper electrical connection above at least portions of said layer of a first dielectric material and said layer of a second dielectric material; said upper electrical connection layer being coupled to the first and second electronic components.

The method of claim 10, comprising: forming at least one first metallic contact on top of at least a portion of said first region of said first substrate; forming at least one second metallic contact below at least a portion of said layer of a second dielectric material; and connecting said first and second metallic contacts together.

A method of manufacture of a compound semiconductor integrated system; the method comprising: providing a third substrate; Pg. 4 Preliminary Amendment Attorney Docket No. B-8018D I V 630711-7 forming a third electronic component in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component.

The method of claim 10, wherein each of the first and second electronic components comprises a material combination selected from the group consisting of Group IV-I V, Group I II-V and Group I I-VI materials.

The method of manufacture of a compound semiconductor integrated system of claim 14; wherein: providing a third substrate and forming a third electronic component in the third substrate comprises providing a third substrate and forming a plurality of third electronic components in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10 comprises forming a plurality of compound semiconductor integrated circuits according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component comprises attaching said plurality of compound semiconductor integrated circuits to said third substrate; and forming an upper electrical connection above said plurality of compound semiconductor integrated circuits; said upper electrical connection layer being coupled to said first, second and third electronic components.

The method of claim 10, wherein said layer of a first dielectric material and said layer of a second dielectric material have a same thickness, the method further comprising forming a third dielectric material layer on top of said layer of a first dielectric material and said layer of a second dielectric material.

The method of claim 10, further comprising forming an upper electrical connection above at least portions of said layer of a first dielectric material and said layer of a second dielectric material; said upper electrical connection layer being coupled to the first and second electronic components.

The method of claim 10, comprising: forming at least one first metallic contact on top of at least a portion of said first region of said first substrate; forming at least one second metallic contact below at least a portion of said layer of a second dielectric material; and connecting said first and second metallic contacts together.

A method of manufacture of a compound semiconductor integrated system; the method comprising: providing a third substrate; Pg. 4 Preliminary Amendment Attorney Docket No. B-8018D I V 630711-7 forming a third electronic component in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component.

The method of claim 10, wherein each of the first and second electronic components comprises a material combination selected from the group consisting of Group IV-I V, Group I II-V and Group I I-VI materials.

The method of manufacture of a compound semiconductor integrated system of claim 14; wherein: providing a third substrate and forming a third electronic component in the third substrate comprises providing a third substrate and forming a plurality of third electronic components in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10 comprises forming a plurality of compound semiconductor integrated circuits according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component comprises attaching said plurality of compound semiconductor integrated circuits to said third substrate; and forming an upper electrical connection above said plurality of compound semiconductor integrated circuits; said upper electrical connection layer being coupled to said first, second and third electronic components.

The method of claim 10, wherein said layer of a first dielectric material and said layer of a second dielectric material have a same thickness, the method further comprising forming a third dielectric material layer on top of said layer of a first dielectric material and said layer of a second dielectric material.

The method of claim 10, further comprising forming an upper electrical connection above at least portions of said layer of a first dielectric material and said layer of a second dielectric material; said upper electrical connection layer being coupled to the first and second electronic components.

The method of claim 10, comprising: forming at least one first metallic contact on top of at least a portion of said first region of said first substrate; forming at least one second metallic contact below at least a portion of said layer of a second dielectric material; and connecting said first and second metallic contacts together.

A method of manufacture of a compound semiconductor integrated system; the method comprising: providing a third substrate; Pg. 4 Preliminary Amendment Attorney Docket No. B-8018D I V 630711-7 forming a third electronic component in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component.

The method of claim 10, wherein each of the first and second electronic components comprises a material combination selected from the group consisting of Group IV-I V, Group I II-V and Group I I-VI materials.

The method of manufacture of a compound semiconductor integrated system of claim 14; wherein: providing a third substrate and forming a third electronic component in the third substrate comprises providing a third substrate and forming a plurality of third electronic components in the third substrate; forming a compound semiconductor integrated circuit according to the method of claim 10 comprises forming a plurality of compound semiconductor integrated circuits according to the method of claim 10; and attaching said compound semiconductor integrated circuit to said third substrate such that at least one of the first and second electronic components is electrically coupled to the third electronic component comprises attaching said plurality of compound semiconductor integrated circuits to said third substrate; and forming an upper electrical connection above said plurality of compound semiconductor integrated circuits; said upper electrical connection layer being coupled to said first, second and third electronic components.