METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO SILICON CARBIDE AND GALLIUM NITRIDE | Matter42 Literature
Patent
Atlas literature
Patent
US 11,984,321 B1
METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO SILICON CARBIDE AND GALLIUM NITRIDE
Mehmet Ozgur, Michael Pedersen, Michael A. Huff
Corporation for National Research Initiatives, Reston, VA (US)·May 14, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 is an illustration of a deep, high-aspect ratio feature etched into the materials, and using the method described herein.
FIG. 2
FIG. 2 is an illustration of the plasma etching system that uses the method of etching the materials described herein.
FIG. 3
FIGS. 3A-3D are an illustration of a first substrate con- figuration to etch deep, high-aspect ratio features into a substrate layer of silicon carbide according …
FIG. 4
FIGS. 4A-4D are an illustration of a second substrate configuration to etch deep, high-aspect ratio features into a composite substrate according to the present …
FIG. 5
FIGS. 5A-5D are an illustration of a third substrate configuration to etch deep, high-aspect ratio features into a substrate composed of a gallium nitride layer …
FIG. 6
FIGS. 6A-6D are an illustration of a fourth substrate configuration to etch deep, high-aspect ratio features into a substrate composed of silicon carbide …
FIG. 7
FIGS. 7A-7F are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 8
FIGS. 8A-8D are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 9
FIG. 9 is a table of the etch parameters of the etch process described herein.
FIG. 10
FIG. 10 is a table of process characteristics derived from metrology of etched structures in the design-of-experiments (DOE) described herein.
FIG. 11
FIG. 11 is an illustration of the portion of the etch mask used in the design-of-experiments (DOE) described herein.
FIG. 12
FIGS. 12A and 12B are an illustration of two substrates with feature width to be etched that are as in
FIG. 13
FIG. 13 is an illustration of the facets of the un-etched features as described herein.
FIG. 14
FIGS. 14A-14E are an illustration of the mechanism involved in the formation of facets of the un-etched features as described herein.
FIG. 15
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
FIG. 20
FIG. 20 8C. The etch method used on the etch mask 103 depends on the etch mask material, but includes wet chemical etching, reactive ion etching, plasma …
FIG. 25
FIG. 25 8D. Alternatively, the etch mask can be made on the substrate using lift-off patterning technology. Using liftoff, a photo- sensitive polymer is …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
9 independent · 0 dependent
1
IndependentSiChard etch mask
Fabricate substrates of silicon carbide having suitable patterned hard etch mask on the substrate surfaces;
2
IndependentSiC
Perform pre-etch inspection/data collection on the substrates;
3
IndependentSiC
Etch substrates using a predetermined etch process parameter setting selected as part of the DOE;
4
IndependentSiC
Collect post-etch metrology data on each substrate;
5
IndependentSiC
Clean substrate; and then,
6
IndependentSiCGaNSF₆O₂
Collect cross-section metrology data on substrates. For common reference, a mask layout was designed having a number of different sized features that is used to fabricate the etch mask on the silicon carbide material. A cell 130 from the etch mask layout used for the DOE is shown in FIG. 11 and the top row 131 includes 25 um 132, 50 um 133 and 100 um 134 via arrays. The bottom row 135 is corresponding post arrays having dimensions of 25 um 136, 50 um 137 and 100 um 138. The dark areas are etched and this cell 130 shown in FIG. 11 is stepped out multiple times across the silicon carbide surface. In performance of the DOE, each of the individual process parameters are varied one at a time and the process outcomes are measured by taking metrology measurements on the substrates both before and after etching. Once all data of the DOE has been collected, multiple regression analysis is used to analyze and map the data in order to determine the weighted optimal etch process parameter settings by interpolation of the derived regression model. The definition of an optimal or near optimal etch process depends on the exact specifics of what is desired in the outcome of an etch process. Therefore, there are variations on the recipe (method) for various process outcomes. In any case, the etch processes given below can be used to etch into silicon carbide materials to depths of less than 1 micron to several millimeters and with aspect ratios ranging from less than “1 to 1”, from an aspect ratio of between “1 to 1” to “10 to 1”, and even aspect ratios to well over “10 to 1”. It should be noted that the hard mask will need to be adjusted to be sufficiently thick so that it will be able to remain until the etch depth desired is obtained. The preferred embodiment method for the etching of deep, high aspect ratio features using an Inductively-Coupled Plasma (ICP) etch system into silicon carbide (and B₁ gallium nitride on silicon carbide) is comprised of a Radio Frequency (RF) bias power on the substrate being etched of between 50 and 200 Watts, a substrate chuck temperature of between −5 and 20 degrees Celsius, an Oxygen (O₂) gas flow rate of between 0 and 20 standard cubic centimeters per minute (sccm), an etch chamber gas pressure of between 1 and 15 milliTorr, a Sulfur Hexafluoride (SF₆) gas flow rate of between 50 and 150 standard cubic centimeters per minute (sccm), and a Radio Frequency (RF) antenna power to create the plasma inside the etch chamber of between 1500 and 2500 Watts. Additionally, if the etcher employs a heat shield and a temperature controlled chuck, then the preferred embodi-ment uses a heat shield temperature of between 100 and 200 degrees-Celsius and a Helium gas substrate cooling pressure of between 2 and 20 Pascals. Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28 (FIG. 2), which enables spatial redistri-bution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate 12 as shown in FIG. 2, then the preferred embodiment uses a top magnet current of between 4 and 8 Amps, a center magnet current of 8 and 12 Amps, and a bottom magnet current of between 4 and 8 Amps. Typically, depending on the depth of the etch and the time spent etching, a cleaning cycle may be performed between etch cycles. During the cleaning cycle, the flow rate of etch gas, specifically Sulfur Hexafluoride (SF₆) is reduced to 0 standard cubic centimeters per minute (sccm), and the flow rate of Oxygen (O₂) gas is continued into the etch chamber with a plasma in order to perform a cleaning of the etch chamber. Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 10 and 120 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 10 minutes that is performed in between each etch cycle, would be one example of suitable times. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). It is important to note that there is a range of values for each process parameter. There are several reasons for this. First, each etch tool will have slightly different values of each process parameter in order to have optimal etch results based on slight differences in the tool design and perfor-mance. Second, the thermal characteristics, specifically the thermal resistance from the surface of the substrate to the backside of the substrate where the active Helium cooling is used to control the temperature of the substrate, will vary from substrate to substrate, depending on the exact thickness of the substrate and layers on the substrate, and this has a slight impact on the etch outcome. Therefore, the etch recipe will be slightly adjusted to compensate for differences in the substrate configuration and thickness of the material layers. The above process method is suitable for etching deep, high aspect ratio features into silicon carbide (and gallium nitride on silicon carbide). However, a more preferred embodiment of the method for the deep, high-aspect ratio etching of silicon carbide (or gallium nitride on silicon carbide) is as follows: RF Bias Power: 90 to 110 Watts substrate temperature: 0 to 14 C O₂ gas flow: 8 to 12 sccm Chamber pressure: 4 to 6 milliTorr SF₆ gas flow: 80 to 120 sccm RF antenna power: 1900 to 2100 Watts Additionally, if the etch is performed on an ICP etch tool that employs a heat shield and a temperature controlled chuck, then the more preferred embodiment uses: Heat shield temperature: 140 to 160 C He cooling pressure: 3 to 7 Pascals Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28, which enables spatial redistribution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate as shown in FIG. 2, then the more preferred embodiment uses: Top magnet current: 5.9 to 6.3 Amps Center magnet current: 10.0 to 10.2 Amps Bottom magnet current: 5.9 to 6.3 Amps Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 20 and 40 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 5 minutes that is performed in between each etch cycle, would be one example of suitable times. Using the above process parameter settings will result in an average etch rate of approximately 1 micron per minute, approximately an 88 to 92-degree nearly vertical sidewall, an approximately 130 to 1 mask selectivity with a copper etch mask, an approximate aspect ratio of 12 to 1, an approximate etch depth uniformity across the substrate of +/−1.5% of the etch depth, no defects in the etched features, and an etch depth of over 150 microns. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). The process of etching of the present invention can be used to etch features partly into the silicon carbide material layer or substrate, as well as completely through the silicon carbide material layer or substrate, depending on the etch depth desired and the device or structure design. The process of etching of the present invention can also be used to etch deep, high-aspect ratio features into any of the four substrate configurations shown in FIGS. 3A-3D, 4A-4D, 5A-5D and 6A-6D. Moreover, the process of etching of the present invention can be used to etch deep, high-aspect ratio features into gallium nitride layers on silicon carbide substrates. It is noted that the above etch results are dependent on the exact features and dimensions, the amount of area of the substrate surface being etched, the thickness and type of etch mask, and the depth of the etch, and therefore these results may vary depending on the exact details of the etch and substrate being employed. Therefore, it should also be noted that the recipes include process parameters that are given as 55 a range of values. One reason for this is that there will be slight differences in tool settings from tool to tool. Secondly, there may be slight differences based on the exact substrate configuration used, including the exact type of materials used in the substrate layers and the thickness that will impact the exact process settings in order to obtain the optimal or near optimal outcome. Additionally, depending the exact situation there may be additional requirements that must be met in order to obtain an optimal or near optimal result with the etch process of silicon carbide of the present invention. First, depending on the depth of the etch and the type of etch mask used, it may B₁ be desirable to use the minimal amount of etch mask material across the substrate surface, particularly if the etch mask is made from nickel. The reason is that if larger areas of the surface are covered by the etch mask, it increases the risk of particulates which can result in etch defects in the etched areas of the substrate. Second, if uniform trench etch depths are desired, then the open area features in the etch mask should have the same nominal dimensions across the wafer. This is illustrated in FIGS. 12A and 12B, in which two substrates having differ-ent dimensions 140 in the etch mask are shown in FIGS. 12A and 12B. In FIG. 12A, which is a plane view of a substrate 141, an etch mask 142 covers most of the substrate 141, except for the open area features in the etch mask given by the rectangles 143, 144 and 145, where the silicon carbide would be exposed and can be etched using the present invention. The etch rate depends on the size of the exposed areas on the substrate. That is, if the mask width is larger, the etch rate will be higher and conversely, if the masking width is smaller, the etch rate will be lower. Consequently, if there are features having different sized widths, the etch rate will vary, and by consequence, so will the depths of the etch features. Therefore, using the etch of the present invention, in performing an etch of the present invention on substrate 141, feature 145 would have the highest etch rate and for a given etch time, would have the deepest trench, whereas feature 144 would have a less deep etch for the same etch time, and feature 143 would have the shallowest etch for the same etch time. In comparison, substrate 146 with an etch mask 147 has three features, given by 148, 149 and 150 all having the same feature widths. For a given etch time, the features 148, 149 and 150 will all have approximately the same depth of the trenches. Therefore, in order to have uniform trench depths, the widths of the features should be approximately equal across a substrate such as shown on substrate 146 in FIG. 12B. Third, the etch chamber should be cleaned on a periodic basis between etches. For long etches, the chamber may need to be cleaned after each sample has been etched. This will reduce the amount of particulates in the etch chamber, and thereby, reduce the probability of etch defects. After an etch has been completed, the etch chamber walls are coated with a complex material compound as a by-product of the etch process that can flake off from the chamber walls and land onto the substrate surface. The cleaning process involves a combination of oxygen plasma cleans and mechanical scrubbing of the chamber liner walls with an abrasive pad. Wiping the walls of the etch chamber with a solvent may also be advised in the cleaning procedure. A suitable solvent for the wiping of the chamber walls is isopropylalcohol. Fourth, for a given mask material and selectivity as well as depth of etched features, the hard mask may need to be sufficiently thick so as to reduce or eliminate faceting of the sidewalls of the etched silicon carbide material. FIG. 13 is an illustration of a cross section of a portion of a series of trenches 163 etched in silicon carbide material layer or substrate 167 showing an example of faceting 161 at the top of the sidewalls 162 of the etched trenches 163 into a silicon carbide material layer or substrate 167. The un-etched portion of the silicon carbide 165 on either side of the trenches 163 have tops 164 which is the surface of the silicon carbide substrate where the etch mask was located, but has been removed in this illustration. As can be seen in the top portion of the sidewalls 162, there is a sloping sidewall 161 that has a less steep angle than the vertical or nearly vertical sidewalls 162 of the trenches 163 and this is termed “faceting.” The amount of faceting of the etched silicon carbide material is directly related to the erosion of the hard mask. FIGS. 14A-14E are an illustration of a cross section 170 of a portion of a series of trenches 173 etched in a silicon carbide material substrate 172 that explains this phenom-enon by showing a cross sections 170 of a series of trenches 173 of a substrate of silicon carbide 172 with a patterned etch mask 171 on the surface of the silicon carbide substrate 172 with exposed areas 173 in the etch mask 171. These series of cross sections 170 in FIGS. 14A through 14E of the substrate 172 are at different points in time as the etch in the substrate 172 is performed. FIG. 14A shows the substrate 172 before the etch has begun. On the surface of the substrate 172 there is a patterned etch mask 171 on a silicon carbide substrate 172 with openings 173 exposing the substrate surface 172 and where the substrate 172 can be etched. As the etching begins, as shown in FIG. 14B, an approxi-mately 45-degree slant or slope 175 will be created at the edge of the hard mask 171 open features 173. This is a result of the etch mask 171 distorting the electrical field lines impinging on the etch mask 171 on the substrate surface 172, thereby effectively causing increased ion bombardment onto the exposed etch mask 171 corners that erodes the corners 175 faster than the areas surrounding the etch mask
171
IndependentSiC
This approximately 45-degree taper 175 continues to grow as the etch proceeds and the trench 174 features get deeper. As illustrated in FIG. 14C, eventually the 45-degree taper 175 grows to the point where it starts to intersect with the sidewalls 177 of the etched trench features 173 in the silicon carbide substrate 172. As the 45-degree taper 175 continues beyond the edge of the open trench 173 and into the silicon carbide, it begins to propagate into the top edge of the silicon carbide trench 176, as shown in FIG. 14B. Once the etch has been completed and the etch mask 171 has been removed, the faceting 176 that has been made at the top of the sidewalls 177 of the trenches 173 made in the silicon carbide substrate 172 are now permanent as shown in FIG. 14E. Importantly, if the thickness of the etch mask 171 is sufficiently thick or the mask selectively is sufficiently high, then the edge of the 45-degree taper 175 does not reach the top edge of the trench 173 during the etch time and no top-hat facet 176 will be formed at the top of the sidewalls
177
IndependentSiC
The calculation for the etch mask 171 thickness required to avoid the formation of the faceting 176 is as follows. If it is assumed a near vertical etch mask 171 sidewall is started with and that the facet angle 176 formed in the etch mask 171 material is 45 degrees, which is what is experimentally observed, the etch mask 171 thickness required to prevent the facet (top hat) 176 from forming in the etched features 173 in the silicon carbide substrate 172 is simply two times the etch mask 171 thickness removed during the etch. So, if, for instance it is desired to etch features having a depth 174 of 100 microns into silicon carbide substrate 172, in which the mask selectivity is 20:1, it can be calculated that the etch mask 171 must be at least 5 microns in thickness to have any etch mask 171 remaining at the end of the etch to this depth 174 and the thickness of the etch mask 171 must be at least 10 microns to avoid the faceting 176, or in general: Thickness of Etch Mask>2*(Etch Depth/Mask Selec-tivity). B₁ FIG. 15 is a series of four Scanning Electron Microscope (SEM) images 180 in four quadrants, 181, 182, 183, and 184, showing etched features 185 into a silicon carbide substrate 186. The top of the unetched portion of the silicon carbide substrate 186 is where an etch mask was located that was removed prior to these images 180 being taken. As can be seen, quadrant 1 in the top left corner 181 is a series of vias or holes having edge dimensions of 50 microns that are etched into the silicon carbide substrate 186, quadrant 2 in the top right corner 182 is a series of posts or pillars having edge dimensions of 25 microns that are etched into the silicon carbide substrate 186, quadrant 3 in the bottom left corner 183 is a series of vias or holes having edge dimen-sions of 25 microns that are etched in the silicon carbide substrate 186, and quadrant 4 in the bottom right 184 is a series of posts or pillars having edge dimensions of microns that are etched into the silicon carbide substrate
186
IndependentSiC
These images illustrate how the etch of the present invention can be used to make deep, high-aspect features having a variety of sizes and shapes in silicon carbide material layers and/or substrates 186. While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifica-tions and equivalent arrangements included within the spirit and scope of the appended claims. What is claimed is:
Materials
Materials described outside the worked examples.
silicon carbide
SiC
Substrate To Be Etched
hard etch mask
Etch Mask
Process steps
Additional fabrication and treatment steps described in the patent.
1
Icp Etch
Step 1
Temperature
-5, 20°C
Duration
10, 120 min
Ambient
SF6/O2/Ar plasma
Process details
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
sem
SEM
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO SILICON CARBIDE AND GALLIUM NITRIDE
Mehmet Ozgur, Michael Pedersen, Michael A. Huff
Corporation for National Research Initiatives, Reston, VA (US)·May 14, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 is an illustration of a deep, high-aspect ratio feature etched into the materials, and using the method described herein.
FIG. 2
FIG. 2 is an illustration of the plasma etching system that uses the method of etching the materials described herein.
FIG. 3
FIGS. 3A-3D are an illustration of a first substrate con- figuration to etch deep, high-aspect ratio features into a substrate layer of silicon carbide according …
FIG. 4
FIGS. 4A-4D are an illustration of a second substrate configuration to etch deep, high-aspect ratio features into a composite substrate according to the present …
FIG. 5
FIGS. 5A-5D are an illustration of a third substrate configuration to etch deep, high-aspect ratio features into a substrate composed of a gallium nitride layer …
FIG. 6
FIGS. 6A-6D are an illustration of a fourth substrate configuration to etch deep, high-aspect ratio features into a substrate composed of silicon carbide …
FIG. 7
FIGS. 7A-7F are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 8
FIGS. 8A-8D are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 9
FIG. 9 is a table of the etch parameters of the etch process described herein.
FIG. 10
FIG. 10 is a table of process characteristics derived from metrology of etched structures in the design-of-experiments (DOE) described herein.
FIG. 11
FIG. 11 is an illustration of the portion of the etch mask used in the design-of-experiments (DOE) described herein.
FIG. 12
FIGS. 12A and 12B are an illustration of two substrates with feature width to be etched that are as in
FIG. 13
FIG. 13 is an illustration of the facets of the un-etched features as described herein.
FIG. 14
FIGS. 14A-14E are an illustration of the mechanism involved in the formation of facets of the un-etched features as described herein.
FIG. 15
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
FIG. 20
FIG. 20 8C. The etch method used on the etch mask 103 depends on the etch mask material, but includes wet chemical etching, reactive ion etching, plasma …
FIG. 25
FIG. 25 8D. Alternatively, the etch mask can be made on the substrate using lift-off patterning technology. Using liftoff, a photo- sensitive polymer is …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
9 independent · 0 dependent
1
IndependentSiChard etch mask
Fabricate substrates of silicon carbide having suitable patterned hard etch mask on the substrate surfaces;
2
IndependentSiC
Perform pre-etch inspection/data collection on the substrates;
3
IndependentSiC
Etch substrates using a predetermined etch process parameter setting selected as part of the DOE;
4
IndependentSiC
Collect post-etch metrology data on each substrate;
5
IndependentSiC
Clean substrate; and then,
6
IndependentSiCGaNSF₆O₂
Collect cross-section metrology data on substrates. For common reference, a mask layout was designed having a number of different sized features that is used to fabricate the etch mask on the silicon carbide material. A cell 130 from the etch mask layout used for the DOE is shown in FIG. 11 and the top row 131 includes 25 um 132, 50 um 133 and 100 um 134 via arrays. The bottom row 135 is corresponding post arrays having dimensions of 25 um 136, 50 um 137 and 100 um 138. The dark areas are etched and this cell 130 shown in FIG. 11 is stepped out multiple times across the silicon carbide surface. In performance of the DOE, each of the individual process parameters are varied one at a time and the process outcomes are measured by taking metrology measurements on the substrates both before and after etching. Once all data of the DOE has been collected, multiple regression analysis is used to analyze and map the data in order to determine the weighted optimal etch process parameter settings by interpolation of the derived regression model. The definition of an optimal or near optimal etch process depends on the exact specifics of what is desired in the outcome of an etch process. Therefore, there are variations on the recipe (method) for various process outcomes. In any case, the etch processes given below can be used to etch into silicon carbide materials to depths of less than 1 micron to several millimeters and with aspect ratios ranging from less than “1 to 1”, from an aspect ratio of between “1 to 1” to “10 to 1”, and even aspect ratios to well over “10 to 1”. It should be noted that the hard mask will need to be adjusted to be sufficiently thick so that it will be able to remain until the etch depth desired is obtained. The preferred embodiment method for the etching of deep, high aspect ratio features using an Inductively-Coupled Plasma (ICP) etch system into silicon carbide (and B₁ gallium nitride on silicon carbide) is comprised of a Radio Frequency (RF) bias power on the substrate being etched of between 50 and 200 Watts, a substrate chuck temperature of between −5 and 20 degrees Celsius, an Oxygen (O₂) gas flow rate of between 0 and 20 standard cubic centimeters per minute (sccm), an etch chamber gas pressure of between 1 and 15 milliTorr, a Sulfur Hexafluoride (SF₆) gas flow rate of between 50 and 150 standard cubic centimeters per minute (sccm), and a Radio Frequency (RF) antenna power to create the plasma inside the etch chamber of between 1500 and 2500 Watts. Additionally, if the etcher employs a heat shield and a temperature controlled chuck, then the preferred embodi-ment uses a heat shield temperature of between 100 and 200 degrees-Celsius and a Helium gas substrate cooling pressure of between 2 and 20 Pascals. Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28 (FIG. 2), which enables spatial redistri-bution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate 12 as shown in FIG. 2, then the preferred embodiment uses a top magnet current of between 4 and 8 Amps, a center magnet current of 8 and 12 Amps, and a bottom magnet current of between 4 and 8 Amps. Typically, depending on the depth of the etch and the time spent etching, a cleaning cycle may be performed between etch cycles. During the cleaning cycle, the flow rate of etch gas, specifically Sulfur Hexafluoride (SF₆) is reduced to 0 standard cubic centimeters per minute (sccm), and the flow rate of Oxygen (O₂) gas is continued into the etch chamber with a plasma in order to perform a cleaning of the etch chamber. Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 10 and 120 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 10 minutes that is performed in between each etch cycle, would be one example of suitable times. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). It is important to note that there is a range of values for each process parameter. There are several reasons for this. First, each etch tool will have slightly different values of each process parameter in order to have optimal etch results based on slight differences in the tool design and perfor-mance. Second, the thermal characteristics, specifically the thermal resistance from the surface of the substrate to the backside of the substrate where the active Helium cooling is used to control the temperature of the substrate, will vary from substrate to substrate, depending on the exact thickness of the substrate and layers on the substrate, and this has a slight impact on the etch outcome. Therefore, the etch recipe will be slightly adjusted to compensate for differences in the substrate configuration and thickness of the material layers. The above process method is suitable for etching deep, high aspect ratio features into silicon carbide (and gallium nitride on silicon carbide). However, a more preferred embodiment of the method for the deep, high-aspect ratio etching of silicon carbide (or gallium nitride on silicon carbide) is as follows: RF Bias Power: 90 to 110 Watts substrate temperature: 0 to 14 C O₂ gas flow: 8 to 12 sccm Chamber pressure: 4 to 6 milliTorr SF₆ gas flow: 80 to 120 sccm RF antenna power: 1900 to 2100 Watts Additionally, if the etch is performed on an ICP etch tool that employs a heat shield and a temperature controlled chuck, then the more preferred embodiment uses: Heat shield temperature: 140 to 160 C He cooling pressure: 3 to 7 Pascals Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28, which enables spatial redistribution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate as shown in FIG. 2, then the more preferred embodiment uses: Top magnet current: 5.9 to 6.3 Amps Center magnet current: 10.0 to 10.2 Amps Bottom magnet current: 5.9 to 6.3 Amps Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 20 and 40 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 5 minutes that is performed in between each etch cycle, would be one example of suitable times. Using the above process parameter settings will result in an average etch rate of approximately 1 micron per minute, approximately an 88 to 92-degree nearly vertical sidewall, an approximately 130 to 1 mask selectivity with a copper etch mask, an approximate aspect ratio of 12 to 1, an approximate etch depth uniformity across the substrate of +/−1.5% of the etch depth, no defects in the etched features, and an etch depth of over 150 microns. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). The process of etching of the present invention can be used to etch features partly into the silicon carbide material layer or substrate, as well as completely through the silicon carbide material layer or substrate, depending on the etch depth desired and the device or structure design. The process of etching of the present invention can also be used to etch deep, high-aspect ratio features into any of the four substrate configurations shown in FIGS. 3A-3D, 4A-4D, 5A-5D and 6A-6D. Moreover, the process of etching of the present invention can be used to etch deep, high-aspect ratio features into gallium nitride layers on silicon carbide substrates. It is noted that the above etch results are dependent on the exact features and dimensions, the amount of area of the substrate surface being etched, the thickness and type of etch mask, and the depth of the etch, and therefore these results may vary depending on the exact details of the etch and substrate being employed. Therefore, it should also be noted that the recipes include process parameters that are given as 55 a range of values. One reason for this is that there will be slight differences in tool settings from tool to tool. Secondly, there may be slight differences based on the exact substrate configuration used, including the exact type of materials used in the substrate layers and the thickness that will impact the exact process settings in order to obtain the optimal or near optimal outcome. Additionally, depending the exact situation there may be additional requirements that must be met in order to obtain an optimal or near optimal result with the etch process of silicon carbide of the present invention. First, depending on the depth of the etch and the type of etch mask used, it may B₁ be desirable to use the minimal amount of etch mask material across the substrate surface, particularly if the etch mask is made from nickel. The reason is that if larger areas of the surface are covered by the etch mask, it increases the risk of particulates which can result in etch defects in the etched areas of the substrate. Second, if uniform trench etch depths are desired, then the open area features in the etch mask should have the same nominal dimensions across the wafer. This is illustrated in FIGS. 12A and 12B, in which two substrates having differ-ent dimensions 140 in the etch mask are shown in FIGS. 12A and 12B. In FIG. 12A, which is a plane view of a substrate 141, an etch mask 142 covers most of the substrate 141, except for the open area features in the etch mask given by the rectangles 143, 144 and 145, where the silicon carbide would be exposed and can be etched using the present invention. The etch rate depends on the size of the exposed areas on the substrate. That is, if the mask width is larger, the etch rate will be higher and conversely, if the masking width is smaller, the etch rate will be lower. Consequently, if there are features having different sized widths, the etch rate will vary, and by consequence, so will the depths of the etch features. Therefore, using the etch of the present invention, in performing an etch of the present invention on substrate 141, feature 145 would have the highest etch rate and for a given etch time, would have the deepest trench, whereas feature 144 would have a less deep etch for the same etch time, and feature 143 would have the shallowest etch for the same etch time. In comparison, substrate 146 with an etch mask 147 has three features, given by 148, 149 and 150 all having the same feature widths. For a given etch time, the features 148, 149 and 150 will all have approximately the same depth of the trenches. Therefore, in order to have uniform trench depths, the widths of the features should be approximately equal across a substrate such as shown on substrate 146 in FIG. 12B. Third, the etch chamber should be cleaned on a periodic basis between etches. For long etches, the chamber may need to be cleaned after each sample has been etched. This will reduce the amount of particulates in the etch chamber, and thereby, reduce the probability of etch defects. After an etch has been completed, the etch chamber walls are coated with a complex material compound as a by-product of the etch process that can flake off from the chamber walls and land onto the substrate surface. The cleaning process involves a combination of oxygen plasma cleans and mechanical scrubbing of the chamber liner walls with an abrasive pad. Wiping the walls of the etch chamber with a solvent may also be advised in the cleaning procedure. A suitable solvent for the wiping of the chamber walls is isopropylalcohol. Fourth, for a given mask material and selectivity as well as depth of etched features, the hard mask may need to be sufficiently thick so as to reduce or eliminate faceting of the sidewalls of the etched silicon carbide material. FIG. 13 is an illustration of a cross section of a portion of a series of trenches 163 etched in silicon carbide material layer or substrate 167 showing an example of faceting 161 at the top of the sidewalls 162 of the etched trenches 163 into a silicon carbide material layer or substrate 167. The un-etched portion of the silicon carbide 165 on either side of the trenches 163 have tops 164 which is the surface of the silicon carbide substrate where the etch mask was located, but has been removed in this illustration. As can be seen in the top portion of the sidewalls 162, there is a sloping sidewall 161 that has a less steep angle than the vertical or nearly vertical sidewalls 162 of the trenches 163 and this is termed “faceting.” The amount of faceting of the etched silicon carbide material is directly related to the erosion of the hard mask. FIGS. 14A-14E are an illustration of a cross section 170 of a portion of a series of trenches 173 etched in a silicon carbide material substrate 172 that explains this phenom-enon by showing a cross sections 170 of a series of trenches 173 of a substrate of silicon carbide 172 with a patterned etch mask 171 on the surface of the silicon carbide substrate 172 with exposed areas 173 in the etch mask 171. These series of cross sections 170 in FIGS. 14A through 14E of the substrate 172 are at different points in time as the etch in the substrate 172 is performed. FIG. 14A shows the substrate 172 before the etch has begun. On the surface of the substrate 172 there is a patterned etch mask 171 on a silicon carbide substrate 172 with openings 173 exposing the substrate surface 172 and where the substrate 172 can be etched. As the etching begins, as shown in FIG. 14B, an approxi-mately 45-degree slant or slope 175 will be created at the edge of the hard mask 171 open features 173. This is a result of the etch mask 171 distorting the electrical field lines impinging on the etch mask 171 on the substrate surface 172, thereby effectively causing increased ion bombardment onto the exposed etch mask 171 corners that erodes the corners 175 faster than the areas surrounding the etch mask
171
IndependentSiC
This approximately 45-degree taper 175 continues to grow as the etch proceeds and the trench 174 features get deeper. As illustrated in FIG. 14C, eventually the 45-degree taper 175 grows to the point where it starts to intersect with the sidewalls 177 of the etched trench features 173 in the silicon carbide substrate 172. As the 45-degree taper 175 continues beyond the edge of the open trench 173 and into the silicon carbide, it begins to propagate into the top edge of the silicon carbide trench 176, as shown in FIG. 14B. Once the etch has been completed and the etch mask 171 has been removed, the faceting 176 that has been made at the top of the sidewalls 177 of the trenches 173 made in the silicon carbide substrate 172 are now permanent as shown in FIG. 14E. Importantly, if the thickness of the etch mask 171 is sufficiently thick or the mask selectively is sufficiently high, then the edge of the 45-degree taper 175 does not reach the top edge of the trench 173 during the etch time and no top-hat facet 176 will be formed at the top of the sidewalls
177
IndependentSiC
The calculation for the etch mask 171 thickness required to avoid the formation of the faceting 176 is as follows. If it is assumed a near vertical etch mask 171 sidewall is started with and that the facet angle 176 formed in the etch mask 171 material is 45 degrees, which is what is experimentally observed, the etch mask 171 thickness required to prevent the facet (top hat) 176 from forming in the etched features 173 in the silicon carbide substrate 172 is simply two times the etch mask 171 thickness removed during the etch. So, if, for instance it is desired to etch features having a depth 174 of 100 microns into silicon carbide substrate 172, in which the mask selectivity is 20:1, it can be calculated that the etch mask 171 must be at least 5 microns in thickness to have any etch mask 171 remaining at the end of the etch to this depth 174 and the thickness of the etch mask 171 must be at least 10 microns to avoid the faceting 176, or in general: Thickness of Etch Mask>2*(Etch Depth/Mask Selec-tivity). B₁ FIG. 15 is a series of four Scanning Electron Microscope (SEM) images 180 in four quadrants, 181, 182, 183, and 184, showing etched features 185 into a silicon carbide substrate 186. The top of the unetched portion of the silicon carbide substrate 186 is where an etch mask was located that was removed prior to these images 180 being taken. As can be seen, quadrant 1 in the top left corner 181 is a series of vias or holes having edge dimensions of 50 microns that are etched into the silicon carbide substrate 186, quadrant 2 in the top right corner 182 is a series of posts or pillars having edge dimensions of 25 microns that are etched into the silicon carbide substrate 186, quadrant 3 in the bottom left corner 183 is a series of vias or holes having edge dimen-sions of 25 microns that are etched in the silicon carbide substrate 186, and quadrant 4 in the bottom right 184 is a series of posts or pillars having edge dimensions of microns that are etched into the silicon carbide substrate
186
IndependentSiC
These images illustrate how the etch of the present invention can be used to make deep, high-aspect features having a variety of sizes and shapes in silicon carbide material layers and/or substrates 186. While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifica-tions and equivalent arrangements included within the spirit and scope of the appended claims. What is claimed is:
Materials
Materials described outside the worked examples.
silicon carbide
SiC
Substrate To Be Etched
hard etch mask
Etch Mask
Process steps
Additional fabrication and treatment steps described in the patent.
1
Icp Etch
Step 1
Temperature
-5, 20°C
Duration
10, 120 min
Ambient
SF6/O2/Ar plasma
Process details
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
sem
SEM
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO SILICON CARBIDE AND GALLIUM NITRIDE
Mehmet Ozgur, Michael Pedersen, Michael A. Huff
Corporation for National Research Initiatives, Reston, VA (US)·May 14, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 is an illustration of a deep, high-aspect ratio feature etched into the materials, and using the method described herein.
FIG. 2
FIG. 2 is an illustration of the plasma etching system that uses the method of etching the materials described herein.
FIG. 3
FIGS. 3A-3D are an illustration of a first substrate con- figuration to etch deep, high-aspect ratio features into a substrate layer of silicon carbide according …
FIG. 4
FIGS. 4A-4D are an illustration of a second substrate configuration to etch deep, high-aspect ratio features into a composite substrate according to the present …
FIG. 5
FIGS. 5A-5D are an illustration of a third substrate configuration to etch deep, high-aspect ratio features into a substrate composed of a gallium nitride layer …
FIG. 6
FIGS. 6A-6D are an illustration of a fourth substrate configuration to etch deep, high-aspect ratio features into a substrate composed of silicon carbide …
FIG. 7
FIGS. 7A-7F are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 8
FIGS. 8A-8D are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 9
FIG. 9 is a table of the etch parameters of the etch process described herein.
FIG. 10
FIG. 10 is a table of process characteristics derived from metrology of etched structures in the design-of-experiments (DOE) described herein.
FIG. 11
FIG. 11 is an illustration of the portion of the etch mask used in the design-of-experiments (DOE) described herein.
FIG. 12
FIGS. 12A and 12B are an illustration of two substrates with feature width to be etched that are as in
FIG. 13
FIG. 13 is an illustration of the facets of the un-etched features as described herein.
FIG. 14
FIGS. 14A-14E are an illustration of the mechanism involved in the formation of facets of the un-etched features as described herein.
FIG. 15
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
FIG. 20
FIG. 20 8C. The etch method used on the etch mask 103 depends on the etch mask material, but includes wet chemical etching, reactive ion etching, plasma …
FIG. 25
FIG. 25 8D. Alternatively, the etch mask can be made on the substrate using lift-off patterning technology. Using liftoff, a photo- sensitive polymer is …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
9 independent · 0 dependent
1
IndependentSiChard etch mask
Fabricate substrates of silicon carbide having suitable patterned hard etch mask on the substrate surfaces;
2
IndependentSiC
Perform pre-etch inspection/data collection on the substrates;
3
IndependentSiC
Etch substrates using a predetermined etch process parameter setting selected as part of the DOE;
4
IndependentSiC
Collect post-etch metrology data on each substrate;
5
IndependentSiC
Clean substrate; and then,
6
IndependentSiCGaNSF₆O₂
Collect cross-section metrology data on substrates. For common reference, a mask layout was designed having a number of different sized features that is used to fabricate the etch mask on the silicon carbide material. A cell 130 from the etch mask layout used for the DOE is shown in FIG. 11 and the top row 131 includes 25 um 132, 50 um 133 and 100 um 134 via arrays. The bottom row 135 is corresponding post arrays having dimensions of 25 um 136, 50 um 137 and 100 um 138. The dark areas are etched and this cell 130 shown in FIG. 11 is stepped out multiple times across the silicon carbide surface. In performance of the DOE, each of the individual process parameters are varied one at a time and the process outcomes are measured by taking metrology measurements on the substrates both before and after etching. Once all data of the DOE has been collected, multiple regression analysis is used to analyze and map the data in order to determine the weighted optimal etch process parameter settings by interpolation of the derived regression model. The definition of an optimal or near optimal etch process depends on the exact specifics of what is desired in the outcome of an etch process. Therefore, there are variations on the recipe (method) for various process outcomes. In any case, the etch processes given below can be used to etch into silicon carbide materials to depths of less than 1 micron to several millimeters and with aspect ratios ranging from less than “1 to 1”, from an aspect ratio of between “1 to 1” to “10 to 1”, and even aspect ratios to well over “10 to 1”. It should be noted that the hard mask will need to be adjusted to be sufficiently thick so that it will be able to remain until the etch depth desired is obtained. The preferred embodiment method for the etching of deep, high aspect ratio features using an Inductively-Coupled Plasma (ICP) etch system into silicon carbide (and B₁ gallium nitride on silicon carbide) is comprised of a Radio Frequency (RF) bias power on the substrate being etched of between 50 and 200 Watts, a substrate chuck temperature of between −5 and 20 degrees Celsius, an Oxygen (O₂) gas flow rate of between 0 and 20 standard cubic centimeters per minute (sccm), an etch chamber gas pressure of between 1 and 15 milliTorr, a Sulfur Hexafluoride (SF₆) gas flow rate of between 50 and 150 standard cubic centimeters per minute (sccm), and a Radio Frequency (RF) antenna power to create the plasma inside the etch chamber of between 1500 and 2500 Watts. Additionally, if the etcher employs a heat shield and a temperature controlled chuck, then the preferred embodi-ment uses a heat shield temperature of between 100 and 200 degrees-Celsius and a Helium gas substrate cooling pressure of between 2 and 20 Pascals. Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28 (FIG. 2), which enables spatial redistri-bution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate 12 as shown in FIG. 2, then the preferred embodiment uses a top magnet current of between 4 and 8 Amps, a center magnet current of 8 and 12 Amps, and a bottom magnet current of between 4 and 8 Amps. Typically, depending on the depth of the etch and the time spent etching, a cleaning cycle may be performed between etch cycles. During the cleaning cycle, the flow rate of etch gas, specifically Sulfur Hexafluoride (SF₆) is reduced to 0 standard cubic centimeters per minute (sccm), and the flow rate of Oxygen (O₂) gas is continued into the etch chamber with a plasma in order to perform a cleaning of the etch chamber. Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 10 and 120 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 10 minutes that is performed in between each etch cycle, would be one example of suitable times. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). It is important to note that there is a range of values for each process parameter. There are several reasons for this. First, each etch tool will have slightly different values of each process parameter in order to have optimal etch results based on slight differences in the tool design and perfor-mance. Second, the thermal characteristics, specifically the thermal resistance from the surface of the substrate to the backside of the substrate where the active Helium cooling is used to control the temperature of the substrate, will vary from substrate to substrate, depending on the exact thickness of the substrate and layers on the substrate, and this has a slight impact on the etch outcome. Therefore, the etch recipe will be slightly adjusted to compensate for differences in the substrate configuration and thickness of the material layers. The above process method is suitable for etching deep, high aspect ratio features into silicon carbide (and gallium nitride on silicon carbide). However, a more preferred embodiment of the method for the deep, high-aspect ratio etching of silicon carbide (or gallium nitride on silicon carbide) is as follows: RF Bias Power: 90 to 110 Watts substrate temperature: 0 to 14 C O₂ gas flow: 8 to 12 sccm Chamber pressure: 4 to 6 milliTorr SF₆ gas flow: 80 to 120 sccm RF antenna power: 1900 to 2100 Watts Additionally, if the etch is performed on an ICP etch tool that employs a heat shield and a temperature controlled chuck, then the more preferred embodiment uses: Heat shield temperature: 140 to 160 C He cooling pressure: 3 to 7 Pascals Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28, which enables spatial redistribution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate as shown in FIG. 2, then the more preferred embodiment uses: Top magnet current: 5.9 to 6.3 Amps Center magnet current: 10.0 to 10.2 Amps Bottom magnet current: 5.9 to 6.3 Amps Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 20 and 40 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 5 minutes that is performed in between each etch cycle, would be one example of suitable times. Using the above process parameter settings will result in an average etch rate of approximately 1 micron per minute, approximately an 88 to 92-degree nearly vertical sidewall, an approximately 130 to 1 mask selectivity with a copper etch mask, an approximate aspect ratio of 12 to 1, an approximate etch depth uniformity across the substrate of +/−1.5% of the etch depth, no defects in the etched features, and an etch depth of over 150 microns. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). The process of etching of the present invention can be used to etch features partly into the silicon carbide material layer or substrate, as well as completely through the silicon carbide material layer or substrate, depending on the etch depth desired and the device or structure design. The process of etching of the present invention can also be used to etch deep, high-aspect ratio features into any of the four substrate configurations shown in FIGS. 3A-3D, 4A-4D, 5A-5D and 6A-6D. Moreover, the process of etching of the present invention can be used to etch deep, high-aspect ratio features into gallium nitride layers on silicon carbide substrates. It is noted that the above etch results are dependent on the exact features and dimensions, the amount of area of the substrate surface being etched, the thickness and type of etch mask, and the depth of the etch, and therefore these results may vary depending on the exact details of the etch and substrate being employed. Therefore, it should also be noted that the recipes include process parameters that are given as 55 a range of values. One reason for this is that there will be slight differences in tool settings from tool to tool. Secondly, there may be slight differences based on the exact substrate configuration used, including the exact type of materials used in the substrate layers and the thickness that will impact the exact process settings in order to obtain the optimal or near optimal outcome. Additionally, depending the exact situation there may be additional requirements that must be met in order to obtain an optimal or near optimal result with the etch process of silicon carbide of the present invention. First, depending on the depth of the etch and the type of etch mask used, it may B₁ be desirable to use the minimal amount of etch mask material across the substrate surface, particularly if the etch mask is made from nickel. The reason is that if larger areas of the surface are covered by the etch mask, it increases the risk of particulates which can result in etch defects in the etched areas of the substrate. Second, if uniform trench etch depths are desired, then the open area features in the etch mask should have the same nominal dimensions across the wafer. This is illustrated in FIGS. 12A and 12B, in which two substrates having differ-ent dimensions 140 in the etch mask are shown in FIGS. 12A and 12B. In FIG. 12A, which is a plane view of a substrate 141, an etch mask 142 covers most of the substrate 141, except for the open area features in the etch mask given by the rectangles 143, 144 and 145, where the silicon carbide would be exposed and can be etched using the present invention. The etch rate depends on the size of the exposed areas on the substrate. That is, if the mask width is larger, the etch rate will be higher and conversely, if the masking width is smaller, the etch rate will be lower. Consequently, if there are features having different sized widths, the etch rate will vary, and by consequence, so will the depths of the etch features. Therefore, using the etch of the present invention, in performing an etch of the present invention on substrate 141, feature 145 would have the highest etch rate and for a given etch time, would have the deepest trench, whereas feature 144 would have a less deep etch for the same etch time, and feature 143 would have the shallowest etch for the same etch time. In comparison, substrate 146 with an etch mask 147 has three features, given by 148, 149 and 150 all having the same feature widths. For a given etch time, the features 148, 149 and 150 will all have approximately the same depth of the trenches. Therefore, in order to have uniform trench depths, the widths of the features should be approximately equal across a substrate such as shown on substrate 146 in FIG. 12B. Third, the etch chamber should be cleaned on a periodic basis between etches. For long etches, the chamber may need to be cleaned after each sample has been etched. This will reduce the amount of particulates in the etch chamber, and thereby, reduce the probability of etch defects. After an etch has been completed, the etch chamber walls are coated with a complex material compound as a by-product of the etch process that can flake off from the chamber walls and land onto the substrate surface. The cleaning process involves a combination of oxygen plasma cleans and mechanical scrubbing of the chamber liner walls with an abrasive pad. Wiping the walls of the etch chamber with a solvent may also be advised in the cleaning procedure. A suitable solvent for the wiping of the chamber walls is isopropylalcohol. Fourth, for a given mask material and selectivity as well as depth of etched features, the hard mask may need to be sufficiently thick so as to reduce or eliminate faceting of the sidewalls of the etched silicon carbide material. FIG. 13 is an illustration of a cross section of a portion of a series of trenches 163 etched in silicon carbide material layer or substrate 167 showing an example of faceting 161 at the top of the sidewalls 162 of the etched trenches 163 into a silicon carbide material layer or substrate 167. The un-etched portion of the silicon carbide 165 on either side of the trenches 163 have tops 164 which is the surface of the silicon carbide substrate where the etch mask was located, but has been removed in this illustration. As can be seen in the top portion of the sidewalls 162, there is a sloping sidewall 161 that has a less steep angle than the vertical or nearly vertical sidewalls 162 of the trenches 163 and this is termed “faceting.” The amount of faceting of the etched silicon carbide material is directly related to the erosion of the hard mask. FIGS. 14A-14E are an illustration of a cross section 170 of a portion of a series of trenches 173 etched in a silicon carbide material substrate 172 that explains this phenom-enon by showing a cross sections 170 of a series of trenches 173 of a substrate of silicon carbide 172 with a patterned etch mask 171 on the surface of the silicon carbide substrate 172 with exposed areas 173 in the etch mask 171. These series of cross sections 170 in FIGS. 14A through 14E of the substrate 172 are at different points in time as the etch in the substrate 172 is performed. FIG. 14A shows the substrate 172 before the etch has begun. On the surface of the substrate 172 there is a patterned etch mask 171 on a silicon carbide substrate 172 with openings 173 exposing the substrate surface 172 and where the substrate 172 can be etched. As the etching begins, as shown in FIG. 14B, an approxi-mately 45-degree slant or slope 175 will be created at the edge of the hard mask 171 open features 173. This is a result of the etch mask 171 distorting the electrical field lines impinging on the etch mask 171 on the substrate surface 172, thereby effectively causing increased ion bombardment onto the exposed etch mask 171 corners that erodes the corners 175 faster than the areas surrounding the etch mask
171
IndependentSiC
This approximately 45-degree taper 175 continues to grow as the etch proceeds and the trench 174 features get deeper. As illustrated in FIG. 14C, eventually the 45-degree taper 175 grows to the point where it starts to intersect with the sidewalls 177 of the etched trench features 173 in the silicon carbide substrate 172. As the 45-degree taper 175 continues beyond the edge of the open trench 173 and into the silicon carbide, it begins to propagate into the top edge of the silicon carbide trench 176, as shown in FIG. 14B. Once the etch has been completed and the etch mask 171 has been removed, the faceting 176 that has been made at the top of the sidewalls 177 of the trenches 173 made in the silicon carbide substrate 172 are now permanent as shown in FIG. 14E. Importantly, if the thickness of the etch mask 171 is sufficiently thick or the mask selectively is sufficiently high, then the edge of the 45-degree taper 175 does not reach the top edge of the trench 173 during the etch time and no top-hat facet 176 will be formed at the top of the sidewalls
177
IndependentSiC
The calculation for the etch mask 171 thickness required to avoid the formation of the faceting 176 is as follows. If it is assumed a near vertical etch mask 171 sidewall is started with and that the facet angle 176 formed in the etch mask 171 material is 45 degrees, which is what is experimentally observed, the etch mask 171 thickness required to prevent the facet (top hat) 176 from forming in the etched features 173 in the silicon carbide substrate 172 is simply two times the etch mask 171 thickness removed during the etch. So, if, for instance it is desired to etch features having a depth 174 of 100 microns into silicon carbide substrate 172, in which the mask selectivity is 20:1, it can be calculated that the etch mask 171 must be at least 5 microns in thickness to have any etch mask 171 remaining at the end of the etch to this depth 174 and the thickness of the etch mask 171 must be at least 10 microns to avoid the faceting 176, or in general: Thickness of Etch Mask>2*(Etch Depth/Mask Selec-tivity). B₁ FIG. 15 is a series of four Scanning Electron Microscope (SEM) images 180 in four quadrants, 181, 182, 183, and 184, showing etched features 185 into a silicon carbide substrate 186. The top of the unetched portion of the silicon carbide substrate 186 is where an etch mask was located that was removed prior to these images 180 being taken. As can be seen, quadrant 1 in the top left corner 181 is a series of vias or holes having edge dimensions of 50 microns that are etched into the silicon carbide substrate 186, quadrant 2 in the top right corner 182 is a series of posts or pillars having edge dimensions of 25 microns that are etched into the silicon carbide substrate 186, quadrant 3 in the bottom left corner 183 is a series of vias or holes having edge dimen-sions of 25 microns that are etched in the silicon carbide substrate 186, and quadrant 4 in the bottom right 184 is a series of posts or pillars having edge dimensions of microns that are etched into the silicon carbide substrate
186
IndependentSiC
These images illustrate how the etch of the present invention can be used to make deep, high-aspect features having a variety of sizes and shapes in silicon carbide material layers and/or substrates 186. While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifica-tions and equivalent arrangements included within the spirit and scope of the appended claims. What is claimed is:
Materials
Materials described outside the worked examples.
silicon carbide
SiC
Substrate To Be Etched
hard etch mask
Etch Mask
Process steps
Additional fabrication and treatment steps described in the patent.
1
Icp Etch
Step 1
Temperature
-5, 20°C
Duration
10, 120 min
Ambient
SF6/O2/Ar plasma
Process details
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
sem
SEM
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO SILICON CARBIDE AND GALLIUM NITRIDE
Mehmet Ozgur, Michael Pedersen, Michael A. Huff
Corporation for National Research Initiatives, Reston, VA (US)·May 14, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1 is an illustration of a deep, high-aspect ratio feature etched into the materials, and using the method described herein.
FIG. 2
FIG. 2 is an illustration of the plasma etching system that uses the method of etching the materials described herein.
FIG. 3
FIGS. 3A-3D are an illustration of a first substrate con- figuration to etch deep, high-aspect ratio features into a substrate layer of silicon carbide according …
FIG. 4
FIGS. 4A-4D are an illustration of a second substrate configuration to etch deep, high-aspect ratio features into a composite substrate according to the present …
FIG. 5
FIGS. 5A-5D are an illustration of a third substrate configuration to etch deep, high-aspect ratio features into a substrate composed of a gallium nitride layer …
FIG. 6
FIGS. 6A-6D are an illustration of a fourth substrate configuration to etch deep, high-aspect ratio features into a substrate composed of silicon carbide …
FIG. 7
FIGS. 7A-7F are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 8
FIGS. 8A-8D are an illustration of making an etch mask on the substrate according to the present invention.
FIG. 9
FIG. 9 is a table of the etch parameters of the etch process described herein.
FIG. 10
FIG. 10 is a table of process characteristics derived from metrology of etched structures in the design-of-experiments (DOE) described herein.
FIG. 11
FIG. 11 is an illustration of the portion of the etch mask used in the design-of-experiments (DOE) described herein.
FIG. 12
FIGS. 12A and 12B are an illustration of two substrates with feature width to be etched that are as in
FIG. 13
FIG. 13 is an illustration of the facets of the un-etched features as described herein.
FIG. 14
FIGS. 14A-14E are an illustration of the mechanism involved in the formation of facets of the un-etched features as described herein.
FIG. 15
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
FIG. 20
FIG. 20 8C. The etch method used on the etch mask 103 depends on the etch mask material, but includes wet chemical etching, reactive ion etching, plasma …
FIG. 25
FIG. 25 8D. Alternatively, the etch mask can be made on the substrate using lift-off patterning technology. Using liftoff, a photo- sensitive polymer is …
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
9 independent · 0 dependent
1
IndependentSiChard etch mask
Fabricate substrates of silicon carbide having suitable patterned hard etch mask on the substrate surfaces;
2
IndependentSiC
Perform pre-etch inspection/data collection on the substrates;
3
IndependentSiC
Etch substrates using a predetermined etch process parameter setting selected as part of the DOE;
4
IndependentSiC
Collect post-etch metrology data on each substrate;
5
IndependentSiC
Clean substrate; and then,
6
IndependentSiCGaNSF₆O₂
Collect cross-section metrology data on substrates. For common reference, a mask layout was designed having a number of different sized features that is used to fabricate the etch mask on the silicon carbide material. A cell 130 from the etch mask layout used for the DOE is shown in FIG. 11 and the top row 131 includes 25 um 132, 50 um 133 and 100 um 134 via arrays. The bottom row 135 is corresponding post arrays having dimensions of 25 um 136, 50 um 137 and 100 um 138. The dark areas are etched and this cell 130 shown in FIG. 11 is stepped out multiple times across the silicon carbide surface. In performance of the DOE, each of the individual process parameters are varied one at a time and the process outcomes are measured by taking metrology measurements on the substrates both before and after etching. Once all data of the DOE has been collected, multiple regression analysis is used to analyze and map the data in order to determine the weighted optimal etch process parameter settings by interpolation of the derived regression model. The definition of an optimal or near optimal etch process depends on the exact specifics of what is desired in the outcome of an etch process. Therefore, there are variations on the recipe (method) for various process outcomes. In any case, the etch processes given below can be used to etch into silicon carbide materials to depths of less than 1 micron to several millimeters and with aspect ratios ranging from less than “1 to 1”, from an aspect ratio of between “1 to 1” to “10 to 1”, and even aspect ratios to well over “10 to 1”. It should be noted that the hard mask will need to be adjusted to be sufficiently thick so that it will be able to remain until the etch depth desired is obtained. The preferred embodiment method for the etching of deep, high aspect ratio features using an Inductively-Coupled Plasma (ICP) etch system into silicon carbide (and B₁ gallium nitride on silicon carbide) is comprised of a Radio Frequency (RF) bias power on the substrate being etched of between 50 and 200 Watts, a substrate chuck temperature of between −5 and 20 degrees Celsius, an Oxygen (O₂) gas flow rate of between 0 and 20 standard cubic centimeters per minute (sccm), an etch chamber gas pressure of between 1 and 15 milliTorr, a Sulfur Hexafluoride (SF₆) gas flow rate of between 50 and 150 standard cubic centimeters per minute (sccm), and a Radio Frequency (RF) antenna power to create the plasma inside the etch chamber of between 1500 and 2500 Watts. Additionally, if the etcher employs a heat shield and a temperature controlled chuck, then the preferred embodi-ment uses a heat shield temperature of between 100 and 200 degrees-Celsius and a Helium gas substrate cooling pressure of between 2 and 20 Pascals. Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28 (FIG. 2), which enables spatial redistri-bution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate 12 as shown in FIG. 2, then the preferred embodiment uses a top magnet current of between 4 and 8 Amps, a center magnet current of 8 and 12 Amps, and a bottom magnet current of between 4 and 8 Amps. Typically, depending on the depth of the etch and the time spent etching, a cleaning cycle may be performed between etch cycles. During the cleaning cycle, the flow rate of etch gas, specifically Sulfur Hexafluoride (SF₆) is reduced to 0 standard cubic centimeters per minute (sccm), and the flow rate of Oxygen (O₂) gas is continued into the etch chamber with a plasma in order to perform a cleaning of the etch chamber. Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 10 and 120 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 10 minutes that is performed in between each etch cycle, would be one example of suitable times. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). It is important to note that there is a range of values for each process parameter. There are several reasons for this. First, each etch tool will have slightly different values of each process parameter in order to have optimal etch results based on slight differences in the tool design and perfor-mance. Second, the thermal characteristics, specifically the thermal resistance from the surface of the substrate to the backside of the substrate where the active Helium cooling is used to control the temperature of the substrate, will vary from substrate to substrate, depending on the exact thickness of the substrate and layers on the substrate, and this has a slight impact on the etch outcome. Therefore, the etch recipe will be slightly adjusted to compensate for differences in the substrate configuration and thickness of the material layers. The above process method is suitable for etching deep, high aspect ratio features into silicon carbide (and gallium nitride on silicon carbide). However, a more preferred embodiment of the method for the deep, high-aspect ratio etching of silicon carbide (or gallium nitride on silicon carbide) is as follows: RF Bias Power: 90 to 110 Watts substrate temperature: 0 to 14 C O₂ gas flow: 8 to 12 sccm Chamber pressure: 4 to 6 milliTorr SF₆ gas flow: 80 to 120 sccm RF antenna power: 1900 to 2100 Watts Additionally, if the etch is performed on an ICP etch tool that employs a heat shield and a temperature controlled chuck, then the more preferred embodiment uses: Heat shield temperature: 140 to 160 C He cooling pressure: 3 to 7 Pascals Additionally, if the etch is performed on an ICP etch tool that employs an electromagnetic neutral loop comprised of magnetic coils 28, which enables spatial redistribution of ions 22 in the plasma 20 to enhance etching uniformity across the substrate as shown in FIG. 2, then the more preferred embodiment uses: Top magnet current: 5.9 to 6.3 Amps Center magnet current: 10.0 to 10.2 Amps Bottom magnet current: 5.9 to 6.3 Amps Although any etch cycle time and cleaning time can be used effectively for the etch method of the present invention, an etch cycle time of between 20 and 40 minutes, and an Oxygen (O₂) clean cycle time of between 30 seconds and 5 minutes that is performed in between each etch cycle, would be one example of suitable times. Using the above process parameter settings will result in an average etch rate of approximately 1 micron per minute, approximately an 88 to 92-degree nearly vertical sidewall, an approximately 130 to 1 mask selectivity with a copper etch mask, an approximate aspect ratio of 12 to 1, an approximate etch depth uniformity across the substrate of +/−1.5% of the etch depth, no defects in the etched features, and an etch depth of over 150 microns. Argon gas may be introduced into the process chamber during etching to modify the etch rate, mask selectivity, and anisotropy of the etched features in the silicon carbide, and gallium nitride if present. The amount of Argon gas intro-duced will be between 0 and 50 standard cubic centimeters per minute (sccm). The process of etching of the present invention can be used to etch features partly into the silicon carbide material layer or substrate, as well as completely through the silicon carbide material layer or substrate, depending on the etch depth desired and the device or structure design. The process of etching of the present invention can also be used to etch deep, high-aspect ratio features into any of the four substrate configurations shown in FIGS. 3A-3D, 4A-4D, 5A-5D and 6A-6D. Moreover, the process of etching of the present invention can be used to etch deep, high-aspect ratio features into gallium nitride layers on silicon carbide substrates. It is noted that the above etch results are dependent on the exact features and dimensions, the amount of area of the substrate surface being etched, the thickness and type of etch mask, and the depth of the etch, and therefore these results may vary depending on the exact details of the etch and substrate being employed. Therefore, it should also be noted that the recipes include process parameters that are given as 55 a range of values. One reason for this is that there will be slight differences in tool settings from tool to tool. Secondly, there may be slight differences based on the exact substrate configuration used, including the exact type of materials used in the substrate layers and the thickness that will impact the exact process settings in order to obtain the optimal or near optimal outcome. Additionally, depending the exact situation there may be additional requirements that must be met in order to obtain an optimal or near optimal result with the etch process of silicon carbide of the present invention. First, depending on the depth of the etch and the type of etch mask used, it may B₁ be desirable to use the minimal amount of etch mask material across the substrate surface, particularly if the etch mask is made from nickel. The reason is that if larger areas of the surface are covered by the etch mask, it increases the risk of particulates which can result in etch defects in the etched areas of the substrate. Second, if uniform trench etch depths are desired, then the open area features in the etch mask should have the same nominal dimensions across the wafer. This is illustrated in FIGS. 12A and 12B, in which two substrates having differ-ent dimensions 140 in the etch mask are shown in FIGS. 12A and 12B. In FIG. 12A, which is a plane view of a substrate 141, an etch mask 142 covers most of the substrate 141, except for the open area features in the etch mask given by the rectangles 143, 144 and 145, where the silicon carbide would be exposed and can be etched using the present invention. The etch rate depends on the size of the exposed areas on the substrate. That is, if the mask width is larger, the etch rate will be higher and conversely, if the masking width is smaller, the etch rate will be lower. Consequently, if there are features having different sized widths, the etch rate will vary, and by consequence, so will the depths of the etch features. Therefore, using the etch of the present invention, in performing an etch of the present invention on substrate 141, feature 145 would have the highest etch rate and for a given etch time, would have the deepest trench, whereas feature 144 would have a less deep etch for the same etch time, and feature 143 would have the shallowest etch for the same etch time. In comparison, substrate 146 with an etch mask 147 has three features, given by 148, 149 and 150 all having the same feature widths. For a given etch time, the features 148, 149 and 150 will all have approximately the same depth of the trenches. Therefore, in order to have uniform trench depths, the widths of the features should be approximately equal across a substrate such as shown on substrate 146 in FIG. 12B. Third, the etch chamber should be cleaned on a periodic basis between etches. For long etches, the chamber may need to be cleaned after each sample has been etched. This will reduce the amount of particulates in the etch chamber, and thereby, reduce the probability of etch defects. After an etch has been completed, the etch chamber walls are coated with a complex material compound as a by-product of the etch process that can flake off from the chamber walls and land onto the substrate surface. The cleaning process involves a combination of oxygen plasma cleans and mechanical scrubbing of the chamber liner walls with an abrasive pad. Wiping the walls of the etch chamber with a solvent may also be advised in the cleaning procedure. A suitable solvent for the wiping of the chamber walls is isopropylalcohol. Fourth, for a given mask material and selectivity as well as depth of etched features, the hard mask may need to be sufficiently thick so as to reduce or eliminate faceting of the sidewalls of the etched silicon carbide material. FIG. 13 is an illustration of a cross section of a portion of a series of trenches 163 etched in silicon carbide material layer or substrate 167 showing an example of faceting 161 at the top of the sidewalls 162 of the etched trenches 163 into a silicon carbide material layer or substrate 167. The un-etched portion of the silicon carbide 165 on either side of the trenches 163 have tops 164 which is the surface of the silicon carbide substrate where the etch mask was located, but has been removed in this illustration. As can be seen in the top portion of the sidewalls 162, there is a sloping sidewall 161 that has a less steep angle than the vertical or nearly vertical sidewalls 162 of the trenches 163 and this is termed “faceting.” The amount of faceting of the etched silicon carbide material is directly related to the erosion of the hard mask. FIGS. 14A-14E are an illustration of a cross section 170 of a portion of a series of trenches 173 etched in a silicon carbide material substrate 172 that explains this phenom-enon by showing a cross sections 170 of a series of trenches 173 of a substrate of silicon carbide 172 with a patterned etch mask 171 on the surface of the silicon carbide substrate 172 with exposed areas 173 in the etch mask 171. These series of cross sections 170 in FIGS. 14A through 14E of the substrate 172 are at different points in time as the etch in the substrate 172 is performed. FIG. 14A shows the substrate 172 before the etch has begun. On the surface of the substrate 172 there is a patterned etch mask 171 on a silicon carbide substrate 172 with openings 173 exposing the substrate surface 172 and where the substrate 172 can be etched. As the etching begins, as shown in FIG. 14B, an approxi-mately 45-degree slant or slope 175 will be created at the edge of the hard mask 171 open features 173. This is a result of the etch mask 171 distorting the electrical field lines impinging on the etch mask 171 on the substrate surface 172, thereby effectively causing increased ion bombardment onto the exposed etch mask 171 corners that erodes the corners 175 faster than the areas surrounding the etch mask
171
IndependentSiC
This approximately 45-degree taper 175 continues to grow as the etch proceeds and the trench 174 features get deeper. As illustrated in FIG. 14C, eventually the 45-degree taper 175 grows to the point where it starts to intersect with the sidewalls 177 of the etched trench features 173 in the silicon carbide substrate 172. As the 45-degree taper 175 continues beyond the edge of the open trench 173 and into the silicon carbide, it begins to propagate into the top edge of the silicon carbide trench 176, as shown in FIG. 14B. Once the etch has been completed and the etch mask 171 has been removed, the faceting 176 that has been made at the top of the sidewalls 177 of the trenches 173 made in the silicon carbide substrate 172 are now permanent as shown in FIG. 14E. Importantly, if the thickness of the etch mask 171 is sufficiently thick or the mask selectively is sufficiently high, then the edge of the 45-degree taper 175 does not reach the top edge of the trench 173 during the etch time and no top-hat facet 176 will be formed at the top of the sidewalls
177
IndependentSiC
The calculation for the etch mask 171 thickness required to avoid the formation of the faceting 176 is as follows. If it is assumed a near vertical etch mask 171 sidewall is started with and that the facet angle 176 formed in the etch mask 171 material is 45 degrees, which is what is experimentally observed, the etch mask 171 thickness required to prevent the facet (top hat) 176 from forming in the etched features 173 in the silicon carbide substrate 172 is simply two times the etch mask 171 thickness removed during the etch. So, if, for instance it is desired to etch features having a depth 174 of 100 microns into silicon carbide substrate 172, in which the mask selectivity is 20:1, it can be calculated that the etch mask 171 must be at least 5 microns in thickness to have any etch mask 171 remaining at the end of the etch to this depth 174 and the thickness of the etch mask 171 must be at least 10 microns to avoid the faceting 176, or in general: Thickness of Etch Mask>2*(Etch Depth/Mask Selec-tivity). B₁ FIG. 15 is a series of four Scanning Electron Microscope (SEM) images 180 in four quadrants, 181, 182, 183, and 184, showing etched features 185 into a silicon carbide substrate 186. The top of the unetched portion of the silicon carbide substrate 186 is where an etch mask was located that was removed prior to these images 180 being taken. As can be seen, quadrant 1 in the top left corner 181 is a series of vias or holes having edge dimensions of 50 microns that are etched into the silicon carbide substrate 186, quadrant 2 in the top right corner 182 is a series of posts or pillars having edge dimensions of 25 microns that are etched into the silicon carbide substrate 186, quadrant 3 in the bottom left corner 183 is a series of vias or holes having edge dimen-sions of 25 microns that are etched in the silicon carbide substrate 186, and quadrant 4 in the bottom right 184 is a series of posts or pillars having edge dimensions of microns that are etched into the silicon carbide substrate
186
IndependentSiC
These images illustrate how the etch of the present invention can be used to make deep, high-aspect features having a variety of sizes and shapes in silicon carbide material layers and/or substrates 186. While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifica-tions and equivalent arrangements included within the spirit and scope of the appended claims. What is claimed is:
Materials
Materials described outside the worked examples.
silicon carbide
SiC
Substrate To Be Etched
hard etch mask
Etch Mask
Process steps
Additional fabrication and treatment steps described in the patent.
1
Icp Etch
Step 1
Temperature
-5, 20°C
Duration
10, 120 min
Ambient
SF6/O2/Ar plasma
Process details
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
sem
SEM
FIG. 15 is a scanning electron microscopy (SEM) image illustrating the result of the etch in making posts and vias in substrates, according to the present …
US 2009/0001478 A12009/0001478 A1 * 1/2009 Okamoto............ H01L 29/4175examiner
US 2009/0272982 A12009/0272982 A1 11/2009 Nakamura
US 2009/0314636 A12009/0314636 A1 * 12/2009 Ishikawa............. H01J 37/3266examiner
US 2010/0084372 A12010/0084372 A1 * 4/2010 Taniguchi.............. G11B 5/855examiner
US 2012/0031561 A12012/0031561 A1 * 2/2012 Kim.................. H01J 37/32091examiner
US 2012/0149213 A12012/0149213 A1 6/2012 Nittala
US 2013/0004664 A12013/0004664 A1 * 1/2013 Agrawal................. E21B 41/00examiner
US 2014/0166618 A12014/0166618 A1 6/2014 Tadigadapa
US 2014/0302678 A12014/0302678 A1 10/2014 Paterson
US 2014/0302680 A12014/0302680 A1 10/2014 Singh
US 2015/0034592 A12015/0034592 A1 2/2015 Huff
Cited non-patent literature · 8
Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide. Beheim “Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide” The MEMS Handbook, ed. By M. Gad-el-Hak, CRC Press Boca Raton, FL, pp. 21.1-21.12 (2002).
GaN MMIC Foundry Service. Cree “GaN MMIC Foundry Service” Brochure available on Cree web site at: http://www.cree.com/products/MMIC.asp.
Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process. Evans et al. “Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process” Material Science Forum, 527-529:1115-1118 (2006).
Silicon Carbide MEMS for Harsh Environments. Mehregany et al. “Silicon Carbide MEMS for Harsh Environments” Proc. IEEE 86:1594-1610 (1998).
SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching. Okamoto et al. “SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching” CS ManTech Confer- ence, May 18-21, 2009, Tampa, Florida.
Photoelectrochemical Etching of 6H-SiC. Shor et al. “Photoelectrochemical Etching of 6H-SiC” J. Electrochem. Soc., 141:778-781 (1994).
Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon. Yasseen et al. “Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon” J. MEMS 8:237-242.
A Review of SiC Reactive Ion Etching in Fluorinated Plasmas. Yih et al. “A Review of SiC Reactive Ion Etching in Fluorinated Plasmas” Phys. Stat. Sol. 202:605-642 (1997).
US 2009/0001478 A12009/0001478 A1 * 1/2009 Okamoto............ H01L 29/4175examiner
US 2009/0272982 A12009/0272982 A1 11/2009 Nakamura
US 2009/0314636 A12009/0314636 A1 * 12/2009 Ishikawa............. H01J 37/3266examiner
US 2010/0084372 A12010/0084372 A1 * 4/2010 Taniguchi.............. G11B 5/855examiner
US 2012/0031561 A12012/0031561 A1 * 2/2012 Kim.................. H01J 37/32091examiner
US 2012/0149213 A12012/0149213 A1 6/2012 Nittala
US 2013/0004664 A12013/0004664 A1 * 1/2013 Agrawal................. E21B 41/00examiner
US 2014/0166618 A12014/0166618 A1 6/2014 Tadigadapa
US 2014/0302678 A12014/0302678 A1 10/2014 Paterson
US 2014/0302680 A12014/0302680 A1 10/2014 Singh
US 2015/0034592 A12015/0034592 A1 2/2015 Huff
Cited non-patent literature · 8
Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide. Beheim “Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide” The MEMS Handbook, ed. By M. Gad-el-Hak, CRC Press Boca Raton, FL, pp. 21.1-21.12 (2002).
GaN MMIC Foundry Service. Cree “GaN MMIC Foundry Service” Brochure available on Cree web site at: http://www.cree.com/products/MMIC.asp.
Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process. Evans et al. “Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process” Material Science Forum, 527-529:1115-1118 (2006).
Silicon Carbide MEMS for Harsh Environments. Mehregany et al. “Silicon Carbide MEMS for Harsh Environments” Proc. IEEE 86:1594-1610 (1998).
SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching. Okamoto et al. “SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching” CS ManTech Confer- ence, May 18-21, 2009, Tampa, Florida.
Photoelectrochemical Etching of 6H-SiC. Shor et al. “Photoelectrochemical Etching of 6H-SiC” J. Electrochem. Soc., 141:778-781 (1994).
Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon. Yasseen et al. “Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon” J. MEMS 8:237-242.
A Review of SiC Reactive Ion Etching in Fluorinated Plasmas. Yih et al. “A Review of SiC Reactive Ion Etching in Fluorinated Plasmas” Phys. Stat. Sol. 202:605-642 (1997).
US 2009/0001478 A12009/0001478 A1 * 1/2009 Okamoto............ H01L 29/4175examiner
US 2009/0272982 A12009/0272982 A1 11/2009 Nakamura
US 2009/0314636 A12009/0314636 A1 * 12/2009 Ishikawa............. H01J 37/3266examiner
US 2010/0084372 A12010/0084372 A1 * 4/2010 Taniguchi.............. G11B 5/855examiner
US 2012/0031561 A12012/0031561 A1 * 2/2012 Kim.................. H01J 37/32091examiner
US 2012/0149213 A12012/0149213 A1 6/2012 Nittala
US 2013/0004664 A12013/0004664 A1 * 1/2013 Agrawal................. E21B 41/00examiner
US 2014/0166618 A12014/0166618 A1 6/2014 Tadigadapa
US 2014/0302678 A12014/0302678 A1 10/2014 Paterson
US 2014/0302680 A12014/0302680 A1 10/2014 Singh
US 2015/0034592 A12015/0034592 A1 2/2015 Huff
Cited non-patent literature · 8
Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide. Beheim “Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide” The MEMS Handbook, ed. By M. Gad-el-Hak, CRC Press Boca Raton, FL, pp. 21.1-21.12 (2002).
GaN MMIC Foundry Service. Cree “GaN MMIC Foundry Service” Brochure available on Cree web site at: http://www.cree.com/products/MMIC.asp.
Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process. Evans et al. “Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process” Material Science Forum, 527-529:1115-1118 (2006).
Silicon Carbide MEMS for Harsh Environments. Mehregany et al. “Silicon Carbide MEMS for Harsh Environments” Proc. IEEE 86:1594-1610 (1998).
SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching. Okamoto et al. “SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching” CS ManTech Confer- ence, May 18-21, 2009, Tampa, Florida.
Photoelectrochemical Etching of 6H-SiC. Shor et al. “Photoelectrochemical Etching of 6H-SiC” J. Electrochem. Soc., 141:778-781 (1994).
Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon. Yasseen et al. “Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon” J. MEMS 8:237-242.
A Review of SiC Reactive Ion Etching in Fluorinated Plasmas. Yih et al. “A Review of SiC Reactive Ion Etching in Fluorinated Plasmas” Phys. Stat. Sol. 202:605-642 (1997).
US 2009/0001478 A12009/0001478 A1 * 1/2009 Okamoto............ H01L 29/4175examiner
US 2009/0272982 A12009/0272982 A1 11/2009 Nakamura
US 2009/0314636 A12009/0314636 A1 * 12/2009 Ishikawa............. H01J 37/3266examiner
US 2010/0084372 A12010/0084372 A1 * 4/2010 Taniguchi.............. G11B 5/855examiner
US 2012/0031561 A12012/0031561 A1 * 2/2012 Kim.................. H01J 37/32091examiner
US 2012/0149213 A12012/0149213 A1 6/2012 Nittala
US 2013/0004664 A12013/0004664 A1 * 1/2013 Agrawal................. E21B 41/00examiner
US 2014/0166618 A12014/0166618 A1 6/2014 Tadigadapa
US 2014/0302678 A12014/0302678 A1 10/2014 Paterson
US 2014/0302680 A12014/0302680 A1 10/2014 Singh
US 2015/0034592 A12015/0034592 A1 2/2015 Huff
Cited non-patent literature · 8
Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide. Beheim “Deep Reactive Ion Etching For Bulk Micromachining of Silicon Carbide” The MEMS Handbook, ed. By M. Gad-el-Hak, CRC Press Boca Raton, FL, pp. 21.1-21.12 (2002).
GaN MMIC Foundry Service. Cree “GaN MMIC Foundry Service” Brochure available on Cree web site at: http://www.cree.com/products/MMIC.asp.
Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process. Evans et al. “Deep Reactive Ion Etching (DRIE) of High Aspect Ratio sic Microstructures Using a Time-Multiplexed Etch-Passivate Process” Material Science Forum, 527-529:1115-1118 (2006).
Silicon Carbide MEMS for Harsh Environments. Mehregany et al. “Silicon Carbide MEMS for Harsh Environments” Proc. IEEE 86:1594-1610 (1998).
SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching. Okamoto et al. “SiC Backside Via-Hole Process for GaN HEMT MMICs Using High Etch Rate ICP Etching” CS ManTech Confer- ence, May 18-21, 2009, Tampa, Florida.
Photoelectrochemical Etching of 6H-SiC. Shor et al. “Photoelectrochemical Etching of 6H-SiC” J. Electrochem. Soc., 141:778-781 (1994).
Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon. Yasseen et al. “Surface Micromachining of Polycrystalline SiC Films Using Microfabricated Molds of SiO2 and Polysilicon” J. MEMS 8:237-242.
A Review of SiC Reactive Ion Etching in Fluorinated Plasmas. Yih et al. “A Review of SiC Reactive Ion Etching in Fluorinated Plasmas” Phys. Stat. Sol. 202:605-642 (1997).