LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE | Matter42 Literature
Patent
Atlas literature
Patent
US 12,054,851 B2
LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE
Morris Young, Weiguo Liu, Wen Wan Zhou, Sungnee George Chu et al.
AXT, Inc., Fremont, CA (US)·Aug. 6, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1.
FIG. 2
FIG. 2 illustrates a method for fabricating indium phos- 55 phide wafers using the vertical gradient freeze furnace 100 shown in
FIG. 3
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
FIG. 4
FIG. 4C illustrates etch pit density measurements of six inch VGF sulfur-doped InP substrates, in accordance with an example embodiment of the disclosure.
FIG. 5
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 6
FIG. 6 illustrates photoelastic measurements of indium phosphide substrates, in accordance with an example embodiment of the disclosure.
FIG. 7
FIG. 7 illustrates phase shift and stress direction results for photoelectric measurements of substrates, in accordance with an example embodiment of the …
FIG. 8
FIG. 8 illustrates devices fabricated on low etch pit density indium phosphide wafers, in accordance with an example embodiment of the disclosure.
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 7 dependent
1
IndependentInPInPB₂O₃indium phosphide single crystal wafer
A method for forming single crystal indium phosphide substrates, the method comprising: sealing charge material comprising polycrystalline indium phosphide seed crystal, B₂O₃ encapsulant, and a dopant in a crucible; sealing the crucible in a quartz ampoule; performing a vertical gradient freeze crystal growth pro-cess by heating the ampoule using a multi-zone heating system to progressively melt the charge material until a portion of the seed crystal is melted; starting growth from the partially melted seed by imple-menting a controlled cooling of the multi-zone heating system; applying a temperature gradient of between 1 and 8 C/cm at a melt-crystal interface; controlling a shape of the interface to be concave to the melt utilizing cooling rates in the multi-zone heating system to form a solidified indium phosphide crystal; and slicing the crystal to create indium phosphide wafers of four inches in diameter or larger with an etch pit density of 500 cm⁻² or less.
2
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the cooling of the multi-zone heating system at the rate of 0.1 to 2 C/h.
3
Dependent← claim 1InP
The method according to claim 1, comprising evacu-ating the crucible before sealing it into the quartz ampoule.
4
Dependent← claim 1InP
The method according to claim 1, comprising cooling the charge material at rates of 0.5 to 5 C/h, 1 to 10 C/h and 5 to 20 C/h for different heating zones for the first 300 C, and then at rates of 20-50 C/h to room temperature.
5
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the interface shape to be concave to the melt, with the center being ∼10 mm lower than the edge of the solidified crystal.
6
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a diameter of 6 inches or more.
7
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 200 cm⁻² or less.
8
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 100 cm⁻² or less.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
indium phosphide single crystal wafer
InPsubstrate
Materials
Materials described outside the worked examples.
indium phosphide single crystal
InP
Product Crystal Substrate
Charge Material Seed Crystal
B₂O₃ encapsulant
B₂O₃
Process steps
Additional fabrication and treatment steps described in the patent.
1
Vgf Crystal Growth
Step 1
Process details
method:Vertical Gradient Freeze (VGF)
ampoule:quartz
crucible:pyrolytic boron nitride (PBN)
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
xrd
XRD
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE
Morris Young, Weiguo Liu, Wen Wan Zhou, Sungnee George Chu et al.
AXT, Inc., Fremont, CA (US)·Aug. 6, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1.
FIG. 2
FIG. 2 illustrates a method for fabricating indium phos- 55 phide wafers using the vertical gradient freeze furnace 100 shown in
FIG. 3
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
FIG. 4
FIG. 4C illustrates etch pit density measurements of six inch VGF sulfur-doped InP substrates, in accordance with an example embodiment of the disclosure.
FIG. 5
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 6
FIG. 6 illustrates photoelastic measurements of indium phosphide substrates, in accordance with an example embodiment of the disclosure.
FIG. 7
FIG. 7 illustrates phase shift and stress direction results for photoelectric measurements of substrates, in accordance with an example embodiment of the …
FIG. 8
FIG. 8 illustrates devices fabricated on low etch pit density indium phosphide wafers, in accordance with an example embodiment of the disclosure.
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 7 dependent
1
IndependentInPInPB₂O₃indium phosphide single crystal wafer
A method for forming single crystal indium phosphide substrates, the method comprising: sealing charge material comprising polycrystalline indium phosphide seed crystal, B₂O₃ encapsulant, and a dopant in a crucible; sealing the crucible in a quartz ampoule; performing a vertical gradient freeze crystal growth pro-cess by heating the ampoule using a multi-zone heating system to progressively melt the charge material until a portion of the seed crystal is melted; starting growth from the partially melted seed by imple-menting a controlled cooling of the multi-zone heating system; applying a temperature gradient of between 1 and 8 C/cm at a melt-crystal interface; controlling a shape of the interface to be concave to the melt utilizing cooling rates in the multi-zone heating system to form a solidified indium phosphide crystal; and slicing the crystal to create indium phosphide wafers of four inches in diameter or larger with an etch pit density of 500 cm⁻² or less.
2
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the cooling of the multi-zone heating system at the rate of 0.1 to 2 C/h.
3
Dependent← claim 1InP
The method according to claim 1, comprising evacu-ating the crucible before sealing it into the quartz ampoule.
4
Dependent← claim 1InP
The method according to claim 1, comprising cooling the charge material at rates of 0.5 to 5 C/h, 1 to 10 C/h and 5 to 20 C/h for different heating zones for the first 300 C, and then at rates of 20-50 C/h to room temperature.
5
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the interface shape to be concave to the melt, with the center being ∼10 mm lower than the edge of the solidified crystal.
6
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a diameter of 6 inches or more.
7
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 200 cm⁻² or less.
8
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 100 cm⁻² or less.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
indium phosphide single crystal wafer
InPsubstrate
Materials
Materials described outside the worked examples.
indium phosphide single crystal
InP
Product Crystal Substrate
Charge Material Seed Crystal
B₂O₃ encapsulant
B₂O₃
Process steps
Additional fabrication and treatment steps described in the patent.
1
Vgf Crystal Growth
Step 1
Process details
method:Vertical Gradient Freeze (VGF)
ampoule:quartz
crucible:pyrolytic boron nitride (PBN)
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
xrd
XRD
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE
Morris Young, Weiguo Liu, Wen Wan Zhou, Sungnee George Chu et al.
AXT, Inc., Fremont, CA (US)·Aug. 6, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1.
FIG. 2
FIG. 2 illustrates a method for fabricating indium phos- 55 phide wafers using the vertical gradient freeze furnace 100 shown in
FIG. 3
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
FIG. 4
FIG. 4C illustrates etch pit density measurements of six inch VGF sulfur-doped InP substrates, in accordance with an example embodiment of the disclosure.
FIG. 5
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 6
FIG. 6 illustrates photoelastic measurements of indium phosphide substrates, in accordance with an example embodiment of the disclosure.
FIG. 7
FIG. 7 illustrates phase shift and stress direction results for photoelectric measurements of substrates, in accordance with an example embodiment of the …
FIG. 8
FIG. 8 illustrates devices fabricated on low etch pit density indium phosphide wafers, in accordance with an example embodiment of the disclosure.
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 7 dependent
1
IndependentInPInPB₂O₃indium phosphide single crystal wafer
A method for forming single crystal indium phosphide substrates, the method comprising: sealing charge material comprising polycrystalline indium phosphide seed crystal, B₂O₃ encapsulant, and a dopant in a crucible; sealing the crucible in a quartz ampoule; performing a vertical gradient freeze crystal growth pro-cess by heating the ampoule using a multi-zone heating system to progressively melt the charge material until a portion of the seed crystal is melted; starting growth from the partially melted seed by imple-menting a controlled cooling of the multi-zone heating system; applying a temperature gradient of between 1 and 8 C/cm at a melt-crystal interface; controlling a shape of the interface to be concave to the melt utilizing cooling rates in the multi-zone heating system to form a solidified indium phosphide crystal; and slicing the crystal to create indium phosphide wafers of four inches in diameter or larger with an etch pit density of 500 cm⁻² or less.
2
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the cooling of the multi-zone heating system at the rate of 0.1 to 2 C/h.
3
Dependent← claim 1InP
The method according to claim 1, comprising evacu-ating the crucible before sealing it into the quartz ampoule.
4
Dependent← claim 1InP
The method according to claim 1, comprising cooling the charge material at rates of 0.5 to 5 C/h, 1 to 10 C/h and 5 to 20 C/h for different heating zones for the first 300 C, and then at rates of 20-50 C/h to room temperature.
5
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the interface shape to be concave to the melt, with the center being ∼10 mm lower than the edge of the solidified crystal.
6
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a diameter of 6 inches or more.
7
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 200 cm⁻² or less.
8
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 100 cm⁻² or less.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
indium phosphide single crystal wafer
InPsubstrate
Materials
Materials described outside the worked examples.
indium phosphide single crystal
InP
Product Crystal Substrate
Charge Material Seed Crystal
B₂O₃ encapsulant
B₂O₃
Process steps
Additional fabrication and treatment steps described in the patent.
1
Vgf Crystal Growth
Step 1
Process details
method:Vertical Gradient Freeze (VGF)
ampoule:quartz
crucible:pyrolytic boron nitride (PBN)
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
xrd
XRD
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
LOW ETCH PIT DENSITY, LOW SLIP LINE DENSITY, AND LOW STRAIN INDIUM PHOSPHIDE
Morris Young, Weiguo Liu, Wen Wan Zhou, Sungnee George Chu et al.
AXT, Inc., Fremont, CA (US)·Aug. 6, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1.
FIG. 2
FIG. 2 illustrates a method for fabricating indium phos- 55 phide wafers using the vertical gradient freeze furnace 100 shown in
FIG. 3
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
FIG. 4
FIG. 4C illustrates etch pit density measurements of six inch VGF sulfur-doped InP substrates, in accordance with an example embodiment of the disclosure.
FIG. 5
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 6
FIG. 6 illustrates photoelastic measurements of indium phosphide substrates, in accordance with an example embodiment of the disclosure.
FIG. 7
FIG. 7 illustrates phase shift and stress direction results for photoelectric measurements of substrates, in accordance with an example embodiment of the …
FIG. 8
FIG. 8 illustrates devices fabricated on low etch pit density indium phosphide wafers, in accordance with an example embodiment of the disclosure.
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 7 dependent
1
IndependentInPInPB₂O₃indium phosphide single crystal wafer
A method for forming single crystal indium phosphide substrates, the method comprising: sealing charge material comprising polycrystalline indium phosphide seed crystal, B₂O₃ encapsulant, and a dopant in a crucible; sealing the crucible in a quartz ampoule; performing a vertical gradient freeze crystal growth pro-cess by heating the ampoule using a multi-zone heating system to progressively melt the charge material until a portion of the seed crystal is melted; starting growth from the partially melted seed by imple-menting a controlled cooling of the multi-zone heating system; applying a temperature gradient of between 1 and 8 C/cm at a melt-crystal interface; controlling a shape of the interface to be concave to the melt utilizing cooling rates in the multi-zone heating system to form a solidified indium phosphide crystal; and slicing the crystal to create indium phosphide wafers of four inches in diameter or larger with an etch pit density of 500 cm⁻² or less.
2
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the cooling of the multi-zone heating system at the rate of 0.1 to 2 C/h.
3
Dependent← claim 1InP
The method according to claim 1, comprising evacu-ating the crucible before sealing it into the quartz ampoule.
4
Dependent← claim 1InP
The method according to claim 1, comprising cooling the charge material at rates of 0.5 to 5 C/h, 1 to 10 C/h and 5 to 20 C/h for different heating zones for the first 300 C, and then at rates of 20-50 C/h to room temperature.
5
Dependent← claim 1InP
The method according to claim 1, comprising control-ling the interface shape to be concave to the melt, with the center being ∼10 mm lower than the edge of the solidified crystal.
6
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a diameter of 6 inches or more.
7
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 200 cm⁻² or less.
8
Dependent← claim 1InPindium phosphide single crystal wafer
The method according to claim 1, wherein the wafers have a measured etch pit density of 100 cm⁻² or less.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
indium phosphide single crystal wafer
InPsubstrate
Materials
Materials described outside the worked examples.
indium phosphide single crystal
InP
Product Crystal Substrate
Charge Material Seed Crystal
B₂O₃ encapsulant
B₂O₃
Process steps
Additional fabrication and treatment steps described in the patent.
1
Vgf Crystal Growth
Step 1
Process details
method:Vertical Gradient Freeze (VGF)
ampoule:quartz
crucible:pyrolytic boron nitride (PBN)
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
xrd
XRD
FIGS. 3A-3D illustrate x-ray diffraction imaging results for indium phosphide substrates from different growth tech- niques, in accordance with an example …
wafer diameter inches:4 or larger (6 or 8 also described)
interface concavity mm:~10 mm (center lower than edge)
cooling rates by zone first 300C:0.5–5 C/h, 1–10 C/h, 5–20 C/h
post solidification cooling C per h:1–2, 2–4, 10–15 (different zones)
cooling rate to room temperature C per h:20–50
temperature gradient at interface C per cm:1 to 8
Materials:InPInPB₂O₃
2
Poly Synthesis
Step 2
Process details
method:boat method
reactor:quartz reactor tube
precursors:raw InP
Materials:InP
3
Wafer Annealing
Step 3
Ambient
phosphorus vapor
Process details
boat:horizontal quartz boat
ampoule:horizontal quartz ampoule
furnace:horizontal 3-zone furnace
orientation:vertical wafer loading
vapor pressure agent:phosphorus lumps
Materials:InP
Photoluminescence
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
fewer than 5 dislocations or slip lines as measured by XRD imaging
—
InP
area with EPD=0 is at least 80% of total wafer surface
—
InP
area with EPD=0 is at least 90% of total wafer surface
—
InP
Thickness
10–20 mm
—
Thickness
2–3 cm
—
Thickness
5–20 mm
—
Thickness
1–2 cm
—
Thickness
≤ 2 cm
—
Thickness
≤ 20 cm
—
Thickness
≤ 200 cm
—
Thickness
≤ 500 cm
—
Thickness
≤ 1 cm
—
Thickness
≤ 150 cm
—
Thickness
≤ 50 cm
—
Thickness
≤ 10 cm
—
Thickness
≤ 5 cm
—
Thickness
≤ 10 mm
—
Thickness
≥ 20 mm
—
US 2009/0072205 A12009/0072205 A1 3/2009 Kawase
US 2011/0293890 A12011/0293890 A1 12/2011 Liu et al.
US 2020/0066850 A12020/0066850 A1 * 2/2020 Nishioka................. C30B 11/00examiner
US 2020/0190697 A12020/0190697 A1 6/2020 Shetty et al.
US 2021/0108335 A12021/0108335 A1 * 4/2021 Noda...................... C30B 15/14examiner
JP 2011148694 AJP 2011148694 A 8/2011
Cited non-patent literature · 4
Int’l Search Report and Written Opinion Appln No. PCT/US2021/020111 mailed Aug. 31, 2021.
Monberg et al., ‘The Growth and Characterization of Large Size, High Quality, InP Single Crystals’, Journal of the Electrochemical Society, vol. 135, No. 2, Feb. 1988 A (Feb. 1988). pp. 500-503.
Wolf et al., ‘Preparation and characterization of semi-insulating 2 in InP wafers having a low Fe content by wafer annealing’ Material Science and Engineering: B, vol. 28, issues 1-3. Dec. 1994 (Dec. 1994). pp. 115-119.
Hirt et al., ‘Mesoscopic Nonuniformity of Wafer-Annealed Semi- Insulating InP’, Journal of Electronic Materials, vol. 25, No. 3, Mar. 1996 (Mar. 1996), pp. 363-367, particularly p. 364. Chinese office action Appln No. 2021800173460 dated Jul. 26, 2023. European Office Communication with extended search report Appln No. 21761031.0 dated Jan. 19, 2024.
wafer diameter inches:4 or larger (6 or 8 also described)
interface concavity mm:~10 mm (center lower than edge)
cooling rates by zone first 300C:0.5–5 C/h, 1–10 C/h, 5–20 C/h
post solidification cooling C per h:1–2, 2–4, 10–15 (different zones)
cooling rate to room temperature C per h:20–50
temperature gradient at interface C per cm:1 to 8
Materials:InPInPB₂O₃
2
Poly Synthesis
Step 2
Process details
method:boat method
reactor:quartz reactor tube
precursors:raw InP
Materials:InP
3
Wafer Annealing
Step 3
Ambient
phosphorus vapor
Process details
boat:horizontal quartz boat
ampoule:horizontal quartz ampoule
furnace:horizontal 3-zone furnace
orientation:vertical wafer loading
vapor pressure agent:phosphorus lumps
Materials:InP
Photoluminescence
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
fewer than 5 dislocations or slip lines as measured by XRD imaging
—
InP
area with EPD=0 is at least 80% of total wafer surface
—
InP
area with EPD=0 is at least 90% of total wafer surface
—
InP
Thickness
10–20 mm
—
Thickness
2–3 cm
—
Thickness
5–20 mm
—
Thickness
1–2 cm
—
Thickness
≤ 2 cm
—
Thickness
≤ 20 cm
—
Thickness
≤ 200 cm
—
Thickness
≤ 500 cm
—
Thickness
≤ 1 cm
—
Thickness
≤ 150 cm
—
Thickness
≤ 50 cm
—
Thickness
≤ 10 cm
—
Thickness
≤ 5 cm
—
Thickness
≤ 10 mm
—
Thickness
≥ 20 mm
—
US 2009/0072205 A12009/0072205 A1 3/2009 Kawase
US 2011/0293890 A12011/0293890 A1 12/2011 Liu et al.
US 2020/0066850 A12020/0066850 A1 * 2/2020 Nishioka................. C30B 11/00examiner
US 2020/0190697 A12020/0190697 A1 6/2020 Shetty et al.
US 2021/0108335 A12021/0108335 A1 * 4/2021 Noda...................... C30B 15/14examiner
JP 2011148694 AJP 2011148694 A 8/2011
Cited non-patent literature · 4
Int’l Search Report and Written Opinion Appln No. PCT/US2021/020111 mailed Aug. 31, 2021.
Monberg et al., ‘The Growth and Characterization of Large Size, High Quality, InP Single Crystals’, Journal of the Electrochemical Society, vol. 135, No. 2, Feb. 1988 A (Feb. 1988). pp. 500-503.
Wolf et al., ‘Preparation and characterization of semi-insulating 2 in InP wafers having a low Fe content by wafer annealing’ Material Science and Engineering: B, vol. 28, issues 1-3. Dec. 1994 (Dec. 1994). pp. 115-119.
Hirt et al., ‘Mesoscopic Nonuniformity of Wafer-Annealed Semi- Insulating InP’, Journal of Electronic Materials, vol. 25, No. 3, Mar. 1996 (Mar. 1996), pp. 363-367, particularly p. 364. Chinese office action Appln No. 2021800173460 dated Jul. 26, 2023. European Office Communication with extended search report Appln No. 21761031.0 dated Jan. 19, 2024.
wafer diameter inches:4 or larger (6 or 8 also described)
interface concavity mm:~10 mm (center lower than edge)
cooling rates by zone first 300C:0.5–5 C/h, 1–10 C/h, 5–20 C/h
post solidification cooling C per h:1–2, 2–4, 10–15 (different zones)
cooling rate to room temperature C per h:20–50
temperature gradient at interface C per cm:1 to 8
Materials:InPInPB₂O₃
2
Poly Synthesis
Step 2
Process details
method:boat method
reactor:quartz reactor tube
precursors:raw InP
Materials:InP
3
Wafer Annealing
Step 3
Ambient
phosphorus vapor
Process details
boat:horizontal quartz boat
ampoule:horizontal quartz ampoule
furnace:horizontal 3-zone furnace
orientation:vertical wafer loading
vapor pressure agent:phosphorus lumps
Materials:InP
Photoluminescence
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
fewer than 5 dislocations or slip lines as measured by XRD imaging
—
InP
area with EPD=0 is at least 80% of total wafer surface
—
InP
area with EPD=0 is at least 90% of total wafer surface
—
InP
Thickness
10–20 mm
—
Thickness
2–3 cm
—
Thickness
5–20 mm
—
Thickness
1–2 cm
—
Thickness
≤ 2 cm
—
Thickness
≤ 20 cm
—
Thickness
≤ 200 cm
—
Thickness
≤ 500 cm
—
Thickness
≤ 1 cm
—
Thickness
≤ 150 cm
—
Thickness
≤ 50 cm
—
Thickness
≤ 10 cm
—
Thickness
≤ 5 cm
—
Thickness
≤ 10 mm
—
Thickness
≥ 20 mm
—
US 2009/0072205 A12009/0072205 A1 3/2009 Kawase
US 2011/0293890 A12011/0293890 A1 12/2011 Liu et al.
US 2020/0066850 A12020/0066850 A1 * 2/2020 Nishioka................. C30B 11/00examiner
US 2020/0190697 A12020/0190697 A1 6/2020 Shetty et al.
US 2021/0108335 A12021/0108335 A1 * 4/2021 Noda...................... C30B 15/14examiner
JP 2011148694 AJP 2011148694 A 8/2011
Cited non-patent literature · 4
Int’l Search Report and Written Opinion Appln No. PCT/US2021/020111 mailed Aug. 31, 2021.
Monberg et al., ‘The Growth and Characterization of Large Size, High Quality, InP Single Crystals’, Journal of the Electrochemical Society, vol. 135, No. 2, Feb. 1988 A (Feb. 1988). pp. 500-503.
Wolf et al., ‘Preparation and characterization of semi-insulating 2 in InP wafers having a low Fe content by wafer annealing’ Material Science and Engineering: B, vol. 28, issues 1-3. Dec. 1994 (Dec. 1994). pp. 115-119.
Hirt et al., ‘Mesoscopic Nonuniformity of Wafer-Annealed Semi- Insulating InP’, Journal of Electronic Materials, vol. 25, No. 3, Mar. 1996 (Mar. 1996), pp. 363-367, particularly p. 364. Chinese office action Appln No. 2021800173460 dated Jul. 26, 2023. European Office Communication with extended search report Appln No. 21761031.0 dated Jan. 19, 2024.
wafer diameter inches:4 or larger (6 or 8 also described)
interface concavity mm:~10 mm (center lower than edge)
cooling rates by zone first 300C:0.5–5 C/h, 1–10 C/h, 5–20 C/h
post solidification cooling C per h:1–2, 2–4, 10–15 (different zones)
cooling rate to room temperature C per h:20–50
temperature gradient at interface C per cm:1 to 8
Materials:InPInPB₂O₃
2
Poly Synthesis
Step 2
Process details
method:boat method
reactor:quartz reactor tube
precursors:raw InP
Materials:InP
3
Wafer Annealing
Step 3
Ambient
phosphorus vapor
Process details
boat:horizontal quartz boat
ampoule:horizontal quartz ampoule
furnace:horizontal 3-zone furnace
orientation:vertical wafer loading
vapor pressure agent:phosphorus lumps
Materials:InP
Photoluminescence
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
FIG. 5B illustrates resistivity, photoluminescence, and etch pit density measurements of non-VGF three inch InP substrates, in accordance with an example …
fewer than 5 dislocations or slip lines as measured by XRD imaging
—
InP
area with EPD=0 is at least 80% of total wafer surface
—
InP
area with EPD=0 is at least 90% of total wafer surface
—
InP
Thickness
10–20 mm
—
Thickness
2–3 cm
—
Thickness
5–20 mm
—
Thickness
1–2 cm
—
Thickness
≤ 2 cm
—
Thickness
≤ 20 cm
—
Thickness
≤ 200 cm
—
Thickness
≤ 500 cm
—
Thickness
≤ 1 cm
—
Thickness
≤ 150 cm
—
Thickness
≤ 50 cm
—
Thickness
≤ 10 cm
—
Thickness
≤ 5 cm
—
Thickness
≤ 10 mm
—
Thickness
≥ 20 mm
—
US 2009/0072205 A12009/0072205 A1 3/2009 Kawase
US 2011/0293890 A12011/0293890 A1 12/2011 Liu et al.
US 2020/0066850 A12020/0066850 A1 * 2/2020 Nishioka................. C30B 11/00examiner
US 2020/0190697 A12020/0190697 A1 6/2020 Shetty et al.
US 2021/0108335 A12021/0108335 A1 * 4/2021 Noda...................... C30B 15/14examiner
JP 2011148694 AJP 2011148694 A 8/2011
Cited non-patent literature · 4
Int’l Search Report and Written Opinion Appln No. PCT/US2021/020111 mailed Aug. 31, 2021.
Monberg et al., ‘The Growth and Characterization of Large Size, High Quality, InP Single Crystals’, Journal of the Electrochemical Society, vol. 135, No. 2, Feb. 1988 A (Feb. 1988). pp. 500-503.
Wolf et al., ‘Preparation and characterization of semi-insulating 2 in InP wafers having a low Fe content by wafer annealing’ Material Science and Engineering: B, vol. 28, issues 1-3. Dec. 1994 (Dec. 1994). pp. 115-119.
Hirt et al., ‘Mesoscopic Nonuniformity of Wafer-Annealed Semi- Insulating InP’, Journal of Electronic Materials, vol. 25, No. 3, Mar. 1996 (Mar. 1996), pp. 363-367, particularly p. 364. Chinese office action Appln No. 2021800173460 dated Jul. 26, 2023. European Office Communication with extended search report Appln No. 21761031.0 dated Jan. 19, 2024.