Patent
US 8,815,739FINFET DEVICE WITH A GRAPHENE GATE ELECTRODE AND METHODS OF FORMING SAME
Zoran Krivokapic, Bhagawan Sahu
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,815,739Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1A-i F depict one illustrative method disclosed herein of forming a FinFET 20 device with a gate electrode comprised of graphene;
Figures 2A-2F depict another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene; and Page 6 of 27 2162.217000 DU₁₅₅
Figures 3A-3L depict yet another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene. While the subject matter disclosed herein is susceptible to various modifications and 5 alternative forms, specific embodiments thereof have been shown by way …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Serial No. 13/545,62 1 Response to OA dated 1/17/2014 IN THE CLAIMS: 1.-9. canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin _ nd foringanisulatingtilongaidt electrode.uss
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed prior to the step of forming said gate electrode.
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed after the step of forming said gate electrode.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer above an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer on an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer from a high-k insulating material.
The method of claim 10, further comprising depositing a self-aligned monolayer material on said gate electrode.
The method of claim 10, wherein forming said gate electrode comprises performing a spin-coating process to deposit graphene colloids above said layer of gate insulation material.
The method of claim 10, wherein forming said FinFET device further comprises forming at least one conductive contact positioned in said layer of insulating material that is conductively coupled to said gate electrode. 8
(riginlig_ methalod iolimo10, whereinformig ogsid a lest one fin comprses prfor ing oeatine aehing procestrog s1patendmasktlayertgodeine oa plurality of trenches in said substrate, wherein said trenches define said fin.
canceled
canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming at least one monolayer of graphene on said gate insulation layer; performing at least one patterning process to remove at least portions of said at least one monolayer of graphene positioned away from a channel region of said FinFET device to thereby define a gate electrode comprised of remaining portions of said at least one monolayer of graphene; and forming an insulating material above said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a layer of metal or a metal alloy on said layer of gate insulation material; 4 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a chemical deposition process to form at least one monolayer of graphene material on outer surfaces of said layer of metal or metal alloy; removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a layer of metal or a metal alloy on said layer of gate insulation material; performing a chemical deposition process to form graphene material on outer surfaces of said layer of metal or metal alloy; 5 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material; and performing at least one patterning process to remove at least portions of said exposed residual portion of said graphene material to thereby define said gate electrode comprised of said graphene material; and forming an insulating material on said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a sacrificial material layer adjacent opposite sides of said fin; forming a first layer of metal or a metal alloy on opposite sides of said fin adjacent said sacrificial material layer; performing at least one etching process to remove said sacrificial material positioned between said first layer of metal and said fin to thereby define a cavity between said first layer of metal or metal alloy on each side of said fin; 6 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a first chemical deposition process to form a first graphene material on outer surfaces of said first layer of metal or metal alloy within said trenches between said fin and said first layer of metal or metal alloy; forming said gate insulation material on said first graphene material within said trench and above an upper surface of said fin; forming a second layer of metal or a metal alloy above an upper surface of said fin, said second layer of metal or metal alloy being conductively coupled to said first graphene material that is positioned on opposite sides of said fin; performing a second chemical deposition process to form a second graphene material on outer surfaces of said second layer of metal or metal alloy, wherein said second graphene material is conductively coupled to said first graphene material that is positioned on opposite sides of said fin; removing portions of said first and second graphene materials to thereby expose remaining portions of said first and second layers of metal or metal alloy and to thereby define residual portions of said first and second graphene materials; removing said exposed portions of said first and second layers of metal or metal alloy to thereby define said gate electrode comprised of said residual portions of said first and second graphene materials; and forming an insulating material on said gate electrode.
Layer stacks claimed or described, ordered top of device to substrate.
FinFET device with graphene gate electrode
Materials described outside the worked examples.
semiconducting substrate
gate insulation material
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 30–150 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,815,739Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1A-i F depict one illustrative method disclosed herein of forming a FinFET 20 device with a gate electrode comprised of graphene;
Figures 2A-2F depict another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene; and Page 6 of 27 2162.217000 DU₁₅₅
Figures 3A-3L depict yet another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene. While the subject matter disclosed herein is susceptible to various modifications and 5 alternative forms, specific embodiments thereof have been shown by way …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Serial No. 13/545,62 1 Response to OA dated 1/17/2014 IN THE CLAIMS: 1.-9. canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin _ nd foringanisulatingtilongaidt electrode.uss
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed prior to the step of forming said gate electrode.
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed after the step of forming said gate electrode.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer above an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer on an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer from a high-k insulating material.
The method of claim 10, further comprising depositing a self-aligned monolayer material on said gate electrode.
The method of claim 10, wherein forming said gate electrode comprises performing a spin-coating process to deposit graphene colloids above said layer of gate insulation material.
The method of claim 10, wherein forming said FinFET device further comprises forming at least one conductive contact positioned in said layer of insulating material that is conductively coupled to said gate electrode. 8
(riginlig_ methalod iolimo10, whereinformig ogsid a lest one fin comprses prfor ing oeatine aehing procestrog s1patendmasktlayertgodeine oa plurality of trenches in said substrate, wherein said trenches define said fin.
canceled
canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming at least one monolayer of graphene on said gate insulation layer; performing at least one patterning process to remove at least portions of said at least one monolayer of graphene positioned away from a channel region of said FinFET device to thereby define a gate electrode comprised of remaining portions of said at least one monolayer of graphene; and forming an insulating material above said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a layer of metal or a metal alloy on said layer of gate insulation material; 4 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a chemical deposition process to form at least one monolayer of graphene material on outer surfaces of said layer of metal or metal alloy; removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a layer of metal or a metal alloy on said layer of gate insulation material; performing a chemical deposition process to form graphene material on outer surfaces of said layer of metal or metal alloy; 5 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material; and performing at least one patterning process to remove at least portions of said exposed residual portion of said graphene material to thereby define said gate electrode comprised of said graphene material; and forming an insulating material on said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a sacrificial material layer adjacent opposite sides of said fin; forming a first layer of metal or a metal alloy on opposite sides of said fin adjacent said sacrificial material layer; performing at least one etching process to remove said sacrificial material positioned between said first layer of metal and said fin to thereby define a cavity between said first layer of metal or metal alloy on each side of said fin; 6 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a first chemical deposition process to form a first graphene material on outer surfaces of said first layer of metal or metal alloy within said trenches between said fin and said first layer of metal or metal alloy; forming said gate insulation material on said first graphene material within said trench and above an upper surface of said fin; forming a second layer of metal or a metal alloy above an upper surface of said fin, said second layer of metal or metal alloy being conductively coupled to said first graphene material that is positioned on opposite sides of said fin; performing a second chemical deposition process to form a second graphene material on outer surfaces of said second layer of metal or metal alloy, wherein said second graphene material is conductively coupled to said first graphene material that is positioned on opposite sides of said fin; removing portions of said first and second graphene materials to thereby expose remaining portions of said first and second layers of metal or metal alloy and to thereby define residual portions of said first and second graphene materials; removing said exposed portions of said first and second layers of metal or metal alloy to thereby define said gate electrode comprised of said residual portions of said first and second graphene materials; and forming an insulating material on said gate electrode.
Layer stacks claimed or described, ordered top of device to substrate.
FinFET device with graphene gate electrode
Materials described outside the worked examples.
semiconducting substrate
gate insulation material
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 30–150 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,815,739Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1A-i F depict one illustrative method disclosed herein of forming a FinFET 20 device with a gate electrode comprised of graphene;
Figures 2A-2F depict another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene; and Page 6 of 27 2162.217000 DU₁₅₅
Figures 3A-3L depict yet another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene. While the subject matter disclosed herein is susceptible to various modifications and 5 alternative forms, specific embodiments thereof have been shown by way …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Serial No. 13/545,62 1 Response to OA dated 1/17/2014 IN THE CLAIMS: 1.-9. canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin _ nd foringanisulatingtilongaidt electrode.uss
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed prior to the step of forming said gate electrode.
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed after the step of forming said gate electrode.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer above an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer on an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer from a high-k insulating material.
The method of claim 10, further comprising depositing a self-aligned monolayer material on said gate electrode.
The method of claim 10, wherein forming said gate electrode comprises performing a spin-coating process to deposit graphene colloids above said layer of gate insulation material.
The method of claim 10, wherein forming said FinFET device further comprises forming at least one conductive contact positioned in said layer of insulating material that is conductively coupled to said gate electrode. 8
(riginlig_ methalod iolimo10, whereinformig ogsid a lest one fin comprses prfor ing oeatine aehing procestrog s1patendmasktlayertgodeine oa plurality of trenches in said substrate, wherein said trenches define said fin.
canceled
canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming at least one monolayer of graphene on said gate insulation layer; performing at least one patterning process to remove at least portions of said at least one monolayer of graphene positioned away from a channel region of said FinFET device to thereby define a gate electrode comprised of remaining portions of said at least one monolayer of graphene; and forming an insulating material above said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a layer of metal or a metal alloy on said layer of gate insulation material; 4 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a chemical deposition process to form at least one monolayer of graphene material on outer surfaces of said layer of metal or metal alloy; removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a layer of metal or a metal alloy on said layer of gate insulation material; performing a chemical deposition process to form graphene material on outer surfaces of said layer of metal or metal alloy; 5 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material; and performing at least one patterning process to remove at least portions of said exposed residual portion of said graphene material to thereby define said gate electrode comprised of said graphene material; and forming an insulating material on said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a sacrificial material layer adjacent opposite sides of said fin; forming a first layer of metal or a metal alloy on opposite sides of said fin adjacent said sacrificial material layer; performing at least one etching process to remove said sacrificial material positioned between said first layer of metal and said fin to thereby define a cavity between said first layer of metal or metal alloy on each side of said fin; 6 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a first chemical deposition process to form a first graphene material on outer surfaces of said first layer of metal or metal alloy within said trenches between said fin and said first layer of metal or metal alloy; forming said gate insulation material on said first graphene material within said trench and above an upper surface of said fin; forming a second layer of metal or a metal alloy above an upper surface of said fin, said second layer of metal or metal alloy being conductively coupled to said first graphene material that is positioned on opposite sides of said fin; performing a second chemical deposition process to form a second graphene material on outer surfaces of said second layer of metal or metal alloy, wherein said second graphene material is conductively coupled to said first graphene material that is positioned on opposite sides of said fin; removing portions of said first and second graphene materials to thereby expose remaining portions of said first and second layers of metal or metal alloy and to thereby define residual portions of said first and second graphene materials; removing said exposed portions of said first and second layers of metal or metal alloy to thereby define said gate electrode comprised of said residual portions of said first and second graphene materials; and forming an insulating material on said gate electrode.
Layer stacks claimed or described, ordered top of device to substrate.
FinFET device with graphene gate electrode
Materials described outside the worked examples.
semiconducting substrate
gate insulation material
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 30–150 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,815,739Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1A-i F depict one illustrative method disclosed herein of forming a FinFET 20 device with a gate electrode comprised of graphene;
Figures 2A-2F depict another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene; and Page 6 of 27 2162.217000 DU₁₅₅
Figures 3A-3L depict yet another illustrative method disclosed herein of forming a FinFET device with a gate electrode comprised of graphene. While the subject matter disclosed herein is susceptible to various modifications and 5 alternative forms, specific embodiments thereof have been shown by way …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Serial No. 13/545,62 1 Response to OA dated 1/17/2014 IN THE CLAIMS: 1.-9. canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin _ nd foringanisulatingtilongaidt electrode.uss
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed prior to the step of forming said gate electrode.
The method of claim 10, wherein the step of forming said layer of gate insulation material is performed after the step of forming said gate electrode.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer above an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer on an upper surface and two side surfaces of said fin.
The method of claim 10, wherein forming said gate insulation layer comprises forming said gate insulation layer from a high-k insulating material.
The method of claim 10, further comprising depositing a self-aligned monolayer material on said gate electrode.
The method of claim 10, wherein forming said gate electrode comprises performing a spin-coating process to deposit graphene colloids above said layer of gate insulation material.
The method of claim 10, wherein forming said FinFET device further comprises forming at least one conductive contact positioned in said layer of insulating material that is conductively coupled to said gate electrode. 8
(riginlig_ methalod iolimo10, whereinformig ogsid a lest one fin comprses prfor ing oeatine aehing procestrog s1patendmasktlayertgodeine oa plurality of trenches in said substrate, wherein said trenches define said fin.
canceled
canceled
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming at least one monolayer of graphene on said gate insulation layer; performing at least one patterning process to remove at least portions of said at least one monolayer of graphene positioned away from a channel region of said FinFET device to thereby define a gate electrode comprised of remaining portions of said at least one monolayer of graphene; and forming an insulating material above said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a layer of metal or a metal alloy on said layer of gate insulation material; 4 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a chemical deposition process to form at least one monolayer of graphene material on outer surfaces of said layer of metal or metal alloy; removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material adjacent said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a layer of metal or a metal alloy on said layer of gate insulation material; performing a chemical deposition process to form graphene material on outer surfaces of said layer of metal or metal alloy; 5 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 removing portions of said graphene material to thereby expose remaining portions of said layer of metal or metal alloy that are positioned above a residual portion of said graphene material; removing said exposed portions of said metal or metal alloy to thereby expose said residual portion of said graphene material; and performing at least one patterning process to remove at least portions of said exposed residual portion of said graphene material to thereby define said gate electrode comprised of said graphene material; and forming an insulating material on said gate electrode.
A method for forming a FinFET device, comprising: forming at least one fin in a semiconducting substrate; forming a layer of gate insulation material on said fin; forming a gate electrode comprised of graphene, wherein at least said layer of gate insulation material is positioned between said gate electrode and said fin, and wherein forming the gate electrode comprises: forming a sacrificial material layer adjacent opposite sides of said fin; forming a first layer of metal or a metal alloy on opposite sides of said fin adjacent said sacrificial material layer; performing at least one etching process to remove said sacrificial material positioned between said first layer of metal and said fin to thereby define a cavity between said first layer of metal or metal alloy on each side of said fin; 6 Serial No. 13/545,62 1 Response to OA dated 1/17/2014 performing a first chemical deposition process to form a first graphene material on outer surfaces of said first layer of metal or metal alloy within said trenches between said fin and said first layer of metal or metal alloy; forming said gate insulation material on said first graphene material within said trench and above an upper surface of said fin; forming a second layer of metal or a metal alloy above an upper surface of said fin, said second layer of metal or metal alloy being conductively coupled to said first graphene material that is positioned on opposite sides of said fin; performing a second chemical deposition process to form a second graphene material on outer surfaces of said second layer of metal or metal alloy, wherein said second graphene material is conductively coupled to said first graphene material that is positioned on opposite sides of said fin; removing portions of said first and second graphene materials to thereby expose remaining portions of said first and second layers of metal or metal alloy and to thereby define residual portions of said first and second graphene materials; removing said exposed portions of said first and second layers of metal or metal alloy to thereby define said gate electrode comprised of said residual portions of said first and second graphene materials; and forming an insulating material on said gate electrode.
Layer stacks claimed or described, ordered top of device to substrate.
FinFET device with graphene gate electrode
Materials described outside the worked examples.
semiconducting substrate
gate insulation material
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 30–150 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
graphene
high-k insulating material
self-aligned monolayer material
amine
NH₂
methyl
CH₃
graphene colloids
insulating material
metal or metal alloy layer
| — |
Thickness | 5–30 nm | — |
Thickness | 5–50 nm | — |
Thickness | 2–3 nm | — |
Temperature | 900–1000 °C | — |
Thickness | 1–2 nm | — |
Thickness | 1–5 nm | — |
graphene
high-k insulating material
self-aligned monolayer material
amine
NH₂
methyl
CH₃
graphene colloids
insulating material
metal or metal alloy layer
| — |
Thickness | 5–30 nm | — |
Thickness | 5–50 nm | — |
Thickness | 2–3 nm | — |
Temperature | 900–1000 °C | — |
Thickness | 1–2 nm | — |
Thickness | 1–5 nm | — |
graphene
high-k insulating material
self-aligned monolayer material
amine
NH₂
methyl
CH₃
graphene colloids
insulating material
metal or metal alloy layer
| — |
Thickness | 5–30 nm | — |
Thickness | 5–50 nm | — |
Thickness | 2–3 nm | — |
Temperature | 900–1000 °C | — |
Thickness | 1–2 nm | — |
Thickness | 1–5 nm | — |
graphene
high-k insulating material
self-aligned monolayer material
amine
NH₂
methyl
CH₃
graphene colloids
insulating material
metal or metal alloy layer
| — |
Thickness | 5–30 nm | — |
Thickness | 5–50 nm | — |
Thickness | 2–3 nm | — |
Temperature | 900–1000 °C | — |
Thickness | 1–2 nm | — |
Thickness | 1–5 nm | — |