Patent
US 8,772,853GFM device with peripheral circuits and polymer interlayer
GFM device with stacked layers of memory cells
tunnel oxide layer
graphene storage layer
graphene electrode
substrate
control oxide layer
polymer substrate
polymer interlayer
polymer base layer
| — |
Thickness | 10–30 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≥ 5 nm | — |
GALLIUM-NITRIDE-BASED MODULE WITH ENHANCED ELECTRICAL PERFORMANCE AND PROCESS FOR MAKING THE SAME
GFM device with peripheral circuits and polymer interlayer
GFM device with stacked layers of memory cells
tunnel oxide layer
graphene storage layer
graphene electrode
substrate
control oxide layer
polymer substrate
polymer interlayer
polymer base layer
| — |
Thickness | 10–30 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≥ 5 nm | — |
GALLIUM-NITRIDE-BASED MODULE WITH ENHANCED ELECTRICAL PERFORMANCE AND PROCESS FOR MAKING THE SAME
GFM device with peripheral circuits and polymer interlayer
GFM device with stacked layers of memory cells
tunnel oxide layer
graphene storage layer
graphene electrode
substrate
control oxide layer
polymer substrate
polymer interlayer
polymer base layer
| — |
Thickness | 10–30 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≥ 5 nm | — |
GALLIUM-NITRIDE-BASED MODULE WITH ENHANCED ELECTRICAL PERFORMANCE AND PROCESS FOR MAKING THE SAME
GFM device with peripheral circuits and polymer interlayer
GFM device with stacked layers of memory cells
tunnel oxide layer
graphene storage layer
graphene electrode
substrate
control oxide layer
polymer substrate
polymer interlayer
polymer base layer
| — |
Thickness | 10–30 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≥ 5 nm | — |
GALLIUM-NITRIDE-BASED MODULE WITH ENHANCED ELECTRICAL PERFORMANCE AND PROCESS FOR MAKING THE SAME