Patent
US 9,000,594USE OF GRAPHENE TO LIMIT COPPER SURFACE OXIDATION, DIFFUSION AND ELECTROMIGRATION IN INTERCONNECT STRUCTURES
John A. Ott
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,000,594Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 0 A is a pictorial representation (through a cross sectional view) illustrating an exemplary multilevel interconnect structure that can be formed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the substrate of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6B is a pictorial representation (through a cross sectional view) illustrating another structure after forming a contiguous layer of graphene on exposed …
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating an air-gap- containing interconnect structure including two …
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a low-k containing interconnect structure including two copper-containing …
FIGS. 10A-O B, there are illustrated exemplary interconnect structures of the present disclosure which include a first interconnect level and a second …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate; a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous la v er of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la yer of graphene and a bo t tommost surface that is coplanar with a botto m most surface of said at least one copper-containing structure and a bottommost surface of said continuous layer of graphene a dielectric capping layer located atop the at least one copper SVG 14107100.10-14-2014.I₁₉OA₈₁SPXXIFW3.CLM.1.svg 0.16 4.31 Black and white
The interconnect structure of Claim 1, wherein said copper-containing structure comprises pure copper.
The interconnect structure of Claim 1, wherein said at least one copper- containing structure comprises a copper alloy.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises single-layer graphene, few-layer graphene, or multi-layer graphene.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises graphene mixed with amorphous and/or disordered carbon phases.
The interconnect structure of Claim 1, wherein the at least one copper- containing structure includes a plurality of copper-containing structures, and each copper- containing structure of said plurality of copper-containing structures includes said contiguous 3 I:\I BM\ 1 05\28692ZY\AMEND\28692ZY.a m 2.doc layer of graphene located on each exposed sidewall surfaces and topmost surface of each copper- containing structure of said plurality of copper-containing structures.
The interconnect structure of Claim 1, wherein said substrate comprises at least a semiconductor material having at least one semiconductor device located thereon.
The interconnect structure of Claim 1, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene. 5 L: \IB M\105 \28692ZY\AMEND\28692Z Y.am2. doc
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate, wherein said at least one copper-containing structure is a metal via or metal line; [[and]] a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous layer of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la y er of graphene and a bottommost surface that is coplanar with a bottommost surface of said at least one copper-containing structure and a bottommost surface of said continuous la yer of graphene.
The interconnect structure of Claim 4, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene.
The interconnect structure of Claim [[9]] 1, wherein said low k dielectric material pe rtie* is selected from the group consisting of a silsesquioxane, a C doped oxide that include atoms of Si, C, O and H, a thermosetting polyarylene ether, and multilayers thereof.
The interconnect structure of Claim [[1]] 12, further comprising another at least one copper-containing structure located atop said dielectric capping layer, wherein said another at least one copper-containing structure includes another contiguous layer of graphene comprising a first portion located on each exposed sidewall surface of said another at least one copper-containing structure and a second portion located on a topmost 4 I:\ IBM \M₀ 5\28692ZY\AMEND\28692ZY.am2.doc surface of said another at least one copper-containing structure, wherein a bottommost surface of said first portion of said another contiguous layer of graphene is in contact with a surface of dielectric capping layer.
The interconnect structure of Claim 13, wherein the another at least one copper-containing structure includes a plurality of other copper-containing structures, and each copper-containing structure of said plurality of other copper-containing structures includes said another contiguous layer of graphene located on each exposed sidewall surface and topmost surface of each copper-containing structure of said plurality of other copper-containing structures.
Layer stacks claimed or described, ordered top of device to substrate.
graphene-encapsulated copper BEOL interconnect structure
graphene-encapsulated copper metal via or metal line interconnect structure
Materials described outside the worked examples.
copper-containing structure
graphene (contiguous layer)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Thickness | 2–50 nm |
Patent
Atlas literature
Patent
US 9,000,594Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 0 A is a pictorial representation (through a cross sectional view) illustrating an exemplary multilevel interconnect structure that can be formed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the substrate of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6B is a pictorial representation (through a cross sectional view) illustrating another structure after forming a contiguous layer of graphene on exposed …
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating an air-gap- containing interconnect structure including two …
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a low-k containing interconnect structure including two copper-containing …
FIGS. 10A-O B, there are illustrated exemplary interconnect structures of the present disclosure which include a first interconnect level and a second …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate; a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous la v er of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la yer of graphene and a bo t tommost surface that is coplanar with a botto m most surface of said at least one copper-containing structure and a bottommost surface of said continuous layer of graphene a dielectric capping layer located atop the at least one copper SVG 14107100.10-14-2014.I₁₉OA₈₁SPXXIFW3.CLM.1.svg 0.16 4.31 Black and white
The interconnect structure of Claim 1, wherein said copper-containing structure comprises pure copper.
The interconnect structure of Claim 1, wherein said at least one copper- containing structure comprises a copper alloy.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises single-layer graphene, few-layer graphene, or multi-layer graphene.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises graphene mixed with amorphous and/or disordered carbon phases.
The interconnect structure of Claim 1, wherein the at least one copper- containing structure includes a plurality of copper-containing structures, and each copper- containing structure of said plurality of copper-containing structures includes said contiguous 3 I:\I BM\ 1 05\28692ZY\AMEND\28692ZY.a m 2.doc layer of graphene located on each exposed sidewall surfaces and topmost surface of each copper- containing structure of said plurality of copper-containing structures.
The interconnect structure of Claim 1, wherein said substrate comprises at least a semiconductor material having at least one semiconductor device located thereon.
The interconnect structure of Claim 1, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene. 5 L: \IB M\105 \28692ZY\AMEND\28692Z Y.am2. doc
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate, wherein said at least one copper-containing structure is a metal via or metal line; [[and]] a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous layer of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la y er of graphene and a bottommost surface that is coplanar with a bottommost surface of said at least one copper-containing structure and a bottommost surface of said continuous la yer of graphene.
The interconnect structure of Claim 4, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene.
The interconnect structure of Claim [[9]] 1, wherein said low k dielectric material pe rtie* is selected from the group consisting of a silsesquioxane, a C doped oxide that include atoms of Si, C, O and H, a thermosetting polyarylene ether, and multilayers thereof.
The interconnect structure of Claim [[1]] 12, further comprising another at least one copper-containing structure located atop said dielectric capping layer, wherein said another at least one copper-containing structure includes another contiguous layer of graphene comprising a first portion located on each exposed sidewall surface of said another at least one copper-containing structure and a second portion located on a topmost 4 I:\ IBM \M₀ 5\28692ZY\AMEND\28692ZY.am2.doc surface of said another at least one copper-containing structure, wherein a bottommost surface of said first portion of said another contiguous layer of graphene is in contact with a surface of dielectric capping layer.
The interconnect structure of Claim 13, wherein the another at least one copper-containing structure includes a plurality of other copper-containing structures, and each copper-containing structure of said plurality of other copper-containing structures includes said another contiguous layer of graphene located on each exposed sidewall surface and topmost surface of each copper-containing structure of said plurality of other copper-containing structures.
Layer stacks claimed or described, ordered top of device to substrate.
graphene-encapsulated copper BEOL interconnect structure
graphene-encapsulated copper metal via or metal line interconnect structure
Materials described outside the worked examples.
copper-containing structure
graphene (contiguous layer)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Thickness | 2–50 nm |
Patent
Atlas literature
Patent
US 9,000,594Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 0 A is a pictorial representation (through a cross sectional view) illustrating an exemplary multilevel interconnect structure that can be formed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the substrate of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6B is a pictorial representation (through a cross sectional view) illustrating another structure after forming a contiguous layer of graphene on exposed …
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating an air-gap- containing interconnect structure including two …
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a low-k containing interconnect structure including two copper-containing …
FIGS. 10A-O B, there are illustrated exemplary interconnect structures of the present disclosure which include a first interconnect level and a second …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate; a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous la v er of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la yer of graphene and a bo t tommost surface that is coplanar with a botto m most surface of said at least one copper-containing structure and a bottommost surface of said continuous layer of graphene a dielectric capping layer located atop the at least one copper SVG 14107100.10-14-2014.I₁₉OA₈₁SPXXIFW3.CLM.1.svg 0.16 4.31 Black and white
The interconnect structure of Claim 1, wherein said copper-containing structure comprises pure copper.
The interconnect structure of Claim 1, wherein said at least one copper- containing structure comprises a copper alloy.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises single-layer graphene, few-layer graphene, or multi-layer graphene.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises graphene mixed with amorphous and/or disordered carbon phases.
The interconnect structure of Claim 1, wherein the at least one copper- containing structure includes a plurality of copper-containing structures, and each copper- containing structure of said plurality of copper-containing structures includes said contiguous 3 I:\I BM\ 1 05\28692ZY\AMEND\28692ZY.a m 2.doc layer of graphene located on each exposed sidewall surfaces and topmost surface of each copper- containing structure of said plurality of copper-containing structures.
The interconnect structure of Claim 1, wherein said substrate comprises at least a semiconductor material having at least one semiconductor device located thereon.
The interconnect structure of Claim 1, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene. 5 L: \IB M\105 \28692ZY\AMEND\28692Z Y.am2. doc
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate, wherein said at least one copper-containing structure is a metal via or metal line; [[and]] a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous layer of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la y er of graphene and a bottommost surface that is coplanar with a bottommost surface of said at least one copper-containing structure and a bottommost surface of said continuous la yer of graphene.
The interconnect structure of Claim 4, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene.
The interconnect structure of Claim [[9]] 1, wherein said low k dielectric material pe rtie* is selected from the group consisting of a silsesquioxane, a C doped oxide that include atoms of Si, C, O and H, a thermosetting polyarylene ether, and multilayers thereof.
The interconnect structure of Claim [[1]] 12, further comprising another at least one copper-containing structure located atop said dielectric capping layer, wherein said another at least one copper-containing structure includes another contiguous layer of graphene comprising a first portion located on each exposed sidewall surface of said another at least one copper-containing structure and a second portion located on a topmost 4 I:\ IBM \M₀ 5\28692ZY\AMEND\28692ZY.am2.doc surface of said another at least one copper-containing structure, wherein a bottommost surface of said first portion of said another contiguous layer of graphene is in contact with a surface of dielectric capping layer.
The interconnect structure of Claim 13, wherein the another at least one copper-containing structure includes a plurality of other copper-containing structures, and each copper-containing structure of said plurality of other copper-containing structures includes said another contiguous layer of graphene located on each exposed sidewall surface and topmost surface of each copper-containing structure of said plurality of other copper-containing structures.
Layer stacks claimed or described, ordered top of device to substrate.
graphene-encapsulated copper BEOL interconnect structure
graphene-encapsulated copper metal via or metal line interconnect structure
Materials described outside the worked examples.
copper-containing structure
graphene (contiguous layer)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Thickness | 2–50 nm |
Patent
Atlas literature
Patent
US 9,000,594Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 0 A is a pictorial representation (through a cross sectional view) illustrating an exemplary multilevel interconnect structure that can be formed …
FIG. 2 is a pictorial representation (through a cross sectional view) illustrating the substrate of
FIG. 3 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 4 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 5 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 6B is a pictorial representation (through a cross sectional view) illustrating another structure after forming a contiguous layer of graphene on exposed …
FIG. 7 is a pictorial representation (through a cross sectional view) illustrating the structure of
FIG. 8 is a pictorial representation (through a cross sectional view) illustrating an air-gap- containing interconnect structure including two …
FIG. 9 is a pictorial representation (through a cross sectional view) illustrating a low-k containing interconnect structure including two copper-containing …
FIGS. 10A-O B, there are illustrated exemplary interconnect structures of the present disclosure which include a first interconnect level and a second …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate; a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous la v er of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la yer of graphene and a bo t tommost surface that is coplanar with a botto m most surface of said at least one copper-containing structure and a bottommost surface of said continuous layer of graphene a dielectric capping layer located atop the at least one copper SVG 14107100.10-14-2014.I₁₉OA₈₁SPXXIFW3.CLM.1.svg 0.16 4.31 Black and white
The interconnect structure of Claim 1, wherein said copper-containing structure comprises pure copper.
The interconnect structure of Claim 1, wherein said at least one copper- containing structure comprises a copper alloy.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises single-layer graphene, few-layer graphene, or multi-layer graphene.
The interconnect structure of Claim 1, wherein said contiguous layer of graphene comprises graphene mixed with amorphous and/or disordered carbon phases.
The interconnect structure of Claim 1, wherein the at least one copper- containing structure includes a plurality of copper-containing structures, and each copper- containing structure of said plurality of copper-containing structures includes said contiguous 3 I:\I BM\ 1 05\28692ZY\AMEND\28692ZY.a m 2.doc layer of graphene located on each exposed sidewall surfaces and topmost surface of each copper- containing structure of said plurality of copper-containing structures.
The interconnect structure of Claim 1, wherein said substrate comprises at least a semiconductor material having at least one semiconductor device located thereon.
The interconnect structure of Claim 1, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene. 5 L: \IB M\105 \28692ZY\AMEND\28692Z Y.am2. doc
An interconnect structure comprising: at least one copper-containing structure located on a surface of a substrate, wherein said at least one copper-containing structure is a metal via or metal line; [[and]] a contiguous layer of graphene surrounding sidewall surfaces and a topmost surface of said at least one copper-containing structure; and a dielectric material selected from a low-k dielectric material and air located ad j acent said at least one copper-containing structure and said continuous layer of graphene, wherein said dielectric material has a topmost surface that is horizontally coplanar with a topmost surface of said continuous la y er of graphene and a bottommost surface that is coplanar with a bottommost surface of said at least one copper-containing structure and a bottommost surface of said continuous la yer of graphene.
The interconnect structure of Claim 4, further comprises a dielectric capping layer located atop the at least one copper-containing structure including said contiguous layer of graphene.
The interconnect structure of Claim [[9]] 1, wherein said low k dielectric material pe rtie* is selected from the group consisting of a silsesquioxane, a C doped oxide that include atoms of Si, C, O and H, a thermosetting polyarylene ether, and multilayers thereof.
The interconnect structure of Claim [[1]] 12, further comprising another at least one copper-containing structure located atop said dielectric capping layer, wherein said another at least one copper-containing structure includes another contiguous layer of graphene comprising a first portion located on each exposed sidewall surface of said another at least one copper-containing structure and a second portion located on a topmost 4 I:\ IBM \M₀ 5\28692ZY\AMEND\28692ZY.am2.doc surface of said another at least one copper-containing structure, wherein a bottommost surface of said first portion of said another contiguous layer of graphene is in contact with a surface of dielectric capping layer.
The interconnect structure of Claim 13, wherein the another at least one copper-containing structure includes a plurality of other copper-containing structures, and each copper-containing structure of said plurality of other copper-containing structures includes said another contiguous layer of graphene located on each exposed sidewall surface and topmost surface of each copper-containing structure of said plurality of other copper-containing structures.
Layer stacks claimed or described, ordered top of device to substrate.
graphene-encapsulated copper BEOL interconnect structure
graphene-encapsulated copper metal via or metal line interconnect structure
Materials described outside the worked examples.
copper-containing structure
graphene (contiguous layer)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 200–900 °C | — |
Thickness | 2–50 nm |
multilevel graphene-encapsulated copper BEOL interconnect structure
dielectric material (low-k or air)
pure copper
Cu
copper alloy
graphene (single-layer, few-layer, or multi-layer)
graphene mixed with amorphous and/or disordered carbon phases
low-k dielectric material
dielectric capping layer
sacrificial dielectric material
silsesquioxane
C doped oxide (Si, C, O, H)
thermosetting polyarylene ether
| — |
Thickness | 20–200 nm | — |
Thickness | 10–80 nm | — |
Temperature | 200–400 °C | — |
Temperature | 350–400 °C | — |
Thickness | 10–100 nm | — |
Thickness | 20–50 nm | — |
multilevel graphene-encapsulated copper BEOL interconnect structure
dielectric material (low-k or air)
pure copper
Cu
copper alloy
graphene (single-layer, few-layer, or multi-layer)
graphene mixed with amorphous and/or disordered carbon phases
low-k dielectric material
dielectric capping layer
sacrificial dielectric material
silsesquioxane
C doped oxide (Si, C, O, H)
thermosetting polyarylene ether
| — |
Thickness | 20–200 nm | — |
Thickness | 10–80 nm | — |
Temperature | 200–400 °C | — |
Temperature | 350–400 °C | — |
Thickness | 10–100 nm | — |
Thickness | 20–50 nm | — |
multilevel graphene-encapsulated copper BEOL interconnect structure
dielectric material (low-k or air)
pure copper
Cu
copper alloy
graphene (single-layer, few-layer, or multi-layer)
graphene mixed with amorphous and/or disordered carbon phases
low-k dielectric material
dielectric capping layer
sacrificial dielectric material
silsesquioxane
C doped oxide (Si, C, O, H)
thermosetting polyarylene ether
| — |
Thickness | 20–200 nm | — |
Thickness | 10–80 nm | — |
Temperature | 200–400 °C | — |
Temperature | 350–400 °C | — |
Thickness | 10–100 nm | — |
Thickness | 20–50 nm | — |
multilevel graphene-encapsulated copper BEOL interconnect structure
dielectric material (low-k or air)
pure copper
Cu
copper alloy
graphene (single-layer, few-layer, or multi-layer)
graphene mixed with amorphous and/or disordered carbon phases
low-k dielectric material
dielectric capping layer
sacrificial dielectric material
silsesquioxane
C doped oxide (Si, C, O, H)
thermosetting polyarylene ether
| — |
Thickness | 20–200 nm | — |
Thickness | 10–80 nm | — |
Temperature | 200–400 °C | — |
Temperature | 350–400 °C | — |
Thickness | 10–100 nm | — |
Thickness | 20–50 nm | — |