Patent
US 9,711,613STACKED GRAPHENE FIELD-EFFECT TRANSISTOR
Aaron D. Franklin
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,711,613Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a graphene field-effect transistor (GFET) structure, the method comprising: depositing a metal layer over a semiconductor substrate; depositing a first layer of gate dielectric onto the deposited metal layer; transferring a layer of graphene onto the first layer of gate dielectric; patterning the layer of graphene such that the patterned layer of graphene overlays a portion of the first layer of gate dielectric; and depositing a second layer of gate dielectric onto the patterned layer of graphene such that the graphene layer is completely enclosed within dielectric material of the first and second dielectric layers to form an encapsulated graphene layer.
The method of claim 1, further comprising: for a specified number of additional graphene layers, performing, for each additional graphene layer, the following steps: depositing another metal layer over a previously formed encapsulated graphene layer; depositing another first layer of gate dielectric onto the other metal layer; transferring another graphene layer onto the other first layer of gate dielectric; patterning the other layer of graphene such that the patterned other layer of graphene overlays a portion of the first other layer of gate dielectric; and depositing another second layer of gate dielectric onto the other patterned layer of graphene such that the other graphene layer is completely enclosed within dielectric material of the other first and other second dielectric layers to form another encapsulated graphene layer. YOR₉₂₀₁₄₀₂₆₂US₂ Page 15 of 18
The method of claim 1, further comprising: depositing a top metal layer on an uppermost encapsulated graphene layer; and depositing a dielectric layer over the top metal layer, wherein the dielectric layer is thicker than previously deposited layers of gate dielectric; wherein the resulting one or more metal layers, one or more encapsulated graphene layers, the top metal layer, and the dielectric layer, form a GFET stack.
The method of claim 1, wherein the metal layer
Layer stacks claimed or described, ordered top of device to substrate.
stacked graphene field-effect transistor (GFET)
Materials described outside the worked examples.
Aluminum
Al
graphene
Additional fabrication and treatment steps described in the patent.
Patent
Atlas literature
Patent
US 9,711,613Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a graphene field-effect transistor (GFET) structure, the method comprising: depositing a metal layer over a semiconductor substrate; depositing a first layer of gate dielectric onto the deposited metal layer; transferring a layer of graphene onto the first layer of gate dielectric; patterning the layer of graphene such that the patterned layer of graphene overlays a portion of the first layer of gate dielectric; and depositing a second layer of gate dielectric onto the patterned layer of graphene such that the graphene layer is completely enclosed within dielectric material of the first and second dielectric layers to form an encapsulated graphene layer.
The method of claim 1, further comprising: for a specified number of additional graphene layers, performing, for each additional graphene layer, the following steps: depositing another metal layer over a previously formed encapsulated graphene layer; depositing another first layer of gate dielectric onto the other metal layer; transferring another graphene layer onto the other first layer of gate dielectric; patterning the other layer of graphene such that the patterned other layer of graphene overlays a portion of the first other layer of gate dielectric; and depositing another second layer of gate dielectric onto the other patterned layer of graphene such that the other graphene layer is completely enclosed within dielectric material of the other first and other second dielectric layers to form another encapsulated graphene layer. YOR₉₂₀₁₄₀₂₆₂US₂ Page 15 of 18
The method of claim 1, further comprising: depositing a top metal layer on an uppermost encapsulated graphene layer; and depositing a dielectric layer over the top metal layer, wherein the dielectric layer is thicker than previously deposited layers of gate dielectric; wherein the resulting one or more metal layers, one or more encapsulated graphene layers, the top metal layer, and the dielectric layer, form a GFET stack.
The method of claim 1, wherein the metal layer
Layer stacks claimed or described, ordered top of device to substrate.
stacked graphene field-effect transistor (GFET)
Materials described outside the worked examples.
Aluminum
Al
graphene
Additional fabrication and treatment steps described in the patent.
Patent
Atlas literature
Patent
US 9,711,613Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a graphene field-effect transistor (GFET) structure, the method comprising: depositing a metal layer over a semiconductor substrate; depositing a first layer of gate dielectric onto the deposited metal layer; transferring a layer of graphene onto the first layer of gate dielectric; patterning the layer of graphene such that the patterned layer of graphene overlays a portion of the first layer of gate dielectric; and depositing a second layer of gate dielectric onto the patterned layer of graphene such that the graphene layer is completely enclosed within dielectric material of the first and second dielectric layers to form an encapsulated graphene layer.
The method of claim 1, further comprising: for a specified number of additional graphene layers, performing, for each additional graphene layer, the following steps: depositing another metal layer over a previously formed encapsulated graphene layer; depositing another first layer of gate dielectric onto the other metal layer; transferring another graphene layer onto the other first layer of gate dielectric; patterning the other layer of graphene such that the patterned other layer of graphene overlays a portion of the first other layer of gate dielectric; and depositing another second layer of gate dielectric onto the other patterned layer of graphene such that the other graphene layer is completely enclosed within dielectric material of the other first and other second dielectric layers to form another encapsulated graphene layer. YOR₉₂₀₁₄₀₂₆₂US₂ Page 15 of 18
The method of claim 1, further comprising: depositing a top metal layer on an uppermost encapsulated graphene layer; and depositing a dielectric layer over the top metal layer, wherein the dielectric layer is thicker than previously deposited layers of gate dielectric; wherein the resulting one or more metal layers, one or more encapsulated graphene layers, the top metal layer, and the dielectric layer, form a GFET stack.
The method of claim 1, wherein the metal layer
Layer stacks claimed or described, ordered top of device to substrate.
stacked graphene field-effect transistor (GFET)
Materials described outside the worked examples.
Aluminum
Al
graphene
Additional fabrication and treatment steps described in the patent.
Patent
Atlas literature
Patent
US 9,711,613Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a graphene field-effect transistor (GFET) structure, the method comprising: depositing a metal layer over a semiconductor substrate; depositing a first layer of gate dielectric onto the deposited metal layer; transferring a layer of graphene onto the first layer of gate dielectric; patterning the layer of graphene such that the patterned layer of graphene overlays a portion of the first layer of gate dielectric; and depositing a second layer of gate dielectric onto the patterned layer of graphene such that the graphene layer is completely enclosed within dielectric material of the first and second dielectric layers to form an encapsulated graphene layer.
The method of claim 1, further comprising: for a specified number of additional graphene layers, performing, for each additional graphene layer, the following steps: depositing another metal layer over a previously formed encapsulated graphene layer; depositing another first layer of gate dielectric onto the other metal layer; transferring another graphene layer onto the other first layer of gate dielectric; patterning the other layer of graphene such that the patterned other layer of graphene overlays a portion of the first other layer of gate dielectric; and depositing another second layer of gate dielectric onto the other patterned layer of graphene such that the other graphene layer is completely enclosed within dielectric material of the other first and other second dielectric layers to form another encapsulated graphene layer. YOR₉₂₀₁₄₀₂₆₂US₂ Page 15 of 18
The method of claim 1, further comprising: depositing a top metal layer on an uppermost encapsulated graphene layer; and depositing a dielectric layer over the top metal layer, wherein the dielectric layer is thicker than previously deposited layers of gate dielectric; wherein the resulting one or more metal layers, one or more encapsulated graphene layers, the top metal layer, and the dielectric layer, form a GFET stack.
The method of claim 1, wherein the metal layer
Layer stacks claimed or described, ordered top of device to substrate.
stacked graphene field-effect transistor (GFET)
Materials described outside the worked examples.
Aluminum
Al
graphene
Additional fabrication and treatment steps described in the patent.
gate dielectric
Chromium
Cr
gate metal plug
gate dielectric
Chromium
Cr
gate metal plug
gate dielectric
Chromium
Cr
gate metal plug
gate dielectric
Chromium
Cr
gate metal plug