Patent
US 8,106,383SELF-ALIGNED GRAPHENE TRANSISTOR
Keith A. Jenkins, Yu-Ming Lin, Alberto Valdes-Garcia
2012-01-31·US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,106,383Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A graphene field effect transistor comprising: a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack.
The graphene field effect transistor of claim 1, wherein the graphene sheet is deposited on the insulating layer.
The graphene field effect transistor of claim 1, wherein the graphene sheet is grown on the insulating layer.
The graphene field effect transistor of claim 1, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The graphene field effect transistor of claim 1, wherein the gate oxide is a dielectric.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack, the spacer having a portion removed to expose a portion of the gate metal.
A method of forming a graphene field effect transistor, the method comprising: providing an insulating layer; forming a graphene sheet on the insulating layer; forming a seed layer on the graphene sheet; forming a gate dielectric layer over the seed layer; forming a gate on top of the gate dielectric layer; encapsulating the seed layer, the gate dielectric and the gate in a spacer material to form an encapsulated gate stack; forming a source contact on the graphene sheet on a first side of the encapsulated gate stack; and forming a drain contact on the graphene sheet on a second side of the encapsulated gate stack.
The method of claim 10, wherein the graphene sheet is grown on the insulating layer.
The method of claim 10, wherein the seed layer functionalizes the graphene sheet.
The method of claim 10, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The method of claim 10, wherein the gate dielectric is a high-k dielectric.
The method of claim 10, wherein encapsulating includes: performing an ALD deposition of an oxide over the gate stack and the graphene sheet.
The method of claim 10, wherein a length of the channel is defined by the length of the gate and the thickness of the spacer material.
The method of claim 10, wherein the source contact is separated from the gate by the spacer material.
Layer stacks claimed or described, ordered top of device to substrate.
graphene field effect transistor
Materials described outside the worked examples.
graphene sheet
seed layer
Patent
Atlas literature
Patent
US 8,106,383Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A graphene field effect transistor comprising: a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack.
The graphene field effect transistor of claim 1, wherein the graphene sheet is deposited on the insulating layer.
The graphene field effect transistor of claim 1, wherein the graphene sheet is grown on the insulating layer.
The graphene field effect transistor of claim 1, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The graphene field effect transistor of claim 1, wherein the gate oxide is a dielectric.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack, the spacer having a portion removed to expose a portion of the gate metal.
A method of forming a graphene field effect transistor, the method comprising: providing an insulating layer; forming a graphene sheet on the insulating layer; forming a seed layer on the graphene sheet; forming a gate dielectric layer over the seed layer; forming a gate on top of the gate dielectric layer; encapsulating the seed layer, the gate dielectric and the gate in a spacer material to form an encapsulated gate stack; forming a source contact on the graphene sheet on a first side of the encapsulated gate stack; and forming a drain contact on the graphene sheet on a second side of the encapsulated gate stack.
The method of claim 10, wherein the graphene sheet is grown on the insulating layer.
The method of claim 10, wherein the seed layer functionalizes the graphene sheet.
The method of claim 10, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The method of claim 10, wherein the gate dielectric is a high-k dielectric.
The method of claim 10, wherein encapsulating includes: performing an ALD deposition of an oxide over the gate stack and the graphene sheet.
The method of claim 10, wherein a length of the channel is defined by the length of the gate and the thickness of the spacer material.
The method of claim 10, wherein the source contact is separated from the gate by the spacer material.
Layer stacks claimed or described, ordered top of device to substrate.
graphene field effect transistor
Materials described outside the worked examples.
graphene sheet
seed layer
Patent
Atlas literature
Patent
US 8,106,383Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A graphene field effect transistor comprising: a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack.
The graphene field effect transistor of claim 1, wherein the graphene sheet is deposited on the insulating layer.
The graphene field effect transistor of claim 1, wherein the graphene sheet is grown on the insulating layer.
The graphene field effect transistor of claim 1, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The graphene field effect transistor of claim 1, wherein the gate oxide is a dielectric.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack, the spacer having a portion removed to expose a portion of the gate metal.
A method of forming a graphene field effect transistor, the method comprising: providing an insulating layer; forming a graphene sheet on the insulating layer; forming a seed layer on the graphene sheet; forming a gate dielectric layer over the seed layer; forming a gate on top of the gate dielectric layer; encapsulating the seed layer, the gate dielectric and the gate in a spacer material to form an encapsulated gate stack; forming a source contact on the graphene sheet on a first side of the encapsulated gate stack; and forming a drain contact on the graphene sheet on a second side of the encapsulated gate stack.
The method of claim 10, wherein the graphene sheet is grown on the insulating layer.
The method of claim 10, wherein the seed layer functionalizes the graphene sheet.
The method of claim 10, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The method of claim 10, wherein the gate dielectric is a high-k dielectric.
The method of claim 10, wherein encapsulating includes: performing an ALD deposition of an oxide over the gate stack and the graphene sheet.
The method of claim 10, wherein a length of the channel is defined by the length of the gate and the thickness of the spacer material.
The method of claim 10, wherein the source contact is separated from the gate by the spacer material.
Layer stacks claimed or described, ordered top of device to substrate.
graphene field effect transistor
Materials described outside the worked examples.
graphene sheet
seed layer
Patent
Atlas literature
Patent
US 8,106,383Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A graphene field effect transistor comprising: a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack.
The graphene field effect transistor of claim 1, wherein the graphene sheet is deposited on the insulating layer.
The graphene field effect transistor of claim 1, wherein the graphene sheet is grown on the insulating layer.
The graphene field effect transistor of claim 1, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The graphene field effect transistor of claim 1, wherein the gate oxide is a dielectric.
The graphene field effect transistor of claim 1, further comprising: a spacer formed on a top and both sides of the gate stack, the spacer having a portion removed to expose a portion of the gate metal.
A method of forming a graphene field effect transistor, the method comprising: providing an insulating layer; forming a graphene sheet on the insulating layer; forming a seed layer on the graphene sheet; forming a gate dielectric layer over the seed layer; forming a gate on top of the gate dielectric layer; encapsulating the seed layer, the gate dielectric and the gate in a spacer material to form an encapsulated gate stack; forming a source contact on the graphene sheet on a first side of the encapsulated gate stack; and forming a drain contact on the graphene sheet on a second side of the encapsulated gate stack.
The method of claim 10, wherein the graphene sheet is grown on the insulating layer.
The method of claim 10, wherein the seed layer functionalizes the graphene sheet.
The method of claim 10, wherein the seed layer is one of: NO2, a polymer and an oxidized metal film.
The method of claim 10, wherein the gate dielectric is a high-k dielectric.
The method of claim 10, wherein encapsulating includes: performing an ALD deposition of an oxide over the gate stack and the graphene sheet.
The method of claim 10, wherein a length of the channel is defined by the length of the gate and the thickness of the spacer material.
The method of claim 10, wherein the source contact is separated from the gate by the spacer material.
Layer stacks claimed or described, ordered top of device to substrate.
graphene field effect transistor
Materials described outside the worked examples.
graphene sheet
seed layer
gate oxide/gate dielectric
gate metal
NO₂
polymer
oxidized metal film
ALD-deposited oxide
gate oxide/gate dielectric
gate metal
NO₂
polymer
oxidized metal film
ALD-deposited oxide
gate oxide/gate dielectric
gate metal
NO₂
polymer
oxidized metal film
ALD-deposited oxide
gate oxide/gate dielectric
gate metal
NO₂
polymer
oxidized metal film
ALD-deposited oxide