Patent
US 11,616,224PROCESS FOR PRODUCING SEMICONDUCTOR NANOWIRES AND NANOWIRE-GRAPHENE HYBRID PARTICULATES
Bor Z. Jang
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 11,616,224Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1(A) A flow chart showing a preferred route to preparing semiconductor nanowires from particles of the same semiconductor material, having a diameter from …
FIG. 2 Phase diagram of the Bi-Sn system.
FIG. 3 Phase diagram of the Al-Ge system.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 7 Schematic drawing to illustrate the process for producing exfoliated graphite, expanded graphite flakes, and graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
FIG. 9 The effect of nanowire diameter on the rate capability of an anode active material in a lithium-ion battery.
FIG. 10 The charge/discharge cycling behaviors of two lithium-ion cells, one featuring Sn nanowires grown in situ inside graphene sheet-encapsulated …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof excluding GaAs, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal- assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
The process of claim 1, wherein said graphene sheets are selected from pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof. Original
The process of claim 1, wherein said graphene sheets are selected from a single- layer sheet or few-layer platelet of pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof, wherein few layer is defined as less than 10 layers of graphene planes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said semiconductor particles are mixed to form a mixture in a particulate form of multiple secondary particles having a size from 1 p m to 30 pm. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and semiconductor particles are wrapped around by graphene sheets or exfoliated graphite flakes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and an optional conductive additive is added to this mixture to increase the conductivity of the mixture, wherein the conductive additive is selected from natural graphite, artificial graphite, meso-phase carbon, meso-phase pitch, meso-carbon micro-bead, soft carbon, hard carbon, coke, carbon fiber, carbon nano-fiber, carbon nano-tube, carbon black, or a combination thereof. Original
The process of claim 1, wherein said step of depositing a catalytic metal includes (a) dissolving or dispersing a catalytic metal precursor in a liquid to form a precursor solution, (b) bringing said precursor solution in contact with surfaces of said graphene sheets or exfoliated graphite flakes and/or surfaces of said semiconductor particles, (c) removing said liquid; and (d) chemically or thermally converting said catalytic metal precursor to said catalytic metal coating or nanoparticles. Original
The process of claim 1, wherein said step of depositing a catalytic metal is conducted by a procedure of physical vapor deposition, chemical vapor deposition, sputtering, plasma deposition, laser ablation, plasma spraying, ultrasonic spraying, printing, electrochemical deposition, electrode plating, electrodeless plating, chemical plating, or a combination thereof. Original
The process of claim 1, wherein said procedure of exposing said catalyst metal- coated semiconductor material to a high temperature environment is conducted in a protective atmosphere of an inert gas, nitrogen gas, hydrogen gas, a mixture thereof, or in a vacuum. Original
The process of claim 1, wherein said step of mixing the semiconductor particles and graphene sheets is conducted by liquid solution mixing, homogenizer mixing, high shearing mixing, wet milling, air milling, or ball-milling. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted after surfaces of said graphene sheets and/or said semiconductor particles are deposited with said catalytic metal. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted in such a manner that the resulting mixture is in a form of porous secondary particles having a diameter from 1 p m to 20 p m and having mesopores therein from 2 nm to 100 nm in size. Original
The process of claim 1, further comprising a procedure of separating said graphene sheets from said semiconductor nanowires. Original
The process of claim 1, further comprising a procedure of removing said catalytic metal from said graphene-semiconductor nanowire hybrid material composition. Original
The process of claim 1, further comprising a procedure of mixing said graphene/semiconductor nanowire hybrid composition with a carbonaceous or graphitic material as a conductive additive and an optional binder material to form an electrode layer, wherein said carbonaceous or graphitic material is selected from vapor deposition carbon, amorphous carbon, or carbonized resin, pitch-derived carbon, natural meso-phase pitch, meso-carbon micro-bead, soft nano-fiber, carbon nano-tube, carbon black, or a
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, or a compound thereof, wherein said catalytic metal is selected from Pb, Bi, Sb, Zn, Cd, Ga, In, Zr, Te, P, Sn, or a combination thereof, wherein said catalytic metal is different than said semiconductor material; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
Canceled
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Ge, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition, wherein said semiconductor material and said catalytic metal form an eutectic point and said procedure of exposing said catalyst metal-coated semiconductor material to a high temperature environment includes exposing said material to a temperature equal to or higher than said eutectic point for a desired period of time and then bringing said material to a temperature below said eutectic point. Previously presented
The process of claim 17, wherein said exposure temperature is higher than said eutectic temperature by 0.5 to 500 degrees in Celsius scale. Original
Canceled
Canceled
Canceled
Canceled
Canceled a chemical vapor deposition carbon, physical chemical vapor infiltration carbon, polymeric carbon graphite, artificial graphite, meso-phase carbon, carbon, hard carbon, coke, carbon fiber, carbon combination thereof. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene/semiconductor nanowire hybrid secondary particle
Materials described outside the worked examples.
graphene sheets/exfoliated graphite flakes
semiconductor particles
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0.34–100 nm | — |
Thickness |
Patent
Atlas literature
Patent
US 11,616,224Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1(A) A flow chart showing a preferred route to preparing semiconductor nanowires from particles of the same semiconductor material, having a diameter from …
FIG. 2 Phase diagram of the Bi-Sn system.
FIG. 3 Phase diagram of the Al-Ge system.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 7 Schematic drawing to illustrate the process for producing exfoliated graphite, expanded graphite flakes, and graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
FIG. 9 The effect of nanowire diameter on the rate capability of an anode active material in a lithium-ion battery.
FIG. 10 The charge/discharge cycling behaviors of two lithium-ion cells, one featuring Sn nanowires grown in situ inside graphene sheet-encapsulated …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof excluding GaAs, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal- assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
The process of claim 1, wherein said graphene sheets are selected from pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof. Original
The process of claim 1, wherein said graphene sheets are selected from a single- layer sheet or few-layer platelet of pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof, wherein few layer is defined as less than 10 layers of graphene planes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said semiconductor particles are mixed to form a mixture in a particulate form of multiple secondary particles having a size from 1 p m to 30 pm. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and semiconductor particles are wrapped around by graphene sheets or exfoliated graphite flakes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and an optional conductive additive is added to this mixture to increase the conductivity of the mixture, wherein the conductive additive is selected from natural graphite, artificial graphite, meso-phase carbon, meso-phase pitch, meso-carbon micro-bead, soft carbon, hard carbon, coke, carbon fiber, carbon nano-fiber, carbon nano-tube, carbon black, or a combination thereof. Original
The process of claim 1, wherein said step of depositing a catalytic metal includes (a) dissolving or dispersing a catalytic metal precursor in a liquid to form a precursor solution, (b) bringing said precursor solution in contact with surfaces of said graphene sheets or exfoliated graphite flakes and/or surfaces of said semiconductor particles, (c) removing said liquid; and (d) chemically or thermally converting said catalytic metal precursor to said catalytic metal coating or nanoparticles. Original
The process of claim 1, wherein said step of depositing a catalytic metal is conducted by a procedure of physical vapor deposition, chemical vapor deposition, sputtering, plasma deposition, laser ablation, plasma spraying, ultrasonic spraying, printing, electrochemical deposition, electrode plating, electrodeless plating, chemical plating, or a combination thereof. Original
The process of claim 1, wherein said procedure of exposing said catalyst metal- coated semiconductor material to a high temperature environment is conducted in a protective atmosphere of an inert gas, nitrogen gas, hydrogen gas, a mixture thereof, or in a vacuum. Original
The process of claim 1, wherein said step of mixing the semiconductor particles and graphene sheets is conducted by liquid solution mixing, homogenizer mixing, high shearing mixing, wet milling, air milling, or ball-milling. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted after surfaces of said graphene sheets and/or said semiconductor particles are deposited with said catalytic metal. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted in such a manner that the resulting mixture is in a form of porous secondary particles having a diameter from 1 p m to 20 p m and having mesopores therein from 2 nm to 100 nm in size. Original
The process of claim 1, further comprising a procedure of separating said graphene sheets from said semiconductor nanowires. Original
The process of claim 1, further comprising a procedure of removing said catalytic metal from said graphene-semiconductor nanowire hybrid material composition. Original
The process of claim 1, further comprising a procedure of mixing said graphene/semiconductor nanowire hybrid composition with a carbonaceous or graphitic material as a conductive additive and an optional binder material to form an electrode layer, wherein said carbonaceous or graphitic material is selected from vapor deposition carbon, amorphous carbon, or carbonized resin, pitch-derived carbon, natural meso-phase pitch, meso-carbon micro-bead, soft nano-fiber, carbon nano-tube, carbon black, or a
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, or a compound thereof, wherein said catalytic metal is selected from Pb, Bi, Sb, Zn, Cd, Ga, In, Zr, Te, P, Sn, or a combination thereof, wherein said catalytic metal is different than said semiconductor material; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
Canceled
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Ge, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition, wherein said semiconductor material and said catalytic metal form an eutectic point and said procedure of exposing said catalyst metal-coated semiconductor material to a high temperature environment includes exposing said material to a temperature equal to or higher than said eutectic point for a desired period of time and then bringing said material to a temperature below said eutectic point. Previously presented
The process of claim 17, wherein said exposure temperature is higher than said eutectic temperature by 0.5 to 500 degrees in Celsius scale. Original
Canceled
Canceled
Canceled
Canceled
Canceled a chemical vapor deposition carbon, physical chemical vapor infiltration carbon, polymeric carbon graphite, artificial graphite, meso-phase carbon, carbon, hard carbon, coke, carbon fiber, carbon combination thereof. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene/semiconductor nanowire hybrid secondary particle
Materials described outside the worked examples.
graphene sheets/exfoliated graphite flakes
semiconductor particles
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0.34–100 nm | — |
Thickness |
Patent
Atlas literature
Patent
US 11,616,224Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1(A) A flow chart showing a preferred route to preparing semiconductor nanowires from particles of the same semiconductor material, having a diameter from …
FIG. 2 Phase diagram of the Bi-Sn system.
FIG. 3 Phase diagram of the Al-Ge system.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 7 Schematic drawing to illustrate the process for producing exfoliated graphite, expanded graphite flakes, and graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
FIG. 9 The effect of nanowire diameter on the rate capability of an anode active material in a lithium-ion battery.
FIG. 10 The charge/discharge cycling behaviors of two lithium-ion cells, one featuring Sn nanowires grown in situ inside graphene sheet-encapsulated …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof excluding GaAs, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal- assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
The process of claim 1, wherein said graphene sheets are selected from pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof. Original
The process of claim 1, wherein said graphene sheets are selected from a single- layer sheet or few-layer platelet of pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof, wherein few layer is defined as less than 10 layers of graphene planes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said semiconductor particles are mixed to form a mixture in a particulate form of multiple secondary particles having a size from 1 p m to 30 pm. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and semiconductor particles are wrapped around by graphene sheets or exfoliated graphite flakes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and an optional conductive additive is added to this mixture to increase the conductivity of the mixture, wherein the conductive additive is selected from natural graphite, artificial graphite, meso-phase carbon, meso-phase pitch, meso-carbon micro-bead, soft carbon, hard carbon, coke, carbon fiber, carbon nano-fiber, carbon nano-tube, carbon black, or a combination thereof. Original
The process of claim 1, wherein said step of depositing a catalytic metal includes (a) dissolving or dispersing a catalytic metal precursor in a liquid to form a precursor solution, (b) bringing said precursor solution in contact with surfaces of said graphene sheets or exfoliated graphite flakes and/or surfaces of said semiconductor particles, (c) removing said liquid; and (d) chemically or thermally converting said catalytic metal precursor to said catalytic metal coating or nanoparticles. Original
The process of claim 1, wherein said step of depositing a catalytic metal is conducted by a procedure of physical vapor deposition, chemical vapor deposition, sputtering, plasma deposition, laser ablation, plasma spraying, ultrasonic spraying, printing, electrochemical deposition, electrode plating, electrodeless plating, chemical plating, or a combination thereof. Original
The process of claim 1, wherein said procedure of exposing said catalyst metal- coated semiconductor material to a high temperature environment is conducted in a protective atmosphere of an inert gas, nitrogen gas, hydrogen gas, a mixture thereof, or in a vacuum. Original
The process of claim 1, wherein said step of mixing the semiconductor particles and graphene sheets is conducted by liquid solution mixing, homogenizer mixing, high shearing mixing, wet milling, air milling, or ball-milling. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted after surfaces of said graphene sheets and/or said semiconductor particles are deposited with said catalytic metal. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted in such a manner that the resulting mixture is in a form of porous secondary particles having a diameter from 1 p m to 20 p m and having mesopores therein from 2 nm to 100 nm in size. Original
The process of claim 1, further comprising a procedure of separating said graphene sheets from said semiconductor nanowires. Original
The process of claim 1, further comprising a procedure of removing said catalytic metal from said graphene-semiconductor nanowire hybrid material composition. Original
The process of claim 1, further comprising a procedure of mixing said graphene/semiconductor nanowire hybrid composition with a carbonaceous or graphitic material as a conductive additive and an optional binder material to form an electrode layer, wherein said carbonaceous or graphitic material is selected from vapor deposition carbon, amorphous carbon, or carbonized resin, pitch-derived carbon, natural meso-phase pitch, meso-carbon micro-bead, soft nano-fiber, carbon nano-tube, carbon black, or a
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, or a compound thereof, wherein said catalytic metal is selected from Pb, Bi, Sb, Zn, Cd, Ga, In, Zr, Te, P, Sn, or a combination thereof, wherein said catalytic metal is different than said semiconductor material; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
Canceled
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Ge, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition, wherein said semiconductor material and said catalytic metal form an eutectic point and said procedure of exposing said catalyst metal-coated semiconductor material to a high temperature environment includes exposing said material to a temperature equal to or higher than said eutectic point for a desired period of time and then bringing said material to a temperature below said eutectic point. Previously presented
The process of claim 17, wherein said exposure temperature is higher than said eutectic temperature by 0.5 to 500 degrees in Celsius scale. Original
Canceled
Canceled
Canceled
Canceled
Canceled a chemical vapor deposition carbon, physical chemical vapor infiltration carbon, polymeric carbon graphite, artificial graphite, meso-phase carbon, carbon, hard carbon, coke, carbon fiber, carbon combination thereof. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene/semiconductor nanowire hybrid secondary particle
Materials described outside the worked examples.
graphene sheets/exfoliated graphite flakes
semiconductor particles
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0.34–100 nm | — |
Thickness |
Patent
Atlas literature
Patent
US 11,616,224Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1(A) A flow chart showing a preferred route to preparing semiconductor nanowires from particles of the same semiconductor material, having a diameter from …
FIG. 2 Phase diagram of the Bi-Sn system.
FIG. 3 Phase diagram of the Al-Ge system.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 7 Schematic drawing to illustrate the process for producing exfoliated graphite, expanded graphite flakes, and graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
FIG. 9 The effect of nanowire diameter on the rate capability of an anode active material in a lithium-ion battery.
FIG. 10 The charge/discharge cycling behaviors of two lithium-ion cells, one featuring Sn nanowires grown in situ inside graphene sheet-encapsulated …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof excluding GaAs, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal- assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
The process of claim 1, wherein said graphene sheets are selected from pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof. Original
The process of claim 1, wherein said graphene sheets are selected from a single- layer sheet or few-layer platelet of pristine graphene, graphene oxide, reduced graphene oxide, graphene fluoride, graphene bromide, graphene iodide, boron-doped graphene, nitrogen-doped graphene, chemically functionalized graphene, or a combination thereof, wherein few layer is defined as less than 10 layers of graphene planes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said semiconductor particles are mixed to form a mixture in a particulate form of multiple secondary particles having a size from 1 p m to 30 pm. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and semiconductor particles are wrapped around by graphene sheets or exfoliated graphite flakes. Original
The process of claim 1, wherein said graphene sheets or exfoliated graphite flakes and said micron or sub-micron scaled semiconductor particles are mixed to form a mixture and an optional conductive additive is added to this mixture to increase the conductivity of the mixture, wherein the conductive additive is selected from natural graphite, artificial graphite, meso-phase carbon, meso-phase pitch, meso-carbon micro-bead, soft carbon, hard carbon, coke, carbon fiber, carbon nano-fiber, carbon nano-tube, carbon black, or a combination thereof. Original
The process of claim 1, wherein said step of depositing a catalytic metal includes (a) dissolving or dispersing a catalytic metal precursor in a liquid to form a precursor solution, (b) bringing said precursor solution in contact with surfaces of said graphene sheets or exfoliated graphite flakes and/or surfaces of said semiconductor particles, (c) removing said liquid; and (d) chemically or thermally converting said catalytic metal precursor to said catalytic metal coating or nanoparticles. Original
The process of claim 1, wherein said step of depositing a catalytic metal is conducted by a procedure of physical vapor deposition, chemical vapor deposition, sputtering, plasma deposition, laser ablation, plasma spraying, ultrasonic spraying, printing, electrochemical deposition, electrode plating, electrodeless plating, chemical plating, or a combination thereof. Original
The process of claim 1, wherein said procedure of exposing said catalyst metal- coated semiconductor material to a high temperature environment is conducted in a protective atmosphere of an inert gas, nitrogen gas, hydrogen gas, a mixture thereof, or in a vacuum. Original
The process of claim 1, wherein said step of mixing the semiconductor particles and graphene sheets is conducted by liquid solution mixing, homogenizer mixing, high shearing mixing, wet milling, air milling, or ball-milling. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted after surfaces of said graphene sheets and/or said semiconductor particles are deposited with said catalytic metal. Original
The process of claim 1, wherein said mixing of graphene sheets with micron or sub-micron scaled semiconductor particles is conducted in such a manner that the resulting mixture is in a form of porous secondary particles having a diameter from 1 p m to 20 p m and having mesopores therein from 2 nm to 100 nm in size. Original
The process of claim 1, further comprising a procedure of separating said graphene sheets from said semiconductor nanowires. Original
The process of claim 1, further comprising a procedure of removing said catalytic metal from said graphene-semiconductor nanowire hybrid material composition. Original
The process of claim 1, further comprising a procedure of mixing said graphene/semiconductor nanowire hybrid composition with a carbonaceous or graphitic material as a conductive additive and an optional binder material to form an electrode layer, wherein said carbonaceous or graphitic material is selected from vapor deposition carbon, amorphous carbon, or carbonized resin, pitch-derived carbon, natural meso-phase pitch, meso-carbon micro-bead, soft nano-fiber, carbon nano-tube, carbon black, or a
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, or a compound thereof, wherein said catalytic metal is selected from Pb, Bi, Sb, Zn, Cd, Ga, In, Zr, Te, P, Sn, or a combination thereof, wherein said catalytic metal is different than said semiconductor material; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition. Previously presented
Canceled
A process for producing graphene/semiconductor nanowire hybrid material composition, said process comprising: (A) preparing a catalyst metal-coated mixture mass, which includes mixing exfoliated graphite flakes, having a flake thickness from 100 nm to 1 p m, or graphene sheets, having a thickness from 0.34 nm to 100 nm, with semiconductor particles, having a particle diameter from 50 nm to 50 p m, to form a mixture and depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of said exfoliated graphite flakes or graphene sheets and/or surfaces of said semiconductor particles, wherein said semiconductor material is selected from Ga, In, Ge, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof, or a combination thereof with Si having less than 30% by weight of Si; and (B) exposing said catalyst metal-coated mixture mass to a high temperature environment, from 100 ° C to 2,500 ° C, for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires, having a diameter or thickness from 2 nm to 100 nm, from said semiconductor particles to form said graphene/semiconductor nanowire hybrid material composition, wherein said semiconductor material and said catalytic metal form an eutectic point and said procedure of exposing said catalyst metal-coated semiconductor material to a high temperature environment includes exposing said material to a temperature equal to or higher than said eutectic point for a desired period of time and then bringing said material to a temperature below said eutectic point. Previously presented
The process of claim 17, wherein said exposure temperature is higher than said eutectic temperature by 0.5 to 500 degrees in Celsius scale. Original
Canceled
Canceled
Canceled
Canceled
Canceled a chemical vapor deposition carbon, physical chemical vapor infiltration carbon, polymeric carbon graphite, artificial graphite, meso-phase carbon, carbon, hard carbon, coke, carbon fiber, carbon combination thereof. Original
Layer stacks claimed or described, ordered top of device to substrate.
graphene/semiconductor nanowire hybrid secondary particle
Materials described outside the worked examples.
graphene sheets/exfoliated graphite flakes
semiconductor particles
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4(A) SEM image of Si nanowires grown from Si particles without the presence of graphene sheets or graphite flakes.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 0.34–100 nm | — |
Thickness |
catalytic metal
semiconductor nanowires
conductive additive (carbonaceous/graphitic)
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
| 1–100 nm |
| — |
Thickness | 2–100 nm | — |
Thickness | 10–100 nm | — |
Temperature | 100–2500 °C | — |
Temperature | 200–1500 °C | — |
Temperature | 300–1200 °C | — |
Temperature | 139.5–230 °C | — |
Duration | 60–10800 s | — |
Temperature | 421–600 °C | — |
Thickness | 2–20 nm | — |
Duration | 30–120 s | — |
Thickness | 12–30 nm | — |
Thickness | 47–77 nm | — |
Duration | 900–7200 s | — |
Thickness | 42–67 nm | — |
Duration | 24–96 hours | — |
Thickness | 2–35 nm | — |
Thickness | 35–90 nm | — |
Duration | 0.5–96 hours | — |
Duration | 48–72 hours | — |
Thickness | 15–27 nm | — |
Duration | 1–180 minutes | — |
Temperature | 450–650 °C | — |
Temperature | 500–1500 °C | — |
Temperature | 350–1500 °C | — |
Temperature | 800–1050 °C | — |
Thickness | 0.6–1.1 nm | — |
Temperature | 200–400 °C | — |
Temperature | 150–250 °C | — |
Temperature | 300–700 °C | — |
Temperature | 762–900 °C | — |
Duration | 1–3 hours | — |
Duration | 48–96 hours | — |
Duration | 10–100 minutes | — |
Temperature | 400–650 °C | — |
Duration | 1–5 hours | — |
Thickness | 7–18 nm | — |
Temperature | 300–600 °C | — |
Temperature | 526–620 °C | — |
Thickness | 40–100 nm | — |
Thickness | 1.5–5.6 nm | — |
Thickness | 1.1–3.5 nm | — |
Thickness | 25–65 nm | — |
Thickness | 10–21 nm | — |
Thickness | 15–25 nm | — |
Temperature | 780–900 °C | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≤ 7 nm | — |
Thickness | ≥ 35 nm | — |
Thickness | ≥ 50 nm | — |
Thickness | ≥ 60 nm | — |
Thickness | ≥ 1 nm | — |
Thickness | 2–15 nm | — |
Thickness | 2–10 nm | — |
Temperature | 100–1000 °C | — |
Temperature | 600–2500 °C | — |
catalytic metal
semiconductor nanowires
conductive additive (carbonaceous/graphitic)
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
| 1–100 nm |
| — |
Thickness | 2–100 nm | — |
Thickness | 10–100 nm | — |
Temperature | 100–2500 °C | — |
Temperature | 200–1500 °C | — |
Temperature | 300–1200 °C | — |
Temperature | 139.5–230 °C | — |
Duration | 60–10800 s | — |
Temperature | 421–600 °C | — |
Thickness | 2–20 nm | — |
Duration | 30–120 s | — |
Thickness | 12–30 nm | — |
Thickness | 47–77 nm | — |
Duration | 900–7200 s | — |
Thickness | 42–67 nm | — |
Duration | 24–96 hours | — |
Thickness | 2–35 nm | — |
Thickness | 35–90 nm | — |
Duration | 0.5–96 hours | — |
Duration | 48–72 hours | — |
Thickness | 15–27 nm | — |
Duration | 1–180 minutes | — |
Temperature | 450–650 °C | — |
Temperature | 500–1500 °C | — |
Temperature | 350–1500 °C | — |
Temperature | 800–1050 °C | — |
Thickness | 0.6–1.1 nm | — |
Temperature | 200–400 °C | — |
Temperature | 150–250 °C | — |
Temperature | 300–700 °C | — |
Temperature | 762–900 °C | — |
Duration | 1–3 hours | — |
Duration | 48–96 hours | — |
Duration | 10–100 minutes | — |
Temperature | 400–650 °C | — |
Duration | 1–5 hours | — |
Thickness | 7–18 nm | — |
Temperature | 300–600 °C | — |
Temperature | 526–620 °C | — |
Thickness | 40–100 nm | — |
Thickness | 1.5–5.6 nm | — |
Thickness | 1.1–3.5 nm | — |
Thickness | 25–65 nm | — |
Thickness | 10–21 nm | — |
Thickness | 15–25 nm | — |
Temperature | 780–900 °C | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≤ 7 nm | — |
Thickness | ≥ 35 nm | — |
Thickness | ≥ 50 nm | — |
Thickness | ≥ 60 nm | — |
Thickness | ≥ 1 nm | — |
Thickness | 2–15 nm | — |
Thickness | 2–10 nm | — |
Temperature | 100–1000 °C | — |
Temperature | 600–2500 °C | — |
catalytic metal
semiconductor nanowires
conductive additive (carbonaceous/graphitic)
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
| 1–100 nm |
| — |
Thickness | 2–100 nm | — |
Thickness | 10–100 nm | — |
Temperature | 100–2500 °C | — |
Temperature | 200–1500 °C | — |
Temperature | 300–1200 °C | — |
Temperature | 139.5–230 °C | — |
Duration | 60–10800 s | — |
Temperature | 421–600 °C | — |
Thickness | 2–20 nm | — |
Duration | 30–120 s | — |
Thickness | 12–30 nm | — |
Thickness | 47–77 nm | — |
Duration | 900–7200 s | — |
Thickness | 42–67 nm | — |
Duration | 24–96 hours | — |
Thickness | 2–35 nm | — |
Thickness | 35–90 nm | — |
Duration | 0.5–96 hours | — |
Duration | 48–72 hours | — |
Thickness | 15–27 nm | — |
Duration | 1–180 minutes | — |
Temperature | 450–650 °C | — |
Temperature | 500–1500 °C | — |
Temperature | 350–1500 °C | — |
Temperature | 800–1050 °C | — |
Thickness | 0.6–1.1 nm | — |
Temperature | 200–400 °C | — |
Temperature | 150–250 °C | — |
Temperature | 300–700 °C | — |
Temperature | 762–900 °C | — |
Duration | 1–3 hours | — |
Duration | 48–96 hours | — |
Duration | 10–100 minutes | — |
Temperature | 400–650 °C | — |
Duration | 1–5 hours | — |
Thickness | 7–18 nm | — |
Temperature | 300–600 °C | — |
Temperature | 526–620 °C | — |
Thickness | 40–100 nm | — |
Thickness | 1.5–5.6 nm | — |
Thickness | 1.1–3.5 nm | — |
Thickness | 25–65 nm | — |
Thickness | 10–21 nm | — |
Thickness | 15–25 nm | — |
Temperature | 780–900 °C | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≤ 7 nm | — |
Thickness | ≥ 35 nm | — |
Thickness | ≥ 50 nm | — |
Thickness | ≥ 60 nm | — |
Thickness | ≥ 1 nm | — |
Thickness | 2–15 nm | — |
Thickness | 2–10 nm | — |
Temperature | 100–1000 °C | — |
Temperature | 600–2500 °C | — |
catalytic metal
semiconductor nanowires
conductive additive (carbonaceous/graphitic)
FIG. 5 SEM image of Ge nanowires.
FIG. 6(B) SEM image of Sn nanowires grown in the presence of graphene sheets.
FIG. 8(A) SEM images of exfoliated graphite worms imaged at a low magnification;
| 1–100 nm |
| — |
Thickness | 2–100 nm | — |
Thickness | 10–100 nm | — |
Temperature | 100–2500 °C | — |
Temperature | 200–1500 °C | — |
Temperature | 300–1200 °C | — |
Temperature | 139.5–230 °C | — |
Duration | 60–10800 s | — |
Temperature | 421–600 °C | — |
Thickness | 2–20 nm | — |
Duration | 30–120 s | — |
Thickness | 12–30 nm | — |
Thickness | 47–77 nm | — |
Duration | 900–7200 s | — |
Thickness | 42–67 nm | — |
Duration | 24–96 hours | — |
Thickness | 2–35 nm | — |
Thickness | 35–90 nm | — |
Duration | 0.5–96 hours | — |
Duration | 48–72 hours | — |
Thickness | 15–27 nm | — |
Duration | 1–180 minutes | — |
Temperature | 450–650 °C | — |
Temperature | 500–1500 °C | — |
Temperature | 350–1500 °C | — |
Temperature | 800–1050 °C | — |
Thickness | 0.6–1.1 nm | — |
Temperature | 200–400 °C | — |
Temperature | 150–250 °C | — |
Temperature | 300–700 °C | — |
Temperature | 762–900 °C | — |
Duration | 1–3 hours | — |
Duration | 48–96 hours | — |
Duration | 10–100 minutes | — |
Temperature | 400–650 °C | — |
Duration | 1–5 hours | — |
Thickness | 7–18 nm | — |
Temperature | 300–600 °C | — |
Temperature | 526–620 °C | — |
Thickness | 40–100 nm | — |
Thickness | 1.5–5.6 nm | — |
Thickness | 1.1–3.5 nm | — |
Thickness | 25–65 nm | — |
Thickness | 10–21 nm | — |
Thickness | 15–25 nm | — |
Temperature | 780–900 °C | — |
Thickness | ≤ 10 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 20 nm | — |
Thickness | ≤ 7 nm | — |
Thickness | ≥ 35 nm | — |
Thickness | ≥ 50 nm | — |
Thickness | ≥ 60 nm | — |
Thickness | ≥ 1 nm | — |
Thickness | 2–15 nm | — |
Thickness | 2–10 nm | — |
Temperature | 100–1000 °C | — |
Temperature | 600–2500 °C | — |